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x86, microcode: Save an indentation level in reload_for_cpu
[thirdparty/kernel/stable.git] / arch / x86 / kernel / microcode_core.c
CommitLineData
3e135d88
PO
1/*
2 * Intel CPU Microcode Update Driver for Linux
3 *
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
6 *
7 * This driver allows to upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
10 *
11 * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
12 * Software Developer's Manual
13 * Order Number 253668 or free download from:
14 *
50a23e6e 15 * http://developer.intel.com/Assets/PDF/manual/253668.pdf
3e135d88
PO
16 *
17 * For more information, go to http://www.urbanmyth.org/microcode
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
23 *
24 * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
25 * Initial release.
26 * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
27 * Added read() support + cleanups.
28 * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
29 * Added 'device trimming' support. open(O_WRONLY) zeroes
30 * and frees the saved copy of applied microcode.
31 * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
32 * Made to use devfs (/dev/cpu/microcode) + cleanups.
33 * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
34 * Added misc device support (now uses both devfs and misc).
35 * Added MICROCODE_IOCFREE ioctl to clear memory.
36 * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
37 * Messages for error cases (non Intel & no suitable microcode).
38 * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
39 * Removed ->release(). Removed exclusive open and status bitmap.
40 * Added microcode_rwsem to serialize read()/write()/ioctl().
41 * Removed global kernel lock usage.
42 * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
43 * Write 0 to 0x8B msr and then cpuid before reading revision,
44 * so that it works even if there were no update done by the
45 * BIOS. Otherwise, reading from 0x8B gives junk (which happened
46 * to be 0 on my machine which is why it worked even when I
47 * disabled update by the BIOS)
48 * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
49 * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
50 * Tigran Aivazian <tigran@veritas.com>
51 * Intel Pentium 4 processor support and bugfixes.
52 * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
53 * Bugfix for HT (Hyper-Threading) enabled processors
54 * whereby processor resources are shared by all logical processors
55 * in a single CPU package.
56 * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
57 * Tigran Aivazian <tigran@veritas.com>,
d33dcb9e
PO
58 * Serialize updates as required on HT processors due to
59 * speculative nature of implementation.
3e135d88
PO
60 * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
61 * Fix the panic when writing zero-length microcode chunk.
62 * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
63 * Jun Nakajima <jun.nakajima@intel.com>
64 * Support for the microcode updates in the new format.
65 * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
66 * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
67 * because we no longer hold a copy of applied microcode
68 * in kernel memory.
69 * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
70 * Fix sigmatch() macro to handle old CPUs with pf == 0.
71 * Thanks to Stuart Swales for pointing out this bug.
72 */
f58e1f53
JP
73
74#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
75
4bae1967 76#include <linux/platform_device.h>
4bae1967 77#include <linux/miscdevice.h>
871b72dd 78#include <linux/capability.h>
4bae1967
IM
79#include <linux/kernel.h>
80#include <linux/module.h>
3e135d88
PO
81#include <linux/mutex.h>
82#include <linux/cpu.h>
4bae1967
IM
83#include <linux/fs.h>
84#include <linux/mm.h>
f3c6ea1b 85#include <linux/syscore_ops.h>
3e135d88 86
3e135d88 87#include <asm/microcode.h>
4bae1967 88#include <asm/processor.h>
78ff123b 89#include <asm/cpu_device_id.h>
c93dc84c 90#include <asm/perf_event.h>
3e135d88
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91
92MODULE_DESCRIPTION("Microcode Update Driver");
93MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
94MODULE_LICENSE("GPL");
95
4bae1967 96#define MICROCODE_VERSION "2.00"
3e135d88 97
4bae1967 98static struct microcode_ops *microcode_ops;
3e135d88 99
871b72dd
DA
100/*
101 * Synchronization.
102 *
103 * All non cpu-hotplug-callback call sites use:
104 *
105 * - microcode_mutex to synchronize with each other;
106 * - get/put_online_cpus() to synchronize with
107 * the cpu-hotplug-callback call sites.
108 *
109 * We guarantee that only a single cpu is being
110 * updated at any particular moment of time.
111 */
d45de409 112static DEFINE_MUTEX(microcode_mutex);
3e135d88 113
4bae1967 114struct ucode_cpu_info ucode_cpu_info[NR_CPUS];
8d86f390 115EXPORT_SYMBOL_GPL(ucode_cpu_info);
3e135d88 116
871b72dd
DA
117/*
118 * Operations that are run on a target cpu:
119 */
120
121struct cpu_info_ctx {
122 struct cpu_signature *cpu_sig;
123 int err;
124};
125
126static void collect_cpu_info_local(void *arg)
127{
128 struct cpu_info_ctx *ctx = arg;
129
130 ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(),
131 ctx->cpu_sig);
132}
133
134static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig)
135{
136 struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 };
137 int ret;
138
139 ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1);
140 if (!ret)
141 ret = ctx.err;
142
143 return ret;
144}
145
146static int collect_cpu_info(int cpu)
147{
148 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
149 int ret;
150
151 memset(uci, 0, sizeof(*uci));
152
153 ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig);
154 if (!ret)
155 uci->valid = 1;
156
157 return ret;
158}
159
160struct apply_microcode_ctx {
161 int err;
162};
163
164static void apply_microcode_local(void *arg)
165{
166 struct apply_microcode_ctx *ctx = arg;
167
168 ctx->err = microcode_ops->apply_microcode(smp_processor_id());
169}
170
171static int apply_microcode_on_target(int cpu)
172{
173 struct apply_microcode_ctx ctx = { .err = 0 };
174 int ret;
175
176 ret = smp_call_function_single(cpu, apply_microcode_local, &ctx, 1);
177 if (!ret)
178 ret = ctx.err;
179
180 return ret;
181}
182
3e135d88 183#ifdef CONFIG_MICROCODE_OLD_INTERFACE
a0a29b62 184static int do_microcode_update(const void __user *buf, size_t size)
3e135d88 185{
3e135d88 186 int error = 0;
3e135d88 187 int cpu;
6f66cbc6 188
a0a29b62
DA
189 for_each_online_cpu(cpu) {
190 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
871b72dd 191 enum ucode_state ustate;
a0a29b62
DA
192
193 if (!uci->valid)
194 continue;
6f66cbc6 195
871b72dd
DA
196 ustate = microcode_ops->request_microcode_user(cpu, buf, size);
197 if (ustate == UCODE_ERROR) {
198 error = -1;
199 break;
200 } else if (ustate == UCODE_OK)
201 apply_microcode_on_target(cpu);
3e135d88 202 }
871b72dd 203
3e135d88
PO
204 return error;
205}
206
3f10940e 207static int microcode_open(struct inode *inode, struct file *file)
3e135d88 208{
3f10940e 209 return capable(CAP_SYS_RAWIO) ? nonseekable_open(inode, file) : -EPERM;
3e135d88
PO
210}
211
d33dcb9e
PO
212static ssize_t microcode_write(struct file *file, const char __user *buf,
213 size_t len, loff_t *ppos)
3e135d88 214{
871b72dd 215 ssize_t ret = -EINVAL;
3e135d88 216
4481374c 217 if ((len >> PAGE_SHIFT) > totalram_pages) {
f58e1f53 218 pr_err("too much data (max %ld pages)\n", totalram_pages);
871b72dd 219 return ret;
3e135d88
PO
220 }
221
222 get_online_cpus();
223 mutex_lock(&microcode_mutex);
224
871b72dd 225 if (do_microcode_update(buf, len) == 0)
3e135d88
PO
226 ret = (ssize_t)len;
227
228 mutex_unlock(&microcode_mutex);
229 put_online_cpus();
230
231 return ret;
232}
233
234static const struct file_operations microcode_fops = {
871b72dd
DA
235 .owner = THIS_MODULE,
236 .write = microcode_write,
237 .open = microcode_open,
6038f373 238 .llseek = no_llseek,
3e135d88
PO
239};
240
241static struct miscdevice microcode_dev = {
871b72dd
DA
242 .minor = MICROCODE_MINOR,
243 .name = "microcode",
e454cea2 244 .nodename = "cpu/microcode",
871b72dd 245 .fops = &microcode_fops,
3e135d88
PO
246};
247
d33dcb9e 248static int __init microcode_dev_init(void)
3e135d88
PO
249{
250 int error;
251
252 error = misc_register(&microcode_dev);
253 if (error) {
f58e1f53 254 pr_err("can't misc_register on minor=%d\n", MICROCODE_MINOR);
3e135d88
PO
255 return error;
256 }
257
258 return 0;
259}
260
bd399063 261static void __exit microcode_dev_exit(void)
3e135d88
PO
262{
263 misc_deregister(&microcode_dev);
264}
265
266MODULE_ALIAS_MISCDEV(MICROCODE_MINOR);
578454ff 267MODULE_ALIAS("devname:cpu/microcode");
3e135d88 268#else
4bae1967
IM
269#define microcode_dev_init() 0
270#define microcode_dev_exit() do { } while (0)
3e135d88
PO
271#endif
272
273/* fake device for request_firmware */
4bae1967 274static struct platform_device *microcode_pdev;
3e135d88 275
871b72dd 276static int reload_for_cpu(int cpu)
af5c820a 277{
871b72dd 278 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
4dbf32c3 279 enum ucode_state ustate;
af5c820a
RR
280 int err = 0;
281
4dbf32c3
BP
282 if (!uci->valid)
283 return err;
871b72dd 284
4dbf32c3
BP
285 ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev);
286 if (ustate == UCODE_OK)
287 apply_microcode_on_target(cpu);
288 else
289 if (ustate == UCODE_ERROR)
290 err = -EINVAL;
af5c820a
RR
291 return err;
292}
293
8a25a2fd
KS
294static ssize_t reload_store(struct device *dev,
295 struct device_attribute *attr,
871b72dd 296 const char *buf, size_t size)
3e135d88 297{
871b72dd 298 unsigned long val;
c9fc3f77
BP
299 int cpu;
300 ssize_t ret = 0, tmp_ret;
301
e826abd5
SK
302 ret = kstrtoul(buf, 0, &val);
303 if (ret)
304 return ret;
871b72dd 305
c9fc3f77
BP
306 if (val != 1)
307 return size;
308
309 get_online_cpus();
c93dc84c 310 mutex_lock(&microcode_mutex);
c9fc3f77
BP
311 for_each_online_cpu(cpu) {
312 tmp_ret = reload_for_cpu(cpu);
313 if (tmp_ret != 0)
314 pr_warn("Error reloading microcode on CPU %d\n", cpu);
315
316 /* save retval of the first encountered reload error */
317 if (!ret)
318 ret = tmp_ret;
3e135d88 319 }
c93dc84c
PZ
320 if (!ret)
321 perf_check_microcode();
322 mutex_unlock(&microcode_mutex);
c9fc3f77 323 put_online_cpus();
871b72dd
DA
324
325 if (!ret)
326 ret = size;
327
328 return ret;
3e135d88
PO
329}
330
8a25a2fd
KS
331static ssize_t version_show(struct device *dev,
332 struct device_attribute *attr, char *buf)
3e135d88
PO
333{
334 struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
335
d45de409 336 return sprintf(buf, "0x%x\n", uci->cpu_sig.rev);
3e135d88
PO
337}
338
8a25a2fd
KS
339static ssize_t pf_show(struct device *dev,
340 struct device_attribute *attr, char *buf)
3e135d88
PO
341{
342 struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
343
d45de409 344 return sprintf(buf, "0x%x\n", uci->cpu_sig.pf);
3e135d88
PO
345}
346
8a25a2fd
KS
347static DEVICE_ATTR(reload, 0200, NULL, reload_store);
348static DEVICE_ATTR(version, 0400, version_show, NULL);
349static DEVICE_ATTR(processor_flags, 0400, pf_show, NULL);
3e135d88
PO
350
351static struct attribute *mc_default_attrs[] = {
8a25a2fd
KS
352 &dev_attr_version.attr,
353 &dev_attr_processor_flags.attr,
3e135d88
PO
354 NULL
355};
356
357static struct attribute_group mc_attr_group = {
871b72dd
DA
358 .attrs = mc_default_attrs,
359 .name = "microcode",
3e135d88
PO
360};
361
871b72dd 362static void microcode_fini_cpu(int cpu)
d45de409
DA
363{
364 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
365
d45de409
DA
366 microcode_ops->microcode_fini_cpu(cpu);
367 uci->valid = 0;
280a9ca5
DA
368}
369
871b72dd 370static enum ucode_state microcode_resume_cpu(int cpu)
d45de409
DA
371{
372 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
373
871b72dd
DA
374 if (!uci->mc)
375 return UCODE_NFOUND;
376
f58e1f53 377 pr_debug("CPU%d updated upon resume\n", cpu);
871b72dd
DA
378 apply_microcode_on_target(cpu);
379
380 return UCODE_OK;
d45de409
DA
381}
382
871b72dd 383static enum ucode_state microcode_init_cpu(int cpu)
d45de409 384{
871b72dd 385 enum ucode_state ustate;
d45de409 386
871b72dd
DA
387 if (collect_cpu_info(cpu))
388 return UCODE_ERROR;
d45de409 389
871b72dd
DA
390 /* --dimm. Trigger a delayed update? */
391 if (system_state != SYSTEM_RUNNING)
392 return UCODE_NFOUND;
d45de409 393
871b72dd 394 ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev);
d45de409 395
871b72dd 396 if (ustate == UCODE_OK) {
f58e1f53 397 pr_debug("CPU%d updated upon init\n", cpu);
871b72dd 398 apply_microcode_on_target(cpu);
d45de409
DA
399 }
400
871b72dd 401 return ustate;
d45de409
DA
402}
403
871b72dd 404static enum ucode_state microcode_update_cpu(int cpu)
d45de409 405{
871b72dd
DA
406 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
407 enum ucode_state ustate;
d45de409 408
2f99f5c8 409 if (uci->valid)
871b72dd
DA
410 ustate = microcode_resume_cpu(cpu);
411 else
412 ustate = microcode_init_cpu(cpu);
d45de409 413
871b72dd 414 return ustate;
d45de409
DA
415}
416
8a25a2fd 417static int mc_device_add(struct device *dev, struct subsys_interface *sif)
3e135d88 418{
8a25a2fd 419 int err, cpu = dev->id;
3e135d88
PO
420
421 if (!cpu_online(cpu))
422 return 0;
423
f58e1f53 424 pr_debug("CPU%d added\n", cpu);
3e135d88 425
8a25a2fd 426 err = sysfs_create_group(&dev->kobj, &mc_attr_group);
3e135d88
PO
427 if (err)
428 return err;
429
a956bd6f 430 if (microcode_init_cpu(cpu) == UCODE_ERROR)
6c53cbfc 431 return -EINVAL;
af5c820a
RR
432
433 return err;
3e135d88
PO
434}
435
8a25a2fd 436static int mc_device_remove(struct device *dev, struct subsys_interface *sif)
3e135d88 437{
8a25a2fd 438 int cpu = dev->id;
3e135d88
PO
439
440 if (!cpu_online(cpu))
441 return 0;
442
f58e1f53 443 pr_debug("CPU%d removed\n", cpu);
d45de409 444 microcode_fini_cpu(cpu);
8a25a2fd 445 sysfs_remove_group(&dev->kobj, &mc_attr_group);
3e135d88
PO
446 return 0;
447}
448
8a25a2fd
KS
449static struct subsys_interface mc_cpu_interface = {
450 .name = "microcode",
451 .subsys = &cpu_subsys,
452 .add_dev = mc_device_add,
453 .remove_dev = mc_device_remove,
f3c6ea1b
RW
454};
455
456/**
457 * mc_bp_resume - Update boot CPU microcode during resume.
458 */
459static void mc_bp_resume(void)
3e135d88 460{
f3c6ea1b 461 int cpu = smp_processor_id();
871b72dd 462 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
3e135d88 463
871b72dd
DA
464 if (uci->valid && uci->mc)
465 microcode_ops->apply_microcode(cpu);
3e135d88
PO
466}
467
f3c6ea1b
RW
468static struct syscore_ops mc_syscore_ops = {
469 .resume = mc_bp_resume,
3e135d88
PO
470};
471
472static __cpuinit int
473mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu)
474{
475 unsigned int cpu = (unsigned long)hcpu;
8a25a2fd 476 struct device *dev;
3e135d88 477
8a25a2fd 478 dev = get_cpu_device(cpu);
3e135d88 479 switch (action) {
3e135d88 480 case CPU_ONLINE:
3e135d88 481 case CPU_ONLINE_FROZEN:
871b72dd 482 microcode_update_cpu(cpu);
d45de409 483 case CPU_DOWN_FAILED:
3e135d88 484 case CPU_DOWN_FAILED_FROZEN:
f58e1f53 485 pr_debug("CPU%d added\n", cpu);
8a25a2fd 486 if (sysfs_create_group(&dev->kobj, &mc_attr_group))
f58e1f53 487 pr_err("Failed to create group for CPU%d\n", cpu);
3e135d88
PO
488 break;
489 case CPU_DOWN_PREPARE:
3e135d88
PO
490 case CPU_DOWN_PREPARE_FROZEN:
491 /* Suspend is in progress, only remove the interface */
8a25a2fd 492 sysfs_remove_group(&dev->kobj, &mc_attr_group);
f58e1f53 493 pr_debug("CPU%d removed\n", cpu);
d45de409 494 break;
70989449
SB
495
496 /*
497 * When a CPU goes offline, don't free up or invalidate the copy of
498 * the microcode in kernel memory, so that we can reuse it when the
499 * CPU comes back online without unnecessarily requesting the userspace
500 * for it again.
501 */
d45de409
DA
502 case CPU_UP_CANCELED_FROZEN:
503 /* The CPU refused to come up during a system resume */
504 microcode_fini_cpu(cpu);
3e135d88
PO
505 break;
506 }
507 return NOTIFY_OK;
508}
509
510static struct notifier_block __refdata mc_cpu_notifier = {
4bae1967 511 .notifier_call = mc_cpu_callback,
3e135d88
PO
512};
513
78ff123b
AK
514#ifdef MODULE
515/* Autoload on Intel and AMD systems */
e1b6fc55 516static const struct x86_cpu_id __initconst microcode_id[] = {
78ff123b
AK
517#ifdef CONFIG_MICROCODE_INTEL
518 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, },
519#endif
520#ifdef CONFIG_MICROCODE_AMD
521 { X86_VENDOR_AMD, X86_FAMILY_ANY, X86_MODEL_ANY, },
522#endif
523 {}
524};
525MODULE_DEVICE_TABLE(x86cpu, microcode_id);
526#endif
527
3d8986bc
BP
528static struct attribute *cpu_root_microcode_attrs[] = {
529 &dev_attr_reload.attr,
530 NULL
531};
532
533static struct attribute_group cpu_root_microcode_group = {
534 .name = "microcode",
535 .attrs = cpu_root_microcode_attrs,
536};
537
18dbc916 538static int __init microcode_init(void)
3e135d88 539{
18dbc916 540 struct cpuinfo_x86 *c = &cpu_data(0);
3e135d88
PO
541 int error;
542
18dbc916
DA
543 if (c->x86_vendor == X86_VENDOR_INTEL)
544 microcode_ops = init_intel_microcode();
82b07865 545 else if (c->x86_vendor == X86_VENDOR_AMD)
18dbc916 546 microcode_ops = init_amd_microcode();
283c1f25 547 else
f58e1f53 548 pr_err("no support for this CPU vendor\n");
283c1f25
AH
549
550 if (!microcode_ops)
18dbc916 551 return -ENODEV;
3e135d88 552
3e135d88
PO
553 microcode_pdev = platform_device_register_simple("microcode", -1,
554 NULL, 0);
bd399063 555 if (IS_ERR(microcode_pdev))
3e135d88 556 return PTR_ERR(microcode_pdev);
3e135d88
PO
557
558 get_online_cpus();
871b72dd
DA
559 mutex_lock(&microcode_mutex);
560
8a25a2fd 561 error = subsys_interface_register(&mc_cpu_interface);
c93dc84c
PZ
562 if (!error)
563 perf_check_microcode();
871b72dd 564 mutex_unlock(&microcode_mutex);
3e135d88 565 put_online_cpus();
871b72dd 566
bd399063
SB
567 if (error)
568 goto out_pdev;
3e135d88 569
3d8986bc
BP
570 error = sysfs_create_group(&cpu_subsys.dev_root->kobj,
571 &cpu_root_microcode_group);
572
573 if (error) {
574 pr_err("Error creating microcode group!\n");
575 goto out_driver;
576 }
577
871b72dd
DA
578 error = microcode_dev_init();
579 if (error)
3d8986bc 580 goto out_ucode_group;
871b72dd 581
f3c6ea1b 582 register_syscore_ops(&mc_syscore_ops);
3e135d88 583 register_hotcpu_notifier(&mc_cpu_notifier);
8d86f390 584
871b72dd 585 pr_info("Microcode Update Driver: v" MICROCODE_VERSION
f58e1f53 586 " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n");
8d86f390 587
3e135d88 588 return 0;
bd399063 589
3d8986bc
BP
590 out_ucode_group:
591 sysfs_remove_group(&cpu_subsys.dev_root->kobj,
592 &cpu_root_microcode_group);
593
594 out_driver:
bd399063
SB
595 get_online_cpus();
596 mutex_lock(&microcode_mutex);
597
ff4b8a57 598 subsys_interface_unregister(&mc_cpu_interface);
bd399063
SB
599
600 mutex_unlock(&microcode_mutex);
601 put_online_cpus();
602
3d8986bc 603 out_pdev:
bd399063
SB
604 platform_device_unregister(microcode_pdev);
605 return error;
606
3e135d88 607}
871b72dd 608module_init(microcode_init);
3e135d88 609
18dbc916 610static void __exit microcode_exit(void)
3e135d88 611{
f72c1a57
BP
612 struct cpuinfo_x86 *c = &cpu_data(0);
613
3e135d88
PO
614 microcode_dev_exit();
615
616 unregister_hotcpu_notifier(&mc_cpu_notifier);
4ac5fc6a 617 unregister_syscore_ops(&mc_syscore_ops);
3e135d88 618
3d8986bc
BP
619 sysfs_remove_group(&cpu_subsys.dev_root->kobj,
620 &cpu_root_microcode_group);
621
3e135d88 622 get_online_cpus();
871b72dd
DA
623 mutex_lock(&microcode_mutex);
624
8a25a2fd 625 subsys_interface_unregister(&mc_cpu_interface);
871b72dd
DA
626
627 mutex_unlock(&microcode_mutex);
3e135d88
PO
628 put_online_cpus();
629
630 platform_device_unregister(microcode_pdev);
3e135d88 631
8d86f390
PO
632 microcode_ops = NULL;
633
f72c1a57
BP
634 if (c->x86_vendor == X86_VENDOR_AMD)
635 exit_amd_microcode();
636
871b72dd 637 pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n");
8d86f390 638}
18dbc916 639module_exit(microcode_exit);