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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
dd3e6e8c TG |
3 | * Copyright (c) 1991,1992,1995 Linus Torvalds |
4 | * Copyright (c) 1994 Alan Modra | |
5 | * Copyright (c) 1995 Markus Kuhn | |
6 | * Copyright (c) 1996 Ingo Molnar | |
7 | * Copyright (c) 1998 Andrea Arcangeli | |
8 | * Copyright (c) 2002,2006 Vojtech Pavlik | |
9 | * Copyright (c) 2003 Andi Kleen | |
1da177e4 | 10 | * |
1da177e4 LT |
11 | */ |
12 | ||
2a21ad57 | 13 | #include <linux/clocksource.h> |
ecce8508 | 14 | #include <linux/clockchips.h> |
1da177e4 | 15 | #include <linux/interrupt.h> |
447ae316 | 16 | #include <linux/irq.h> |
334955ef | 17 | #include <linux/i8253.h> |
1da177e4 | 18 | #include <linux/time.h> |
69c60c88 | 19 | #include <linux/export.h> |
1da177e4 | 20 | |
dd3e6e8c TG |
21 | #include <asm/vsyscall.h> |
22 | #include <asm/x86_init.h> | |
ecce8508 | 23 | #include <asm/i8259.h> |
dd3e6e8c TG |
24 | #include <asm/timer.h> |
25 | #include <asm/hpet.h> | |
26 | #include <asm/time.h> | |
1da177e4 | 27 | |
454ede7e | 28 | #ifdef CONFIG_X86_64 |
53c13ba8 | 29 | __visible volatile unsigned long jiffies __cacheline_aligned_in_smp = INITIAL_JIFFIES; |
454ede7e TG |
30 | #endif |
31 | ||
1da177e4 LT |
32 | unsigned long profile_pc(struct pt_regs *regs) |
33 | { | |
34 | unsigned long pc = instruction_pointer(regs); | |
35 | ||
f39b6f0e | 36 | if (!user_mode(regs) && in_lock_functions(pc)) { |
0cb91a22 | 37 | #ifdef CONFIG_FRAME_POINTER |
2c460d0b | 38 | return *(unsigned long *)(regs->bp + sizeof(long)); |
0cb91a22 | 39 | #else |
d1705c55 PA |
40 | unsigned long *sp = |
41 | (unsigned long *)kernel_stack_pointer(regs); | |
ef451288 TG |
42 | /* |
43 | * Return address is either directly at stack pointer | |
44 | * or above a saved flags. Eflags has bits 22-31 zero, | |
45 | * kernel addresses don't. | |
46 | */ | |
fe599f9f | 47 | if (sp[0] >> 22) |
0cb91a22 AK |
48 | return sp[0]; |
49 | if (sp[1] >> 22) | |
50 | return sp[1]; | |
51 | #endif | |
52 | } | |
1da177e4 LT |
53 | return pc; |
54 | } | |
55 | EXPORT_SYMBOL(profile_pc); | |
1da177e4 LT |
56 | |
57 | /* | |
454ede7e | 58 | * Default timer interrupt handler for PIT/HPET |
1da177e4 | 59 | */ |
845b3944 | 60 | static irqreturn_t timer_interrupt(int irq, void *dev_id) |
1da177e4 | 61 | { |
ecce8508 | 62 | global_clock_event->event_handler(global_clock_event); |
1da177e4 LT |
63 | return IRQ_HANDLED; |
64 | } | |
65 | ||
845b3944 TG |
66 | static struct irqaction irq0 = { |
67 | .handler = timer_interrupt, | |
d20d2efb | 68 | .flags = IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, |
845b3944 TG |
69 | .name = "timer" |
70 | }; | |
71 | ||
b1b4f2fe | 72 | static void __init setup_default_timer_irq(void) |
845b3944 | 73 | { |
6d671e1b PZ |
74 | /* |
75 | * Unconditionally register the legacy timer; even without legacy | |
76 | * PIC/PIT we need this for the HPET0 in legacy replacement mode. | |
77 | */ | |
78 | if (setup_irq(0, &irq0)) | |
79 | pr_info("Failed to register legacy timer interrupt\n"); | |
845b3944 TG |
80 | } |
81 | ||
82 | /* Default timer init function */ | |
e30fab3a | 83 | void __init hpet_time_init(void) |
1da177e4 | 84 | { |
e9e2cdb4 TG |
85 | if (!hpet_enable()) |
86 | setup_pit_timer(); | |
845b3944 TG |
87 | setup_default_timer_irq(); |
88 | } | |
89 | ||
54e2603f | 90 | static __init void x86_late_time_init(void) |
845b3944 TG |
91 | { |
92 | x86_init.timers.timer_init(); | |
935356ce DL |
93 | /* |
94 | * After PIT/HPET timers init, select and setup | |
95 | * the final interrupt mode for delivering IRQs. | |
96 | */ | |
97 | x86_init.irqs.intr_mode_init(); | |
dd0a70c8 | 98 | tsc_init(); |
1da177e4 | 99 | } |
1da177e4 | 100 | |
e30fab3a | 101 | /* |
845b3944 TG |
102 | * Initialize TSC and delay the periodic timer init to |
103 | * late x86_late_time_init() so ioremap works. | |
e30fab3a | 104 | */ |
1da177e4 LT |
105 | void __init time_init(void) |
106 | { | |
845b3944 | 107 | late_time_init = x86_late_time_init; |
1da177e4 | 108 | } |
2a21ad57 TG |
109 | |
110 | /* | |
111 | * Sanity check the vdso related archdata content. | |
112 | */ | |
113 | void clocksource_arch_init(struct clocksource *cs) | |
114 | { | |
115 | if (cs->archdata.vclock_mode == VCLOCK_NONE) | |
116 | return; | |
117 | ||
118 | if (cs->archdata.vclock_mode > VCLOCK_MAX) { | |
119 | pr_warn("clocksource %s registered with invalid vclock_mode %d. Disabling vclock.\n", | |
120 | cs->name, cs->archdata.vclock_mode); | |
121 | cs->archdata.vclock_mode = VCLOCK_NONE; | |
122 | } | |
a51e996d TG |
123 | |
124 | if (cs->mask != CLOCKSOURCE_MASK(64)) { | |
125 | pr_warn("clocksource %s registered with invalid mask %016llx. Disabling vclock.\n", | |
126 | cs->name, cs->mask); | |
127 | cs->archdata.vclock_mode = VCLOCK_NONE; | |
128 | } | |
2a21ad57 | 129 | } |