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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
4f76cd38 | 2 | #include <linux/mm.h> |
5a0e3ad6 | 3 | #include <linux/gfp.h> |
4f76cd38 | 4 | #include <asm/pgalloc.h> |
ee5aa8d3 | 5 | #include <asm/pgtable.h> |
4f76cd38 | 6 | #include <asm/tlb.h> |
a1d5a869 | 7 | #include <asm/fixmap.h> |
6b637835 | 8 | #include <asm/mtrr.h> |
4f76cd38 | 9 | |
3e79ec7d | 10 | #define PGALLOC_GFP (GFP_KERNEL_ACCOUNT | __GFP_NOTRACK | __GFP_ZERO) |
9e730237 | 11 | |
14315592 IC |
12 | #ifdef CONFIG_HIGHPTE |
13 | #define PGALLOC_USER_GFP __GFP_HIGHMEM | |
14 | #else | |
15 | #define PGALLOC_USER_GFP 0 | |
16 | #endif | |
17 | ||
18 | gfp_t __userpte_alloc_gfp = PGALLOC_GFP | PGALLOC_USER_GFP; | |
19 | ||
4f76cd38 JF |
20 | pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) |
21 | { | |
3e79ec7d | 22 | return (pte_t *)__get_free_page(PGALLOC_GFP & ~__GFP_ACCOUNT); |
4f76cd38 JF |
23 | } |
24 | ||
25 | pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address) | |
26 | { | |
27 | struct page *pte; | |
28 | ||
14315592 | 29 | pte = alloc_pages(__userpte_alloc_gfp, 0); |
cecbd1b5 KS |
30 | if (!pte) |
31 | return NULL; | |
32 | if (!pgtable_page_ctor(pte)) { | |
33 | __free_page(pte); | |
34 | return NULL; | |
35 | } | |
4f76cd38 JF |
36 | return pte; |
37 | } | |
38 | ||
14315592 IC |
39 | static int __init setup_userpte(char *arg) |
40 | { | |
41 | if (!arg) | |
42 | return -EINVAL; | |
43 | ||
44 | /* | |
45 | * "userpte=nohigh" disables allocation of user pagetables in | |
46 | * high memory. | |
47 | */ | |
48 | if (strcmp(arg, "nohigh") == 0) | |
49 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
50 | else | |
51 | return -EINVAL; | |
52 | return 0; | |
53 | } | |
54 | early_param("userpte", setup_userpte); | |
55 | ||
9e1b32ca | 56 | void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte) |
397f687a JF |
57 | { |
58 | pgtable_page_dtor(pte); | |
6944a9c8 | 59 | paravirt_release_pte(page_to_pfn(pte)); |
9e52fc2b | 60 | tlb_remove_table(tlb, pte); |
397f687a JF |
61 | } |
62 | ||
98233368 | 63 | #if CONFIG_PGTABLE_LEVELS > 2 |
9e1b32ca | 64 | void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd) |
170fdff7 | 65 | { |
c283610e | 66 | struct page *page = virt_to_page(pmd); |
6944a9c8 | 67 | paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT); |
1de14c3c DH |
68 | /* |
69 | * NOTE! For PAE, any changes to the top page-directory-pointer-table | |
70 | * entries need a full cr3 reload to flush. | |
71 | */ | |
72 | #ifdef CONFIG_X86_PAE | |
73 | tlb->need_flush_all = 1; | |
74 | #endif | |
c283610e | 75 | pgtable_pmd_page_dtor(page); |
9e52fc2b | 76 | tlb_remove_table(tlb, page); |
170fdff7 | 77 | } |
5a5f8f42 | 78 | |
98233368 | 79 | #if CONFIG_PGTABLE_LEVELS > 3 |
9e1b32ca | 80 | void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud) |
5a5f8f42 | 81 | { |
2761fa09 | 82 | paravirt_release_pud(__pa(pud) >> PAGE_SHIFT); |
9e52fc2b | 83 | tlb_remove_table(tlb, virt_to_page(pud)); |
5a5f8f42 | 84 | } |
b8504058 KS |
85 | |
86 | #if CONFIG_PGTABLE_LEVELS > 4 | |
87 | void ___p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d) | |
88 | { | |
89 | paravirt_release_p4d(__pa(p4d) >> PAGE_SHIFT); | |
9e52fc2b | 90 | tlb_remove_table(tlb, virt_to_page(p4d)); |
b8504058 KS |
91 | } |
92 | #endif /* CONFIG_PGTABLE_LEVELS > 4 */ | |
98233368 KS |
93 | #endif /* CONFIG_PGTABLE_LEVELS > 3 */ |
94 | #endif /* CONFIG_PGTABLE_LEVELS > 2 */ | |
170fdff7 | 95 | |
4f76cd38 JF |
96 | static inline void pgd_list_add(pgd_t *pgd) |
97 | { | |
98 | struct page *page = virt_to_page(pgd); | |
4f76cd38 | 99 | |
4f76cd38 | 100 | list_add(&page->lru, &pgd_list); |
4f76cd38 JF |
101 | } |
102 | ||
103 | static inline void pgd_list_del(pgd_t *pgd) | |
104 | { | |
105 | struct page *page = virt_to_page(pgd); | |
4f76cd38 | 106 | |
4f76cd38 | 107 | list_del(&page->lru); |
4f76cd38 JF |
108 | } |
109 | ||
4f76cd38 | 110 | #define UNSHARED_PTRS_PER_PGD \ |
68db065c | 111 | (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD) |
4f76cd38 | 112 | |
617d34d9 JF |
113 | |
114 | static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm) | |
115 | { | |
116 | BUILD_BUG_ON(sizeof(virt_to_page(pgd)->index) < sizeof(mm)); | |
117 | virt_to_page(pgd)->index = (pgoff_t)mm; | |
118 | } | |
119 | ||
120 | struct mm_struct *pgd_page_get_mm(struct page *page) | |
121 | { | |
122 | return (struct mm_struct *)page->index; | |
123 | } | |
124 | ||
125 | static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd) | |
4f76cd38 | 126 | { |
4f76cd38 JF |
127 | /* If the pgd points to a shared pagetable level (either the |
128 | ptes in non-PAE, or shared PMD in PAE), then just copy the | |
129 | references from swapper_pg_dir. */ | |
98233368 KS |
130 | if (CONFIG_PGTABLE_LEVELS == 2 || |
131 | (CONFIG_PGTABLE_LEVELS == 3 && SHARED_KERNEL_PMD) || | |
b8504058 | 132 | CONFIG_PGTABLE_LEVELS >= 4) { |
68db065c JF |
133 | clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY, |
134 | swapper_pg_dir + KERNEL_PGD_BOUNDARY, | |
4f76cd38 | 135 | KERNEL_PGD_PTRS); |
4f76cd38 JF |
136 | } |
137 | ||
138 | /* list required to sync kernel mapping updates */ | |
617d34d9 JF |
139 | if (!SHARED_KERNEL_PMD) { |
140 | pgd_set_mm(pgd, mm); | |
4f76cd38 | 141 | pgd_list_add(pgd); |
617d34d9 | 142 | } |
4f76cd38 JF |
143 | } |
144 | ||
17b74627 | 145 | static void pgd_dtor(pgd_t *pgd) |
4f76cd38 | 146 | { |
4f76cd38 JF |
147 | if (SHARED_KERNEL_PMD) |
148 | return; | |
149 | ||
a79e53d8 | 150 | spin_lock(&pgd_lock); |
4f76cd38 | 151 | pgd_list_del(pgd); |
a79e53d8 | 152 | spin_unlock(&pgd_lock); |
4f76cd38 JF |
153 | } |
154 | ||
85958b46 JF |
155 | /* |
156 | * List of all pgd's needed for non-PAE so it can invalidate entries | |
157 | * in both cached and uncached pgd's; not needed for PAE since the | |
158 | * kernel pmd is shared. If PAE were not to share the pmd a similar | |
159 | * tactic would be needed. This is essentially codepath-based locking | |
160 | * against pageattr.c; it is the unique case in which a valid change | |
161 | * of kernel pagetables can't be lazily synchronized by vmalloc faults. | |
162 | * vmalloc faults work because attached pagetables are never freed. | |
6d49e352 | 163 | * -- nyc |
85958b46 JF |
164 | */ |
165 | ||
4f76cd38 | 166 | #ifdef CONFIG_X86_PAE |
d8d5900e JF |
167 | /* |
168 | * In PAE mode, we need to do a cr3 reload (=tlb flush) when | |
169 | * updating the top-level pagetable entries to guarantee the | |
170 | * processor notices the update. Since this is expensive, and | |
171 | * all 4 top-level entries are used almost immediately in a | |
172 | * new process's life, we just pre-populate them here. | |
173 | * | |
174 | * Also, if we're in a paravirt environment where the kernel pmd is | |
175 | * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate | |
176 | * and initialize the kernel pmds here. | |
177 | */ | |
178 | #define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD | |
179 | ||
180 | void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd) | |
181 | { | |
182 | paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT); | |
183 | ||
184 | /* Note: almost everything apart from _PAGE_PRESENT is | |
185 | reserved at the pmd (PDPT) level. */ | |
186 | set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT)); | |
187 | ||
188 | /* | |
189 | * According to Intel App note "TLBs, Paging-Structure Caches, | |
190 | * and Their Invalidation", April 2007, document 317080-001, | |
191 | * section 8.1: in PAE mode we explicitly have to flush the | |
192 | * TLB via cr3 if the top-level pgd is changed... | |
193 | */ | |
4981d01e | 194 | flush_tlb_mm(mm); |
d8d5900e JF |
195 | } |
196 | #else /* !CONFIG_X86_PAE */ | |
197 | ||
198 | /* No need to prepopulate any pagetable entries in non-PAE modes. */ | |
199 | #define PREALLOCATED_PMDS 0 | |
200 | ||
201 | #endif /* CONFIG_X86_PAE */ | |
202 | ||
dc6c9a35 | 203 | static void free_pmds(struct mm_struct *mm, pmd_t *pmds[]) |
d8d5900e JF |
204 | { |
205 | int i; | |
206 | ||
207 | for(i = 0; i < PREALLOCATED_PMDS; i++) | |
09ef4939 KS |
208 | if (pmds[i]) { |
209 | pgtable_pmd_page_dtor(virt_to_page(pmds[i])); | |
d8d5900e | 210 | free_page((unsigned long)pmds[i]); |
dc6c9a35 | 211 | mm_dec_nr_pmds(mm); |
09ef4939 | 212 | } |
d8d5900e JF |
213 | } |
214 | ||
dc6c9a35 | 215 | static int preallocate_pmds(struct mm_struct *mm, pmd_t *pmds[]) |
d8d5900e JF |
216 | { |
217 | int i; | |
218 | bool failed = false; | |
3e79ec7d VD |
219 | gfp_t gfp = PGALLOC_GFP; |
220 | ||
221 | if (mm == &init_mm) | |
222 | gfp &= ~__GFP_ACCOUNT; | |
d8d5900e JF |
223 | |
224 | for(i = 0; i < PREALLOCATED_PMDS; i++) { | |
3e79ec7d | 225 | pmd_t *pmd = (pmd_t *)__get_free_page(gfp); |
09ef4939 | 226 | if (!pmd) |
d8d5900e | 227 | failed = true; |
09ef4939 | 228 | if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) { |
2a46eed5 | 229 | free_page((unsigned long)pmd); |
09ef4939 KS |
230 | pmd = NULL; |
231 | failed = true; | |
232 | } | |
dc6c9a35 KS |
233 | if (pmd) |
234 | mm_inc_nr_pmds(mm); | |
d8d5900e JF |
235 | pmds[i] = pmd; |
236 | } | |
237 | ||
238 | if (failed) { | |
dc6c9a35 | 239 | free_pmds(mm, pmds); |
d8d5900e JF |
240 | return -ENOMEM; |
241 | } | |
242 | ||
243 | return 0; | |
244 | } | |
245 | ||
4f76cd38 JF |
246 | /* |
247 | * Mop up any pmd pages which may still be attached to the pgd. | |
248 | * Normally they will be freed by munmap/exit_mmap, but any pmd we | |
249 | * preallocate which never got a corresponding vma will need to be | |
250 | * freed manually. | |
251 | */ | |
252 | static void pgd_mop_up_pmds(struct mm_struct *mm, pgd_t *pgdp) | |
253 | { | |
254 | int i; | |
255 | ||
d8d5900e | 256 | for(i = 0; i < PREALLOCATED_PMDS; i++) { |
4f76cd38 JF |
257 | pgd_t pgd = pgdp[i]; |
258 | ||
259 | if (pgd_val(pgd) != 0) { | |
260 | pmd_t *pmd = (pmd_t *)pgd_page_vaddr(pgd); | |
261 | ||
262 | pgdp[i] = native_make_pgd(0); | |
263 | ||
6944a9c8 | 264 | paravirt_release_pmd(pgd_val(pgd) >> PAGE_SHIFT); |
4f76cd38 | 265 | pmd_free(mm, pmd); |
dc6c9a35 | 266 | mm_dec_nr_pmds(mm); |
4f76cd38 JF |
267 | } |
268 | } | |
269 | } | |
270 | ||
d8d5900e | 271 | static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[]) |
4f76cd38 | 272 | { |
e0c4f675 | 273 | p4d_t *p4d; |
4f76cd38 | 274 | pud_t *pud; |
4f76cd38 JF |
275 | int i; |
276 | ||
cf3e5050 JF |
277 | if (PREALLOCATED_PMDS == 0) /* Work around gcc-3.4.x bug */ |
278 | return; | |
279 | ||
e0c4f675 KS |
280 | p4d = p4d_offset(pgd, 0); |
281 | pud = pud_offset(p4d, 0); | |
4f76cd38 | 282 | |
73b44ff4 | 283 | for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) { |
d8d5900e | 284 | pmd_t *pmd = pmds[i]; |
4f76cd38 | 285 | |
68db065c | 286 | if (i >= KERNEL_PGD_BOUNDARY) |
4f76cd38 JF |
287 | memcpy(pmd, (pmd_t *)pgd_page_vaddr(swapper_pg_dir[i]), |
288 | sizeof(pmd_t) * PTRS_PER_PMD); | |
289 | ||
290 | pud_populate(mm, pud, pmd); | |
291 | } | |
4f76cd38 | 292 | } |
1ec1fe73 | 293 | |
1db491f7 FY |
294 | /* |
295 | * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also | |
296 | * assumes that pgd should be in one page. | |
297 | * | |
298 | * But kernel with PAE paging that is not running as a Xen domain | |
299 | * only needs to allocate 32 bytes for pgd instead of one page. | |
300 | */ | |
301 | #ifdef CONFIG_X86_PAE | |
302 | ||
303 | #include <linux/slab.h> | |
304 | ||
305 | #define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t)) | |
306 | #define PGD_ALIGN 32 | |
307 | ||
308 | static struct kmem_cache *pgd_cache; | |
309 | ||
310 | static int __init pgd_cache_init(void) | |
311 | { | |
312 | /* | |
313 | * When PAE kernel is running as a Xen domain, it does not use | |
314 | * shared kernel pmd. And this requires a whole page for pgd. | |
315 | */ | |
316 | if (!SHARED_KERNEL_PMD) | |
317 | return 0; | |
318 | ||
319 | /* | |
320 | * when PAE kernel is not running as a Xen domain, it uses | |
321 | * shared kernel pmd. Shared kernel pmd does not require a whole | |
322 | * page for pgd. We are able to just allocate a 32-byte for pgd. | |
323 | * During boot time, we create a 32-byte slab for pgd table allocation. | |
324 | */ | |
325 | pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN, | |
326 | SLAB_PANIC, NULL); | |
327 | if (!pgd_cache) | |
328 | return -ENOMEM; | |
329 | ||
330 | return 0; | |
331 | } | |
332 | core_initcall(pgd_cache_init); | |
333 | ||
334 | static inline pgd_t *_pgd_alloc(void) | |
335 | { | |
336 | /* | |
337 | * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain. | |
338 | * We allocate one page for pgd. | |
339 | */ | |
340 | if (!SHARED_KERNEL_PMD) | |
341 | return (pgd_t *)__get_free_page(PGALLOC_GFP); | |
342 | ||
343 | /* | |
344 | * Now PAE kernel is not running as a Xen domain. We can allocate | |
345 | * a 32-byte slab for pgd to save memory space. | |
346 | */ | |
347 | return kmem_cache_alloc(pgd_cache, PGALLOC_GFP); | |
348 | } | |
349 | ||
350 | static inline void _pgd_free(pgd_t *pgd) | |
351 | { | |
352 | if (!SHARED_KERNEL_PMD) | |
353 | free_page((unsigned long)pgd); | |
354 | else | |
355 | kmem_cache_free(pgd_cache, pgd); | |
356 | } | |
357 | #else | |
358 | static inline pgd_t *_pgd_alloc(void) | |
359 | { | |
360 | return (pgd_t *)__get_free_page(PGALLOC_GFP); | |
361 | } | |
362 | ||
363 | static inline void _pgd_free(pgd_t *pgd) | |
364 | { | |
365 | free_page((unsigned long)pgd); | |
366 | } | |
367 | #endif /* CONFIG_X86_PAE */ | |
368 | ||
d8d5900e | 369 | pgd_t *pgd_alloc(struct mm_struct *mm) |
1ec1fe73 | 370 | { |
d8d5900e JF |
371 | pgd_t *pgd; |
372 | pmd_t *pmds[PREALLOCATED_PMDS]; | |
1ec1fe73 | 373 | |
1db491f7 | 374 | pgd = _pgd_alloc(); |
d8d5900e JF |
375 | |
376 | if (pgd == NULL) | |
377 | goto out; | |
378 | ||
379 | mm->pgd = pgd; | |
380 | ||
dc6c9a35 | 381 | if (preallocate_pmds(mm, pmds) != 0) |
d8d5900e JF |
382 | goto out_free_pgd; |
383 | ||
384 | if (paravirt_pgd_alloc(mm) != 0) | |
385 | goto out_free_pmds; | |
1ec1fe73 IM |
386 | |
387 | /* | |
d8d5900e JF |
388 | * Make sure that pre-populating the pmds is atomic with |
389 | * respect to anything walking the pgd_list, so that they | |
390 | * never see a partially populated pgd. | |
1ec1fe73 | 391 | */ |
a79e53d8 | 392 | spin_lock(&pgd_lock); |
4f76cd38 | 393 | |
617d34d9 | 394 | pgd_ctor(mm, pgd); |
d8d5900e | 395 | pgd_prepopulate_pmd(mm, pgd, pmds); |
4f76cd38 | 396 | |
a79e53d8 | 397 | spin_unlock(&pgd_lock); |
4f76cd38 JF |
398 | |
399 | return pgd; | |
d8d5900e JF |
400 | |
401 | out_free_pmds: | |
dc6c9a35 | 402 | free_pmds(mm, pmds); |
d8d5900e | 403 | out_free_pgd: |
1db491f7 | 404 | _pgd_free(pgd); |
d8d5900e JF |
405 | out: |
406 | return NULL; | |
4f76cd38 JF |
407 | } |
408 | ||
409 | void pgd_free(struct mm_struct *mm, pgd_t *pgd) | |
410 | { | |
411 | pgd_mop_up_pmds(mm, pgd); | |
412 | pgd_dtor(pgd); | |
eba0045f | 413 | paravirt_pgd_free(mm, pgd); |
1db491f7 | 414 | _pgd_free(pgd); |
4f76cd38 | 415 | } |
ee5aa8d3 | 416 | |
0f9a921c RR |
417 | /* |
418 | * Used to set accessed or dirty bits in the page table entries | |
419 | * on other architectures. On x86, the accessed and dirty bits | |
420 | * are tracked by hardware. However, do_wp_page calls this function | |
421 | * to also make the pte writeable at the same time the dirty bit is | |
422 | * set. In that case we do actually need to write the PTE. | |
423 | */ | |
ee5aa8d3 JF |
424 | int ptep_set_access_flags(struct vm_area_struct *vma, |
425 | unsigned long address, pte_t *ptep, | |
426 | pte_t entry, int dirty) | |
427 | { | |
428 | int changed = !pte_same(*ptep, entry); | |
429 | ||
87930019 | 430 | if (changed && dirty) |
ee5aa8d3 | 431 | *ptep = entry; |
ee5aa8d3 JF |
432 | |
433 | return changed; | |
434 | } | |
f9fbf1a3 | 435 | |
db3eb96f AA |
436 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
437 | int pmdp_set_access_flags(struct vm_area_struct *vma, | |
438 | unsigned long address, pmd_t *pmdp, | |
439 | pmd_t entry, int dirty) | |
440 | { | |
441 | int changed = !pmd_same(*pmdp, entry); | |
442 | ||
443 | VM_BUG_ON(address & ~HPAGE_PMD_MASK); | |
444 | ||
445 | if (changed && dirty) { | |
446 | *pmdp = entry; | |
5e4bf1a5 IM |
447 | /* |
448 | * We had a write-protection fault here and changed the pmd | |
449 | * to to more permissive. No need to flush the TLB for that, | |
450 | * #PF is architecturally guaranteed to do that and in the | |
451 | * worst-case we'll generate a spurious fault. | |
452 | */ | |
db3eb96f AA |
453 | } |
454 | ||
455 | return changed; | |
456 | } | |
a00cc7d9 MW |
457 | |
458 | int pudp_set_access_flags(struct vm_area_struct *vma, unsigned long address, | |
459 | pud_t *pudp, pud_t entry, int dirty) | |
460 | { | |
461 | int changed = !pud_same(*pudp, entry); | |
462 | ||
463 | VM_BUG_ON(address & ~HPAGE_PUD_MASK); | |
464 | ||
465 | if (changed && dirty) { | |
466 | *pudp = entry; | |
467 | /* | |
468 | * We had a write-protection fault here and changed the pud | |
469 | * to to more permissive. No need to flush the TLB for that, | |
470 | * #PF is architecturally guaranteed to do that and in the | |
471 | * worst-case we'll generate a spurious fault. | |
472 | */ | |
473 | } | |
474 | ||
475 | return changed; | |
476 | } | |
db3eb96f AA |
477 | #endif |
478 | ||
f9fbf1a3 JF |
479 | int ptep_test_and_clear_young(struct vm_area_struct *vma, |
480 | unsigned long addr, pte_t *ptep) | |
481 | { | |
482 | int ret = 0; | |
483 | ||
484 | if (pte_young(*ptep)) | |
485 | ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, | |
48e23957 | 486 | (unsigned long *) &ptep->pte); |
f9fbf1a3 | 487 | |
f9fbf1a3 JF |
488 | return ret; |
489 | } | |
c20311e1 | 490 | |
db3eb96f AA |
491 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
492 | int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
493 | unsigned long addr, pmd_t *pmdp) | |
494 | { | |
495 | int ret = 0; | |
496 | ||
497 | if (pmd_young(*pmdp)) | |
498 | ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, | |
f2d6bfe9 | 499 | (unsigned long *)pmdp); |
db3eb96f | 500 | |
db3eb96f AA |
501 | return ret; |
502 | } | |
a00cc7d9 MW |
503 | int pudp_test_and_clear_young(struct vm_area_struct *vma, |
504 | unsigned long addr, pud_t *pudp) | |
505 | { | |
506 | int ret = 0; | |
507 | ||
508 | if (pud_young(*pudp)) | |
509 | ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, | |
510 | (unsigned long *)pudp); | |
511 | ||
512 | return ret; | |
513 | } | |
db3eb96f AA |
514 | #endif |
515 | ||
c20311e1 JF |
516 | int ptep_clear_flush_young(struct vm_area_struct *vma, |
517 | unsigned long address, pte_t *ptep) | |
518 | { | |
b13b1d2d SL |
519 | /* |
520 | * On x86 CPUs, clearing the accessed bit without a TLB flush | |
521 | * doesn't cause data corruption. [ It could cause incorrect | |
522 | * page aging and the (mistaken) reclaim of hot pages, but the | |
523 | * chance of that should be relatively low. ] | |
524 | * | |
525 | * So as a performance optimization don't flush the TLB when | |
526 | * clearing the accessed bit, it will eventually be flushed by | |
527 | * a context switch or a VM operation anyway. [ In the rare | |
528 | * event of it not getting flushed for a long time the delay | |
529 | * shouldn't really matter because there's no real memory | |
530 | * pressure for swapout to react to. ] | |
531 | */ | |
532 | return ptep_test_and_clear_young(vma, address, ptep); | |
c20311e1 | 533 | } |
7c7e6e07 | 534 | |
db3eb96f AA |
535 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
536 | int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
537 | unsigned long address, pmd_t *pmdp) | |
538 | { | |
539 | int young; | |
540 | ||
541 | VM_BUG_ON(address & ~HPAGE_PMD_MASK); | |
542 | ||
543 | young = pmdp_test_and_clear_young(vma, address, pmdp); | |
544 | if (young) | |
545 | flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE); | |
546 | ||
547 | return young; | |
548 | } | |
db3eb96f AA |
549 | #endif |
550 | ||
fd862dde GP |
551 | /** |
552 | * reserve_top_address - reserves a hole in the top of kernel address space | |
553 | * @reserve - size of hole to reserve | |
554 | * | |
555 | * Can be used to relocate the fixmap area and poke a hole in the top | |
556 | * of kernel address space to make room for a hypervisor. | |
557 | */ | |
558 | void __init reserve_top_address(unsigned long reserve) | |
559 | { | |
560 | #ifdef CONFIG_X86_32 | |
561 | BUG_ON(fixmaps_set > 0); | |
73159fdc AL |
562 | __FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE; |
563 | printk(KERN_INFO "Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n", | |
564 | -reserve, __FIXADDR_TOP + PAGE_SIZE); | |
fd862dde GP |
565 | #endif |
566 | } | |
567 | ||
7c7e6e07 JF |
568 | int fixmaps_set; |
569 | ||
aeaaa59c | 570 | void __native_set_fixmap(enum fixed_addresses idx, pte_t pte) |
7c7e6e07 JF |
571 | { |
572 | unsigned long address = __fix_to_virt(idx); | |
573 | ||
574 | if (idx >= __end_of_fixed_addresses) { | |
575 | BUG(); | |
576 | return; | |
577 | } | |
aeaaa59c | 578 | set_pte_vaddr(address, pte); |
7c7e6e07 JF |
579 | fixmaps_set++; |
580 | } | |
aeaaa59c | 581 | |
3b3809ac MH |
582 | void native_set_fixmap(enum fixed_addresses idx, phys_addr_t phys, |
583 | pgprot_t flags) | |
aeaaa59c JF |
584 | { |
585 | __native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags)); | |
586 | } | |
6b637835 TK |
587 | |
588 | #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP | |
b8504058 KS |
589 | #ifdef CONFIG_X86_5LEVEL |
590 | /** | |
591 | * p4d_set_huge - setup kernel P4D mapping | |
592 | * | |
593 | * No 512GB pages yet -- always return 0 | |
594 | */ | |
595 | int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) | |
596 | { | |
597 | return 0; | |
598 | } | |
599 | ||
600 | /** | |
601 | * p4d_clear_huge - clear kernel P4D mapping when it is set | |
602 | * | |
603 | * No 512GB pages yet -- always return 0 | |
604 | */ | |
605 | int p4d_clear_huge(p4d_t *p4d) | |
606 | { | |
607 | return 0; | |
608 | } | |
609 | #endif | |
610 | ||
3d3ca416 TK |
611 | /** |
612 | * pud_set_huge - setup kernel PUD mapping | |
613 | * | |
b73522e0 TK |
614 | * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this |
615 | * function sets up a huge page only if any of the following conditions are met: | |
616 | * | |
617 | * - MTRRs are disabled, or | |
618 | * | |
619 | * - MTRRs are enabled and the range is completely covered by a single MTRR, or | |
620 | * | |
621 | * - MTRRs are enabled and the corresponding MTRR memory type is WB, which | |
622 | * has no effect on the requested PAT memory type. | |
623 | * | |
624 | * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger | |
625 | * page mapping attempt fails. | |
3d3ca416 TK |
626 | * |
627 | * Returns 1 on success and 0 on failure. | |
628 | */ | |
6b637835 TK |
629 | int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot) |
630 | { | |
b73522e0 | 631 | u8 mtrr, uniform; |
6b637835 | 632 | |
b73522e0 TK |
633 | mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE, &uniform); |
634 | if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) && | |
635 | (mtrr != MTRR_TYPE_WRBACK)) | |
6b637835 TK |
636 | return 0; |
637 | ||
638 | prot = pgprot_4k_2_large(prot); | |
639 | ||
640 | set_pte((pte_t *)pud, pfn_pte( | |
641 | (u64)addr >> PAGE_SHIFT, | |
642 | __pgprot(pgprot_val(prot) | _PAGE_PSE))); | |
643 | ||
644 | return 1; | |
645 | } | |
646 | ||
3d3ca416 TK |
647 | /** |
648 | * pmd_set_huge - setup kernel PMD mapping | |
649 | * | |
b73522e0 | 650 | * See text over pud_set_huge() above. |
3d3ca416 TK |
651 | * |
652 | * Returns 1 on success and 0 on failure. | |
653 | */ | |
6b637835 TK |
654 | int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot) |
655 | { | |
b73522e0 | 656 | u8 mtrr, uniform; |
6b637835 | 657 | |
b73522e0 TK |
658 | mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE, &uniform); |
659 | if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) && | |
660 | (mtrr != MTRR_TYPE_WRBACK)) { | |
661 | pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n", | |
662 | __func__, addr, addr + PMD_SIZE); | |
6b637835 | 663 | return 0; |
b73522e0 | 664 | } |
6b637835 TK |
665 | |
666 | prot = pgprot_4k_2_large(prot); | |
667 | ||
668 | set_pte((pte_t *)pmd, pfn_pte( | |
669 | (u64)addr >> PAGE_SHIFT, | |
670 | __pgprot(pgprot_val(prot) | _PAGE_PSE))); | |
671 | ||
672 | return 1; | |
673 | } | |
674 | ||
3d3ca416 TK |
675 | /** |
676 | * pud_clear_huge - clear kernel PUD mapping when it is set | |
677 | * | |
678 | * Returns 1 on success and 0 on failure (no PUD map is found). | |
679 | */ | |
6b637835 TK |
680 | int pud_clear_huge(pud_t *pud) |
681 | { | |
682 | if (pud_large(*pud)) { | |
683 | pud_clear(pud); | |
684 | return 1; | |
685 | } | |
686 | ||
687 | return 0; | |
688 | } | |
689 | ||
3d3ca416 TK |
690 | /** |
691 | * pmd_clear_huge - clear kernel PMD mapping when it is set | |
692 | * | |
693 | * Returns 1 on success and 0 on failure (no PMD map is found). | |
694 | */ | |
6b637835 TK |
695 | int pmd_clear_huge(pmd_t *pmd) |
696 | { | |
697 | if (pmd_large(*pmd)) { | |
698 | pmd_clear(pmd); | |
699 | return 1; | |
700 | } | |
701 | ||
702 | return 0; | |
703 | } | |
704 | #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */ |