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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
4f76cd38 | 2 | #include <linux/mm.h> |
5a0e3ad6 | 3 | #include <linux/gfp.h> |
e3e28812 | 4 | #include <linux/hugetlb.h> |
4f76cd38 | 5 | #include <asm/pgalloc.h> |
ee5aa8d3 | 6 | #include <asm/pgtable.h> |
4f76cd38 | 7 | #include <asm/tlb.h> |
a1d5a869 | 8 | #include <asm/fixmap.h> |
6b637835 | 9 | #include <asm/mtrr.h> |
4f76cd38 | 10 | |
94d49eb3 KS |
11 | #ifdef CONFIG_DYNAMIC_PHYSICAL_MASK |
12 | phys_addr_t physical_mask __ro_after_init = (1ULL << __PHYSICAL_MASK_SHIFT) - 1; | |
13 | EXPORT_SYMBOL(physical_mask); | |
14 | #endif | |
15 | ||
75f296d9 | 16 | #define PGALLOC_GFP (GFP_KERNEL_ACCOUNT | __GFP_ZERO) |
9e730237 | 17 | |
14315592 IC |
18 | #ifdef CONFIG_HIGHPTE |
19 | #define PGALLOC_USER_GFP __GFP_HIGHMEM | |
20 | #else | |
21 | #define PGALLOC_USER_GFP 0 | |
22 | #endif | |
23 | ||
24 | gfp_t __userpte_alloc_gfp = PGALLOC_GFP | PGALLOC_USER_GFP; | |
25 | ||
4f76cd38 JF |
26 | pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) |
27 | { | |
3e79ec7d | 28 | return (pte_t *)__get_free_page(PGALLOC_GFP & ~__GFP_ACCOUNT); |
4f76cd38 JF |
29 | } |
30 | ||
31 | pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address) | |
32 | { | |
33 | struct page *pte; | |
34 | ||
14315592 | 35 | pte = alloc_pages(__userpte_alloc_gfp, 0); |
cecbd1b5 KS |
36 | if (!pte) |
37 | return NULL; | |
38 | if (!pgtable_page_ctor(pte)) { | |
39 | __free_page(pte); | |
40 | return NULL; | |
41 | } | |
4f76cd38 JF |
42 | return pte; |
43 | } | |
44 | ||
14315592 IC |
45 | static int __init setup_userpte(char *arg) |
46 | { | |
47 | if (!arg) | |
48 | return -EINVAL; | |
49 | ||
50 | /* | |
51 | * "userpte=nohigh" disables allocation of user pagetables in | |
52 | * high memory. | |
53 | */ | |
54 | if (strcmp(arg, "nohigh") == 0) | |
55 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
56 | else | |
57 | return -EINVAL; | |
58 | return 0; | |
59 | } | |
60 | early_param("userpte", setup_userpte); | |
61 | ||
9e1b32ca | 62 | void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte) |
397f687a JF |
63 | { |
64 | pgtable_page_dtor(pte); | |
6944a9c8 | 65 | paravirt_release_pte(page_to_pfn(pte)); |
48a8b97c | 66 | paravirt_tlb_remove_table(tlb, pte); |
397f687a JF |
67 | } |
68 | ||
98233368 | 69 | #if CONFIG_PGTABLE_LEVELS > 2 |
9e1b32ca | 70 | void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd) |
170fdff7 | 71 | { |
c283610e | 72 | struct page *page = virt_to_page(pmd); |
6944a9c8 | 73 | paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT); |
1de14c3c DH |
74 | /* |
75 | * NOTE! For PAE, any changes to the top page-directory-pointer-table | |
76 | * entries need a full cr3 reload to flush. | |
77 | */ | |
78 | #ifdef CONFIG_X86_PAE | |
79 | tlb->need_flush_all = 1; | |
80 | #endif | |
c283610e | 81 | pgtable_pmd_page_dtor(page); |
48a8b97c | 82 | paravirt_tlb_remove_table(tlb, page); |
170fdff7 | 83 | } |
5a5f8f42 | 84 | |
98233368 | 85 | #if CONFIG_PGTABLE_LEVELS > 3 |
9e1b32ca | 86 | void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud) |
5a5f8f42 | 87 | { |
2761fa09 | 88 | paravirt_release_pud(__pa(pud) >> PAGE_SHIFT); |
48a8b97c | 89 | paravirt_tlb_remove_table(tlb, virt_to_page(pud)); |
5a5f8f42 | 90 | } |
b8504058 KS |
91 | |
92 | #if CONFIG_PGTABLE_LEVELS > 4 | |
93 | void ___p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d) | |
94 | { | |
95 | paravirt_release_p4d(__pa(p4d) >> PAGE_SHIFT); | |
48a8b97c | 96 | paravirt_tlb_remove_table(tlb, virt_to_page(p4d)); |
b8504058 KS |
97 | } |
98 | #endif /* CONFIG_PGTABLE_LEVELS > 4 */ | |
98233368 KS |
99 | #endif /* CONFIG_PGTABLE_LEVELS > 3 */ |
100 | #endif /* CONFIG_PGTABLE_LEVELS > 2 */ | |
170fdff7 | 101 | |
4f76cd38 JF |
102 | static inline void pgd_list_add(pgd_t *pgd) |
103 | { | |
104 | struct page *page = virt_to_page(pgd); | |
4f76cd38 | 105 | |
4f76cd38 | 106 | list_add(&page->lru, &pgd_list); |
4f76cd38 JF |
107 | } |
108 | ||
109 | static inline void pgd_list_del(pgd_t *pgd) | |
110 | { | |
111 | struct page *page = virt_to_page(pgd); | |
4f76cd38 | 112 | |
4f76cd38 | 113 | list_del(&page->lru); |
4f76cd38 JF |
114 | } |
115 | ||
4f76cd38 | 116 | #define UNSHARED_PTRS_PER_PGD \ |
68db065c | 117 | (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD) |
4f76cd38 | 118 | |
617d34d9 JF |
119 | |
120 | static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm) | |
121 | { | |
a052f0a5 | 122 | virt_to_page(pgd)->pt_mm = mm; |
617d34d9 JF |
123 | } |
124 | ||
125 | struct mm_struct *pgd_page_get_mm(struct page *page) | |
126 | { | |
a052f0a5 | 127 | return page->pt_mm; |
617d34d9 JF |
128 | } |
129 | ||
130 | static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd) | |
4f76cd38 | 131 | { |
4f76cd38 JF |
132 | /* If the pgd points to a shared pagetable level (either the |
133 | ptes in non-PAE, or shared PMD in PAE), then just copy the | |
134 | references from swapper_pg_dir. */ | |
98233368 KS |
135 | if (CONFIG_PGTABLE_LEVELS == 2 || |
136 | (CONFIG_PGTABLE_LEVELS == 3 && SHARED_KERNEL_PMD) || | |
b8504058 | 137 | CONFIG_PGTABLE_LEVELS >= 4) { |
68db065c JF |
138 | clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY, |
139 | swapper_pg_dir + KERNEL_PGD_BOUNDARY, | |
4f76cd38 | 140 | KERNEL_PGD_PTRS); |
4f76cd38 JF |
141 | } |
142 | ||
143 | /* list required to sync kernel mapping updates */ | |
617d34d9 JF |
144 | if (!SHARED_KERNEL_PMD) { |
145 | pgd_set_mm(pgd, mm); | |
4f76cd38 | 146 | pgd_list_add(pgd); |
617d34d9 | 147 | } |
4f76cd38 JF |
148 | } |
149 | ||
17b74627 | 150 | static void pgd_dtor(pgd_t *pgd) |
4f76cd38 | 151 | { |
4f76cd38 JF |
152 | if (SHARED_KERNEL_PMD) |
153 | return; | |
154 | ||
a79e53d8 | 155 | spin_lock(&pgd_lock); |
4f76cd38 | 156 | pgd_list_del(pgd); |
a79e53d8 | 157 | spin_unlock(&pgd_lock); |
4f76cd38 JF |
158 | } |
159 | ||
85958b46 JF |
160 | /* |
161 | * List of all pgd's needed for non-PAE so it can invalidate entries | |
162 | * in both cached and uncached pgd's; not needed for PAE since the | |
163 | * kernel pmd is shared. If PAE were not to share the pmd a similar | |
164 | * tactic would be needed. This is essentially codepath-based locking | |
165 | * against pageattr.c; it is the unique case in which a valid change | |
166 | * of kernel pagetables can't be lazily synchronized by vmalloc faults. | |
167 | * vmalloc faults work because attached pagetables are never freed. | |
6d49e352 | 168 | * -- nyc |
85958b46 JF |
169 | */ |
170 | ||
4f76cd38 | 171 | #ifdef CONFIG_X86_PAE |
d8d5900e JF |
172 | /* |
173 | * In PAE mode, we need to do a cr3 reload (=tlb flush) when | |
174 | * updating the top-level pagetable entries to guarantee the | |
175 | * processor notices the update. Since this is expensive, and | |
176 | * all 4 top-level entries are used almost immediately in a | |
177 | * new process's life, we just pre-populate them here. | |
178 | * | |
179 | * Also, if we're in a paravirt environment where the kernel pmd is | |
180 | * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate | |
181 | * and initialize the kernel pmds here. | |
182 | */ | |
183 | #define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD | |
184 | ||
f59dbe9c JR |
185 | /* |
186 | * We allocate separate PMDs for the kernel part of the user page-table | |
187 | * when PTI is enabled. We need them to map the per-process LDT into the | |
188 | * user-space page-table. | |
189 | */ | |
190 | #define PREALLOCATED_USER_PMDS (static_cpu_has(X86_FEATURE_PTI) ? \ | |
191 | KERNEL_PGD_PTRS : 0) | |
192 | ||
d8d5900e JF |
193 | void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd) |
194 | { | |
195 | paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT); | |
196 | ||
197 | /* Note: almost everything apart from _PAGE_PRESENT is | |
198 | reserved at the pmd (PDPT) level. */ | |
199 | set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT)); | |
200 | ||
201 | /* | |
202 | * According to Intel App note "TLBs, Paging-Structure Caches, | |
203 | * and Their Invalidation", April 2007, document 317080-001, | |
204 | * section 8.1: in PAE mode we explicitly have to flush the | |
205 | * TLB via cr3 if the top-level pgd is changed... | |
206 | */ | |
4981d01e | 207 | flush_tlb_mm(mm); |
d8d5900e JF |
208 | } |
209 | #else /* !CONFIG_X86_PAE */ | |
210 | ||
211 | /* No need to prepopulate any pagetable entries in non-PAE modes. */ | |
212 | #define PREALLOCATED_PMDS 0 | |
f59dbe9c | 213 | #define PREALLOCATED_USER_PMDS 0 |
d8d5900e JF |
214 | #endif /* CONFIG_X86_PAE */ |
215 | ||
f59dbe9c | 216 | static void free_pmds(struct mm_struct *mm, pmd_t *pmds[], int count) |
d8d5900e JF |
217 | { |
218 | int i; | |
219 | ||
f59dbe9c | 220 | for (i = 0; i < count; i++) |
09ef4939 KS |
221 | if (pmds[i]) { |
222 | pgtable_pmd_page_dtor(virt_to_page(pmds[i])); | |
d8d5900e | 223 | free_page((unsigned long)pmds[i]); |
dc6c9a35 | 224 | mm_dec_nr_pmds(mm); |
09ef4939 | 225 | } |
d8d5900e JF |
226 | } |
227 | ||
f59dbe9c | 228 | static int preallocate_pmds(struct mm_struct *mm, pmd_t *pmds[], int count) |
d8d5900e JF |
229 | { |
230 | int i; | |
231 | bool failed = false; | |
3e79ec7d VD |
232 | gfp_t gfp = PGALLOC_GFP; |
233 | ||
234 | if (mm == &init_mm) | |
235 | gfp &= ~__GFP_ACCOUNT; | |
d8d5900e | 236 | |
f59dbe9c | 237 | for (i = 0; i < count; i++) { |
3e79ec7d | 238 | pmd_t *pmd = (pmd_t *)__get_free_page(gfp); |
09ef4939 | 239 | if (!pmd) |
d8d5900e | 240 | failed = true; |
09ef4939 | 241 | if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) { |
2a46eed5 | 242 | free_page((unsigned long)pmd); |
09ef4939 KS |
243 | pmd = NULL; |
244 | failed = true; | |
245 | } | |
dc6c9a35 KS |
246 | if (pmd) |
247 | mm_inc_nr_pmds(mm); | |
d8d5900e JF |
248 | pmds[i] = pmd; |
249 | } | |
250 | ||
251 | if (failed) { | |
f59dbe9c | 252 | free_pmds(mm, pmds, count); |
d8d5900e JF |
253 | return -ENOMEM; |
254 | } | |
255 | ||
256 | return 0; | |
257 | } | |
258 | ||
4f76cd38 JF |
259 | /* |
260 | * Mop up any pmd pages which may still be attached to the pgd. | |
261 | * Normally they will be freed by munmap/exit_mmap, but any pmd we | |
262 | * preallocate which never got a corresponding vma will need to be | |
263 | * freed manually. | |
264 | */ | |
f59dbe9c JR |
265 | static void mop_up_one_pmd(struct mm_struct *mm, pgd_t *pgdp) |
266 | { | |
267 | pgd_t pgd = *pgdp; | |
268 | ||
269 | if (pgd_val(pgd) != 0) { | |
270 | pmd_t *pmd = (pmd_t *)pgd_page_vaddr(pgd); | |
271 | ||
9bc4f28a | 272 | pgd_clear(pgdp); |
f59dbe9c JR |
273 | |
274 | paravirt_release_pmd(pgd_val(pgd) >> PAGE_SHIFT); | |
275 | pmd_free(mm, pmd); | |
276 | mm_dec_nr_pmds(mm); | |
277 | } | |
278 | } | |
279 | ||
4f76cd38 JF |
280 | static void pgd_mop_up_pmds(struct mm_struct *mm, pgd_t *pgdp) |
281 | { | |
282 | int i; | |
283 | ||
f59dbe9c JR |
284 | for (i = 0; i < PREALLOCATED_PMDS; i++) |
285 | mop_up_one_pmd(mm, &pgdp[i]); | |
4f76cd38 | 286 | |
f59dbe9c | 287 | #ifdef CONFIG_PAGE_TABLE_ISOLATION |
4f76cd38 | 288 | |
f59dbe9c JR |
289 | if (!static_cpu_has(X86_FEATURE_PTI)) |
290 | return; | |
4f76cd38 | 291 | |
f59dbe9c JR |
292 | pgdp = kernel_to_user_pgdp(pgdp); |
293 | ||
294 | for (i = 0; i < PREALLOCATED_USER_PMDS; i++) | |
295 | mop_up_one_pmd(mm, &pgdp[i + KERNEL_PGD_BOUNDARY]); | |
296 | #endif | |
4f76cd38 JF |
297 | } |
298 | ||
d8d5900e | 299 | static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[]) |
4f76cd38 | 300 | { |
e0c4f675 | 301 | p4d_t *p4d; |
4f76cd38 | 302 | pud_t *pud; |
4f76cd38 JF |
303 | int i; |
304 | ||
cf3e5050 JF |
305 | if (PREALLOCATED_PMDS == 0) /* Work around gcc-3.4.x bug */ |
306 | return; | |
307 | ||
e0c4f675 KS |
308 | p4d = p4d_offset(pgd, 0); |
309 | pud = pud_offset(p4d, 0); | |
4f76cd38 | 310 | |
73b44ff4 | 311 | for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) { |
d8d5900e | 312 | pmd_t *pmd = pmds[i]; |
4f76cd38 | 313 | |
68db065c | 314 | if (i >= KERNEL_PGD_BOUNDARY) |
4f76cd38 JF |
315 | memcpy(pmd, (pmd_t *)pgd_page_vaddr(swapper_pg_dir[i]), |
316 | sizeof(pmd_t) * PTRS_PER_PMD); | |
317 | ||
318 | pud_populate(mm, pud, pmd); | |
319 | } | |
4f76cd38 | 320 | } |
1ec1fe73 | 321 | |
f59dbe9c JR |
322 | #ifdef CONFIG_PAGE_TABLE_ISOLATION |
323 | static void pgd_prepopulate_user_pmd(struct mm_struct *mm, | |
324 | pgd_t *k_pgd, pmd_t *pmds[]) | |
325 | { | |
326 | pgd_t *s_pgd = kernel_to_user_pgdp(swapper_pg_dir); | |
327 | pgd_t *u_pgd = kernel_to_user_pgdp(k_pgd); | |
328 | p4d_t *u_p4d; | |
329 | pud_t *u_pud; | |
330 | int i; | |
331 | ||
332 | u_p4d = p4d_offset(u_pgd, 0); | |
333 | u_pud = pud_offset(u_p4d, 0); | |
334 | ||
335 | s_pgd += KERNEL_PGD_BOUNDARY; | |
336 | u_pud += KERNEL_PGD_BOUNDARY; | |
337 | ||
338 | for (i = 0; i < PREALLOCATED_USER_PMDS; i++, u_pud++, s_pgd++) { | |
339 | pmd_t *pmd = pmds[i]; | |
340 | ||
341 | memcpy(pmd, (pmd_t *)pgd_page_vaddr(*s_pgd), | |
342 | sizeof(pmd_t) * PTRS_PER_PMD); | |
343 | ||
344 | pud_populate(mm, u_pud, pmd); | |
345 | } | |
346 | ||
347 | } | |
348 | #else | |
349 | static void pgd_prepopulate_user_pmd(struct mm_struct *mm, | |
350 | pgd_t *k_pgd, pmd_t *pmds[]) | |
351 | { | |
352 | } | |
353 | #endif | |
1db491f7 FY |
354 | /* |
355 | * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also | |
356 | * assumes that pgd should be in one page. | |
357 | * | |
358 | * But kernel with PAE paging that is not running as a Xen domain | |
359 | * only needs to allocate 32 bytes for pgd instead of one page. | |
360 | */ | |
361 | #ifdef CONFIG_X86_PAE | |
362 | ||
363 | #include <linux/slab.h> | |
364 | ||
365 | #define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t)) | |
366 | #define PGD_ALIGN 32 | |
367 | ||
368 | static struct kmem_cache *pgd_cache; | |
369 | ||
370 | static int __init pgd_cache_init(void) | |
371 | { | |
372 | /* | |
373 | * When PAE kernel is running as a Xen domain, it does not use | |
374 | * shared kernel pmd. And this requires a whole page for pgd. | |
375 | */ | |
376 | if (!SHARED_KERNEL_PMD) | |
377 | return 0; | |
378 | ||
379 | /* | |
380 | * when PAE kernel is not running as a Xen domain, it uses | |
381 | * shared kernel pmd. Shared kernel pmd does not require a whole | |
382 | * page for pgd. We are able to just allocate a 32-byte for pgd. | |
383 | * During boot time, we create a 32-byte slab for pgd table allocation. | |
384 | */ | |
385 | pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN, | |
386 | SLAB_PANIC, NULL); | |
1db491f7 FY |
387 | return 0; |
388 | } | |
389 | core_initcall(pgd_cache_init); | |
390 | ||
391 | static inline pgd_t *_pgd_alloc(void) | |
392 | { | |
393 | /* | |
394 | * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain. | |
395 | * We allocate one page for pgd. | |
396 | */ | |
397 | if (!SHARED_KERNEL_PMD) | |
e3238faf JR |
398 | return (pgd_t *)__get_free_pages(PGALLOC_GFP, |
399 | PGD_ALLOCATION_ORDER); | |
1db491f7 FY |
400 | |
401 | /* | |
402 | * Now PAE kernel is not running as a Xen domain. We can allocate | |
403 | * a 32-byte slab for pgd to save memory space. | |
404 | */ | |
405 | return kmem_cache_alloc(pgd_cache, PGALLOC_GFP); | |
406 | } | |
407 | ||
408 | static inline void _pgd_free(pgd_t *pgd) | |
409 | { | |
410 | if (!SHARED_KERNEL_PMD) | |
e3238faf | 411 | free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER); |
1db491f7 FY |
412 | else |
413 | kmem_cache_free(pgd_cache, pgd); | |
414 | } | |
415 | #else | |
d9e9a641 | 416 | |
1db491f7 FY |
417 | static inline pgd_t *_pgd_alloc(void) |
418 | { | |
d9e9a641 | 419 | return (pgd_t *)__get_free_pages(PGALLOC_GFP, PGD_ALLOCATION_ORDER); |
1db491f7 FY |
420 | } |
421 | ||
422 | static inline void _pgd_free(pgd_t *pgd) | |
423 | { | |
d9e9a641 | 424 | free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER); |
1db491f7 FY |
425 | } |
426 | #endif /* CONFIG_X86_PAE */ | |
427 | ||
d8d5900e | 428 | pgd_t *pgd_alloc(struct mm_struct *mm) |
1ec1fe73 | 429 | { |
d8d5900e | 430 | pgd_t *pgd; |
f59dbe9c | 431 | pmd_t *u_pmds[PREALLOCATED_USER_PMDS]; |
d8d5900e | 432 | pmd_t *pmds[PREALLOCATED_PMDS]; |
1ec1fe73 | 433 | |
1db491f7 | 434 | pgd = _pgd_alloc(); |
d8d5900e JF |
435 | |
436 | if (pgd == NULL) | |
437 | goto out; | |
438 | ||
439 | mm->pgd = pgd; | |
440 | ||
f59dbe9c | 441 | if (preallocate_pmds(mm, pmds, PREALLOCATED_PMDS) != 0) |
d8d5900e JF |
442 | goto out_free_pgd; |
443 | ||
f59dbe9c | 444 | if (preallocate_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS) != 0) |
d8d5900e | 445 | goto out_free_pmds; |
1ec1fe73 | 446 | |
f59dbe9c JR |
447 | if (paravirt_pgd_alloc(mm) != 0) |
448 | goto out_free_user_pmds; | |
449 | ||
1ec1fe73 | 450 | /* |
d8d5900e JF |
451 | * Make sure that pre-populating the pmds is atomic with |
452 | * respect to anything walking the pgd_list, so that they | |
453 | * never see a partially populated pgd. | |
1ec1fe73 | 454 | */ |
a79e53d8 | 455 | spin_lock(&pgd_lock); |
4f76cd38 | 456 | |
617d34d9 | 457 | pgd_ctor(mm, pgd); |
d8d5900e | 458 | pgd_prepopulate_pmd(mm, pgd, pmds); |
f59dbe9c | 459 | pgd_prepopulate_user_pmd(mm, pgd, u_pmds); |
4f76cd38 | 460 | |
a79e53d8 | 461 | spin_unlock(&pgd_lock); |
4f76cd38 JF |
462 | |
463 | return pgd; | |
d8d5900e | 464 | |
f59dbe9c JR |
465 | out_free_user_pmds: |
466 | free_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS); | |
d8d5900e | 467 | out_free_pmds: |
f59dbe9c | 468 | free_pmds(mm, pmds, PREALLOCATED_PMDS); |
d8d5900e | 469 | out_free_pgd: |
1db491f7 | 470 | _pgd_free(pgd); |
d8d5900e JF |
471 | out: |
472 | return NULL; | |
4f76cd38 JF |
473 | } |
474 | ||
475 | void pgd_free(struct mm_struct *mm, pgd_t *pgd) | |
476 | { | |
477 | pgd_mop_up_pmds(mm, pgd); | |
478 | pgd_dtor(pgd); | |
eba0045f | 479 | paravirt_pgd_free(mm, pgd); |
1db491f7 | 480 | _pgd_free(pgd); |
4f76cd38 | 481 | } |
ee5aa8d3 | 482 | |
0f9a921c RR |
483 | /* |
484 | * Used to set accessed or dirty bits in the page table entries | |
485 | * on other architectures. On x86, the accessed and dirty bits | |
486 | * are tracked by hardware. However, do_wp_page calls this function | |
487 | * to also make the pte writeable at the same time the dirty bit is | |
488 | * set. In that case we do actually need to write the PTE. | |
489 | */ | |
ee5aa8d3 JF |
490 | int ptep_set_access_flags(struct vm_area_struct *vma, |
491 | unsigned long address, pte_t *ptep, | |
492 | pte_t entry, int dirty) | |
493 | { | |
494 | int changed = !pte_same(*ptep, entry); | |
495 | ||
87930019 | 496 | if (changed && dirty) |
9bc4f28a | 497 | set_pte(ptep, entry); |
ee5aa8d3 JF |
498 | |
499 | return changed; | |
500 | } | |
f9fbf1a3 | 501 | |
db3eb96f AA |
502 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
503 | int pmdp_set_access_flags(struct vm_area_struct *vma, | |
504 | unsigned long address, pmd_t *pmdp, | |
505 | pmd_t entry, int dirty) | |
506 | { | |
507 | int changed = !pmd_same(*pmdp, entry); | |
508 | ||
509 | VM_BUG_ON(address & ~HPAGE_PMD_MASK); | |
510 | ||
511 | if (changed && dirty) { | |
9bc4f28a | 512 | set_pmd(pmdp, entry); |
5e4bf1a5 IM |
513 | /* |
514 | * We had a write-protection fault here and changed the pmd | |
515 | * to to more permissive. No need to flush the TLB for that, | |
516 | * #PF is architecturally guaranteed to do that and in the | |
517 | * worst-case we'll generate a spurious fault. | |
518 | */ | |
db3eb96f AA |
519 | } |
520 | ||
521 | return changed; | |
522 | } | |
a00cc7d9 MW |
523 | |
524 | int pudp_set_access_flags(struct vm_area_struct *vma, unsigned long address, | |
525 | pud_t *pudp, pud_t entry, int dirty) | |
526 | { | |
527 | int changed = !pud_same(*pudp, entry); | |
528 | ||
529 | VM_BUG_ON(address & ~HPAGE_PUD_MASK); | |
530 | ||
531 | if (changed && dirty) { | |
9bc4f28a | 532 | set_pud(pudp, entry); |
a00cc7d9 MW |
533 | /* |
534 | * We had a write-protection fault here and changed the pud | |
535 | * to to more permissive. No need to flush the TLB for that, | |
536 | * #PF is architecturally guaranteed to do that and in the | |
537 | * worst-case we'll generate a spurious fault. | |
538 | */ | |
539 | } | |
540 | ||
541 | return changed; | |
542 | } | |
db3eb96f AA |
543 | #endif |
544 | ||
f9fbf1a3 JF |
545 | int ptep_test_and_clear_young(struct vm_area_struct *vma, |
546 | unsigned long addr, pte_t *ptep) | |
547 | { | |
548 | int ret = 0; | |
549 | ||
550 | if (pte_young(*ptep)) | |
551 | ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, | |
48e23957 | 552 | (unsigned long *) &ptep->pte); |
f9fbf1a3 | 553 | |
f9fbf1a3 JF |
554 | return ret; |
555 | } | |
c20311e1 | 556 | |
db3eb96f AA |
557 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
558 | int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
559 | unsigned long addr, pmd_t *pmdp) | |
560 | { | |
561 | int ret = 0; | |
562 | ||
563 | if (pmd_young(*pmdp)) | |
564 | ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, | |
f2d6bfe9 | 565 | (unsigned long *)pmdp); |
db3eb96f | 566 | |
db3eb96f AA |
567 | return ret; |
568 | } | |
a00cc7d9 MW |
569 | int pudp_test_and_clear_young(struct vm_area_struct *vma, |
570 | unsigned long addr, pud_t *pudp) | |
571 | { | |
572 | int ret = 0; | |
573 | ||
574 | if (pud_young(*pudp)) | |
575 | ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, | |
576 | (unsigned long *)pudp); | |
577 | ||
578 | return ret; | |
579 | } | |
db3eb96f AA |
580 | #endif |
581 | ||
c20311e1 JF |
582 | int ptep_clear_flush_young(struct vm_area_struct *vma, |
583 | unsigned long address, pte_t *ptep) | |
584 | { | |
b13b1d2d SL |
585 | /* |
586 | * On x86 CPUs, clearing the accessed bit without a TLB flush | |
587 | * doesn't cause data corruption. [ It could cause incorrect | |
588 | * page aging and the (mistaken) reclaim of hot pages, but the | |
589 | * chance of that should be relatively low. ] | |
590 | * | |
591 | * So as a performance optimization don't flush the TLB when | |
592 | * clearing the accessed bit, it will eventually be flushed by | |
593 | * a context switch or a VM operation anyway. [ In the rare | |
594 | * event of it not getting flushed for a long time the delay | |
595 | * shouldn't really matter because there's no real memory | |
596 | * pressure for swapout to react to. ] | |
597 | */ | |
598 | return ptep_test_and_clear_young(vma, address, ptep); | |
c20311e1 | 599 | } |
7c7e6e07 | 600 | |
db3eb96f AA |
601 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
602 | int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
603 | unsigned long address, pmd_t *pmdp) | |
604 | { | |
605 | int young; | |
606 | ||
607 | VM_BUG_ON(address & ~HPAGE_PMD_MASK); | |
608 | ||
609 | young = pmdp_test_and_clear_young(vma, address, pmdp); | |
610 | if (young) | |
611 | flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE); | |
612 | ||
613 | return young; | |
614 | } | |
db3eb96f AA |
615 | #endif |
616 | ||
fd862dde GP |
617 | /** |
618 | * reserve_top_address - reserves a hole in the top of kernel address space | |
619 | * @reserve - size of hole to reserve | |
620 | * | |
621 | * Can be used to relocate the fixmap area and poke a hole in the top | |
622 | * of kernel address space to make room for a hypervisor. | |
623 | */ | |
624 | void __init reserve_top_address(unsigned long reserve) | |
625 | { | |
626 | #ifdef CONFIG_X86_32 | |
627 | BUG_ON(fixmaps_set > 0); | |
73159fdc AL |
628 | __FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE; |
629 | printk(KERN_INFO "Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n", | |
630 | -reserve, __FIXADDR_TOP + PAGE_SIZE); | |
fd862dde GP |
631 | #endif |
632 | } | |
633 | ||
7c7e6e07 JF |
634 | int fixmaps_set; |
635 | ||
aeaaa59c | 636 | void __native_set_fixmap(enum fixed_addresses idx, pte_t pte) |
7c7e6e07 JF |
637 | { |
638 | unsigned long address = __fix_to_virt(idx); | |
639 | ||
05ab1d8a FT |
640 | #ifdef CONFIG_X86_64 |
641 | /* | |
642 | * Ensure that the static initial page tables are covering the | |
643 | * fixmap completely. | |
644 | */ | |
645 | BUILD_BUG_ON(__end_of_permanent_fixed_addresses > | |
646 | (FIXMAP_PMD_NUM * PTRS_PER_PTE)); | |
647 | #endif | |
648 | ||
7c7e6e07 JF |
649 | if (idx >= __end_of_fixed_addresses) { |
650 | BUG(); | |
651 | return; | |
652 | } | |
aeaaa59c | 653 | set_pte_vaddr(address, pte); |
7c7e6e07 JF |
654 | fixmaps_set++; |
655 | } | |
aeaaa59c | 656 | |
3b3809ac MH |
657 | void native_set_fixmap(enum fixed_addresses idx, phys_addr_t phys, |
658 | pgprot_t flags) | |
aeaaa59c | 659 | { |
fb43d6cb DH |
660 | /* Sanitize 'prot' against any unsupported bits: */ |
661 | pgprot_val(flags) &= __default_kernel_pte_mask; | |
662 | ||
aeaaa59c JF |
663 | __native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags)); |
664 | } | |
6b637835 TK |
665 | |
666 | #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP | |
b8504058 KS |
667 | #ifdef CONFIG_X86_5LEVEL |
668 | /** | |
669 | * p4d_set_huge - setup kernel P4D mapping | |
670 | * | |
671 | * No 512GB pages yet -- always return 0 | |
672 | */ | |
673 | int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) | |
674 | { | |
675 | return 0; | |
676 | } | |
677 | ||
678 | /** | |
679 | * p4d_clear_huge - clear kernel P4D mapping when it is set | |
680 | * | |
681 | * No 512GB pages yet -- always return 0 | |
682 | */ | |
683 | int p4d_clear_huge(p4d_t *p4d) | |
684 | { | |
685 | return 0; | |
686 | } | |
687 | #endif | |
688 | ||
3d3ca416 TK |
689 | /** |
690 | * pud_set_huge - setup kernel PUD mapping | |
691 | * | |
b73522e0 TK |
692 | * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this |
693 | * function sets up a huge page only if any of the following conditions are met: | |
694 | * | |
695 | * - MTRRs are disabled, or | |
696 | * | |
697 | * - MTRRs are enabled and the range is completely covered by a single MTRR, or | |
698 | * | |
699 | * - MTRRs are enabled and the corresponding MTRR memory type is WB, which | |
700 | * has no effect on the requested PAT memory type. | |
701 | * | |
702 | * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger | |
703 | * page mapping attempt fails. | |
3d3ca416 TK |
704 | * |
705 | * Returns 1 on success and 0 on failure. | |
706 | */ | |
6b637835 TK |
707 | int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot) |
708 | { | |
b73522e0 | 709 | u8 mtrr, uniform; |
6b637835 | 710 | |
b73522e0 TK |
711 | mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE, &uniform); |
712 | if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) && | |
713 | (mtrr != MTRR_TYPE_WRBACK)) | |
6b637835 TK |
714 | return 0; |
715 | ||
e3e28812 JR |
716 | /* Bail out if we are we on a populated non-leaf entry: */ |
717 | if (pud_present(*pud) && !pud_huge(*pud)) | |
718 | return 0; | |
719 | ||
6b637835 TK |
720 | prot = pgprot_4k_2_large(prot); |
721 | ||
722 | set_pte((pte_t *)pud, pfn_pte( | |
723 | (u64)addr >> PAGE_SHIFT, | |
724 | __pgprot(pgprot_val(prot) | _PAGE_PSE))); | |
725 | ||
726 | return 1; | |
727 | } | |
728 | ||
3d3ca416 TK |
729 | /** |
730 | * pmd_set_huge - setup kernel PMD mapping | |
731 | * | |
b73522e0 | 732 | * See text over pud_set_huge() above. |
3d3ca416 TK |
733 | * |
734 | * Returns 1 on success and 0 on failure. | |
735 | */ | |
6b637835 TK |
736 | int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot) |
737 | { | |
b73522e0 | 738 | u8 mtrr, uniform; |
6b637835 | 739 | |
b73522e0 TK |
740 | mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE, &uniform); |
741 | if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) && | |
742 | (mtrr != MTRR_TYPE_WRBACK)) { | |
743 | pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n", | |
744 | __func__, addr, addr + PMD_SIZE); | |
6b637835 | 745 | return 0; |
b73522e0 | 746 | } |
6b637835 | 747 | |
e3e28812 JR |
748 | /* Bail out if we are we on a populated non-leaf entry: */ |
749 | if (pmd_present(*pmd) && !pmd_huge(*pmd)) | |
750 | return 0; | |
751 | ||
6b637835 TK |
752 | prot = pgprot_4k_2_large(prot); |
753 | ||
754 | set_pte((pte_t *)pmd, pfn_pte( | |
755 | (u64)addr >> PAGE_SHIFT, | |
756 | __pgprot(pgprot_val(prot) | _PAGE_PSE))); | |
757 | ||
758 | return 1; | |
759 | } | |
760 | ||
3d3ca416 TK |
761 | /** |
762 | * pud_clear_huge - clear kernel PUD mapping when it is set | |
763 | * | |
764 | * Returns 1 on success and 0 on failure (no PUD map is found). | |
765 | */ | |
6b637835 TK |
766 | int pud_clear_huge(pud_t *pud) |
767 | { | |
768 | if (pud_large(*pud)) { | |
769 | pud_clear(pud); | |
770 | return 1; | |
771 | } | |
772 | ||
773 | return 0; | |
774 | } | |
775 | ||
3d3ca416 TK |
776 | /** |
777 | * pmd_clear_huge - clear kernel PMD mapping when it is set | |
778 | * | |
779 | * Returns 1 on success and 0 on failure (no PMD map is found). | |
780 | */ | |
6b637835 TK |
781 | int pmd_clear_huge(pmd_t *pmd) |
782 | { | |
783 | if (pmd_large(*pmd)) { | |
784 | pmd_clear(pmd); | |
785 | return 1; | |
786 | } | |
787 | ||
788 | return 0; | |
789 | } | |
b6bdb751 | 790 | |
f967db0b | 791 | #ifdef CONFIG_X86_64 |
b6bdb751 TK |
792 | /** |
793 | * pud_free_pmd_page - Clear pud entry and free pmd page. | |
794 | * @pud: Pointer to a PUD. | |
785a19f9 | 795 | * @addr: Virtual address associated with pud. |
b6bdb751 | 796 | * |
5e0fb5df | 797 | * Context: The pud range has been unmapped and TLB purged. |
b6bdb751 | 798 | * Return: 1 if clearing the entry succeeded. 0 otherwise. |
5e0fb5df TK |
799 | * |
800 | * NOTE: Callers must allow a single page allocation. | |
b6bdb751 | 801 | */ |
785a19f9 | 802 | int pud_free_pmd_page(pud_t *pud, unsigned long addr) |
b6bdb751 | 803 | { |
5e0fb5df TK |
804 | pmd_t *pmd, *pmd_sv; |
805 | pte_t *pte; | |
28ee90fe TK |
806 | int i; |
807 | ||
808 | if (pud_none(*pud)) | |
809 | return 1; | |
810 | ||
811 | pmd = (pmd_t *)pud_page_vaddr(*pud); | |
5e0fb5df TK |
812 | pmd_sv = (pmd_t *)__get_free_page(GFP_KERNEL); |
813 | if (!pmd_sv) | |
814 | return 0; | |
28ee90fe | 815 | |
5e0fb5df TK |
816 | for (i = 0; i < PTRS_PER_PMD; i++) { |
817 | pmd_sv[i] = pmd[i]; | |
818 | if (!pmd_none(pmd[i])) | |
819 | pmd_clear(&pmd[i]); | |
820 | } | |
28ee90fe TK |
821 | |
822 | pud_clear(pud); | |
5e0fb5df TK |
823 | |
824 | /* INVLPG to clear all paging-structure caches */ | |
825 | flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1); | |
826 | ||
827 | for (i = 0; i < PTRS_PER_PMD; i++) { | |
828 | if (!pmd_none(pmd_sv[i])) { | |
829 | pte = (pte_t *)pmd_page_vaddr(pmd_sv[i]); | |
830 | free_page((unsigned long)pte); | |
831 | } | |
832 | } | |
833 | ||
834 | free_page((unsigned long)pmd_sv); | |
28ee90fe TK |
835 | free_page((unsigned long)pmd); |
836 | ||
837 | return 1; | |
b6bdb751 TK |
838 | } |
839 | ||
840 | /** | |
841 | * pmd_free_pte_page - Clear pmd entry and free pte page. | |
842 | * @pmd: Pointer to a PMD. | |
785a19f9 | 843 | * @addr: Virtual address associated with pmd. |
b6bdb751 | 844 | * |
5e0fb5df | 845 | * Context: The pmd range has been unmapped and TLB purged. |
b6bdb751 TK |
846 | * Return: 1 if clearing the entry succeeded. 0 otherwise. |
847 | */ | |
785a19f9 | 848 | int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) |
b6bdb751 | 849 | { |
28ee90fe TK |
850 | pte_t *pte; |
851 | ||
852 | if (pmd_none(*pmd)) | |
853 | return 1; | |
854 | ||
855 | pte = (pte_t *)pmd_page_vaddr(*pmd); | |
856 | pmd_clear(pmd); | |
5e0fb5df TK |
857 | |
858 | /* INVLPG to clear all paging-structure caches */ | |
859 | flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1); | |
860 | ||
28ee90fe TK |
861 | free_page((unsigned long)pte); |
862 | ||
863 | return 1; | |
b6bdb751 | 864 | } |
f967db0b TK |
865 | |
866 | #else /* !CONFIG_X86_64 */ | |
867 | ||
785a19f9 | 868 | int pud_free_pmd_page(pud_t *pud, unsigned long addr) |
f967db0b TK |
869 | { |
870 | return pud_none(*pud); | |
871 | } | |
872 | ||
873 | /* | |
874 | * Disable free page handling on x86-PAE. This assures that ioremap() | |
875 | * does not update sync'd pmd entries. See vmalloc_sync_one(). | |
876 | */ | |
785a19f9 | 877 | int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) |
f967db0b TK |
878 | { |
879 | return pmd_none(*pmd); | |
880 | } | |
881 | ||
882 | #endif /* CONFIG_X86_64 */ | |
6b637835 | 883 | #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */ |