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ad96090a BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
d38ea87a | 24 | #include "qemu/osdep.h" |
33c11879 | 25 | #include "cpu.h" |
9c17d615 | 26 | #include "sysemu/sysemu.h" |
9c17d615 | 27 | #include "sysemu/arch_init.h" |
a2cb15b0 | 28 | #include "hw/pci/pci.h" |
8a824e4d | 29 | #include "hw/audio/soundhw.h" |
112ed241 | 30 | #include "qapi/qapi-commands-misc.h" |
b47aa7b3 | 31 | #include "qapi/error.h" |
1de7afc9 | 32 | #include "qemu/config-file.h" |
d97326ee | 33 | #include "qemu/error-report.h" |
0445259b | 34 | #include "hw/acpi/acpi.h" |
f348b6d1 | 35 | #include "qemu/help_option.h" |
ad96090a BS |
36 | |
37 | #ifdef TARGET_SPARC | |
38 | int graphic_width = 1024; | |
39 | int graphic_height = 768; | |
40 | int graphic_depth = 8; | |
8ac919a0 LV |
41 | #elif defined(TARGET_M68K) |
42 | int graphic_width = 800; | |
43 | int graphic_height = 600; | |
44 | int graphic_depth = 8; | |
ad96090a BS |
45 | #else |
46 | int graphic_width = 800; | |
47 | int graphic_height = 600; | |
f1ff0e89 | 48 | int graphic_depth = 32; |
ad96090a BS |
49 | #endif |
50 | ||
ad96090a BS |
51 | |
52 | #if defined(TARGET_ALPHA) | |
53 | #define QEMU_ARCH QEMU_ARCH_ALPHA | |
54 | #elif defined(TARGET_ARM) | |
55 | #define QEMU_ARCH QEMU_ARCH_ARM | |
56 | #elif defined(TARGET_CRIS) | |
57 | #define QEMU_ARCH QEMU_ARCH_CRIS | |
813dff13 HD |
58 | #elif defined(TARGET_HPPA) |
59 | #define QEMU_ARCH QEMU_ARCH_HPPA | |
d35ea39e MT |
60 | #elif defined(TARGET_I386) |
61 | #define QEMU_ARCH QEMU_ARCH_I386 | |
81ea0e13 MW |
62 | #elif defined(TARGET_LM32) |
63 | #define QEMU_ARCH QEMU_ARCH_LM32 | |
d35ea39e MT |
64 | #elif defined(TARGET_M68K) |
65 | #define QEMU_ARCH QEMU_ARCH_M68K | |
ad96090a BS |
66 | #elif defined(TARGET_MICROBLAZE) |
67 | #define QEMU_ARCH QEMU_ARCH_MICROBLAZE | |
68 | #elif defined(TARGET_MIPS) | |
69 | #define QEMU_ARCH QEMU_ARCH_MIPS | |
d15a9c23 AG |
70 | #elif defined(TARGET_MOXIE) |
71 | #define QEMU_ARCH QEMU_ARCH_MOXIE | |
e671711c MV |
72 | #elif defined(TARGET_NIOS2) |
73 | #define QEMU_ARCH QEMU_ARCH_NIOS2 | |
e67db06e JL |
74 | #elif defined(TARGET_OPENRISC) |
75 | #define QEMU_ARCH QEMU_ARCH_OPENRISC | |
ad96090a BS |
76 | #elif defined(TARGET_PPC) |
77 | #define QEMU_ARCH QEMU_ARCH_PPC | |
25fa194b MC |
78 | #elif defined(TARGET_RISCV) |
79 | #define QEMU_ARCH QEMU_ARCH_RISCV | |
c8c35e5f YS |
80 | #elif defined(TARGET_RX) |
81 | #define QEMU_ARCH QEMU_ARCH_RX | |
ad96090a BS |
82 | #elif defined(TARGET_S390X) |
83 | #define QEMU_ARCH QEMU_ARCH_S390X | |
84 | #elif defined(TARGET_SH4) | |
85 | #define QEMU_ARCH QEMU_ARCH_SH4 | |
86 | #elif defined(TARGET_SPARC) | |
87 | #define QEMU_ARCH QEMU_ARCH_SPARC | |
48e06fe0 BK |
88 | #elif defined(TARGET_TRICORE) |
89 | #define QEMU_ARCH QEMU_ARCH_TRICORE | |
d35ea39e MT |
90 | #elif defined(TARGET_UNICORE32) |
91 | #define QEMU_ARCH QEMU_ARCH_UNICORE32 | |
92 | #elif defined(TARGET_XTENSA) | |
93 | #define QEMU_ARCH QEMU_ARCH_XTENSA | |
ad96090a BS |
94 | #endif |
95 | ||
96 | const uint32_t arch_type = QEMU_ARCH; | |
ad96090a | 97 | |
ad96090a BS |
98 | int kvm_available(void) |
99 | { | |
100 | #ifdef CONFIG_KVM | |
101 | return 1; | |
102 | #else | |
103 | return 0; | |
104 | #endif | |
105 | } | |
106 | ||
107 | int xen_available(void) | |
108 | { | |
109 | #ifdef CONFIG_XEN | |
110 | return 1; | |
111 | #else | |
112 | return 0; | |
113 | #endif | |
114 | } |