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77e7273c JS |
1 | /* |
2 | * (C) Copyright 2008-2009 | |
3 | * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de> | |
4 | * Jens Scharsig <esw@bus-elektronik.de> | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
77e7273c JS |
7 | */ |
8 | ||
9 | #include <common.h> | |
10 | #include <exports.h> | |
11 | #include <net.h> | |
12 | #include <netdev.h> | |
13 | #include <nand.h> | |
14 | ||
15 | #include <asm/io.h> | |
16 | #include <asm/arch/hardware.h> | |
17 | #include <asm/arch/at91_pio.h> | |
18 | #include <asm/arch/at91_pmc.h> | |
19 | #include <asm/arch/at91_mc.h> | |
5a05cb73 | 20 | #include <asm/arch/at91_common.h> |
77e7273c JS |
21 | |
22 | #ifdef CONFIG_STATUS_LED | |
23 | #include <status_led.h> | |
24 | #endif | |
25 | ||
26 | #ifdef CONFIG_VIDEO | |
27 | #include <bus_vcxk.h> | |
28 | ||
29 | extern unsigned long display_width; | |
30 | extern unsigned long display_height; | |
31 | #endif | |
32 | ||
33 | #ifdef CONFIG_CMD_NAND | |
34 | void cpux9k2_nand_hw_init(void); | |
35 | #endif | |
36 | ||
37 | DECLARE_GLOBAL_DATA_PTR; | |
38 | ||
39 | /* | |
40 | * Miscelaneous platform dependent initialisations | |
41 | */ | |
42 | ||
43 | int board_init(void) | |
44 | { | |
80733994 | 45 | at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; |
77e7273c JS |
46 | |
47 | /* Correct IRDA resistor problem / Set PA23_TXD in Output */ | |
80733994 | 48 | writel(ATMEL_PMX_AA_TXD2, &pio->pioa.oer); |
77e7273c JS |
49 | |
50 | gd->bd->bi_arch_number = MACH_TYPE_EB_CPUX9K2; | |
51 | /* adress of boot parameters */ | |
cebcf7da | 52 | gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
77e7273c JS |
53 | |
54 | #ifdef CONFIG_STATUS_LED | |
55 | status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); | |
56 | #endif | |
57 | #ifdef CONFIG_CMD_NAND | |
58 | cpux9k2_nand_hw_init(); | |
59 | #endif | |
60 | return 0; | |
61 | } | |
62 | ||
5a05cb73 AB |
63 | int board_early_init_f(void) |
64 | { | |
65 | at91_seriald_hw_init(); | |
66 | return 0; | |
67 | } | |
68 | ||
77e7273c JS |
69 | #ifdef CONFIG_MISC_INIT_R |
70 | ||
71 | int misc_init_r(void) | |
72 | { | |
73 | uchar mac[8]; | |
74 | uchar tm; | |
75 | uchar midx; | |
76 | uchar macn6, macn7; | |
77 | ||
77e7273c JS |
78 | if (getenv("ethaddr") == NULL) { |
79 | if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x00, | |
80 | CONFIG_SYS_I2C_EEPROM_ADDR_LEN, | |
81 | (uchar *) &mac, sizeof(mac)) != 0) { | |
82 | puts("Error reading MAC from EEPROM\n"); | |
83 | } else { | |
84 | tm = 0; | |
85 | macn6 = 0; | |
86 | macn7 = 0xFF; | |
87 | for (midx = 0; midx < 6; midx++) { | |
88 | if ((mac[midx] != 0) && (mac[midx] != 0xFF)) | |
89 | tm++; | |
90 | macn6 += mac[midx]; | |
91 | macn7 ^= mac[midx]; | |
92 | } | |
93 | if ((macn6 != mac[6]) || (macn7 != mac[7])) | |
94 | tm = 0; | |
95 | if (tm) | |
96 | eth_setenv_enetaddr("ethaddr", mac); | |
97 | else | |
98 | puts("Error: invalid MAC at EEPROM\n"); | |
99 | } | |
100 | } | |
49cad547 | 101 | gd->jt->do_reset = do_reset; |
77e7273c JS |
102 | |
103 | #ifdef CONFIG_STATUS_LED | |
104 | status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING); | |
105 | #endif | |
106 | return 0; | |
107 | } | |
108 | #endif | |
109 | ||
110 | #ifdef CONFIG_RESET_PHY_R | |
111 | void reset_phy(void) | |
112 | { | |
113 | udelay(10000); | |
114 | eth_init(gd->bd); | |
115 | } | |
116 | #endif | |
117 | ||
118 | /* | |
119 | * DRAM initialisations | |
120 | */ | |
121 | ||
122 | int dram_init(void) | |
123 | { | |
a55d23cc | 124 | gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, |
cebcf7da | 125 | CONFIG_SYS_SDRAM_SIZE); |
77e7273c JS |
126 | return 0; |
127 | } | |
128 | ||
129 | /* | |
130 | * Ethernet initialisations | |
131 | */ | |
132 | ||
133 | #ifdef CONFIG_DRIVER_AT91EMAC | |
134 | int board_eth_init(bd_t *bis) | |
135 | { | |
136 | int rc = 0; | |
80733994 | 137 | rc = at91emac_register(bis, (u32) ATMEL_BASE_EMAC); |
77e7273c JS |
138 | return rc; |
139 | } | |
140 | #endif | |
141 | ||
142 | /* | |
143 | * Disk On Chip (NAND) Millenium initialization. | |
144 | * The NAND lives in the CS2* space | |
145 | */ | |
146 | #if defined(CONFIG_CMD_NAND) | |
147 | ||
148 | #define MASK_ALE (1 << 22) /* our ALE is AD22 */ | |
149 | #define MASK_CLE (1 << 21) /* our CLE is AD21 */ | |
150 | ||
151 | void cpux9k2_nand_hw_init(void) | |
152 | { | |
153 | unsigned long csr; | |
80733994 JS |
154 | at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; |
155 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; | |
156 | at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC; | |
77e7273c JS |
157 | |
158 | /* Setup Smart Media, fitst enable the address range of CS3 */ | |
159 | writel(readl(&mc->ebi.csa) | AT91_EBI_CSA_CS3A, &mc->ebi.csa); | |
160 | ||
161 | /* RWH = 1 | RWS = 0 | TDF = 1 | NWS = 3 */ | |
162 | csr = AT91_SMC_CSR_RWHOLD(1) | AT91_SMC_CSR_TDF(1) | | |
163 | AT91_SMC_CSR_NWS(3) | | |
164 | AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_8 | | |
165 | AT91_SMC_CSR_WSEN; | |
166 | writel(csr, &mc->smc.csr[3]); | |
167 | ||
80733994 JS |
168 | writel(ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE, &pio->pioc.asr); |
169 | writel(ATMEL_PMX_CA_BFCK | ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE, | |
77e7273c JS |
170 | &pio->pioc.pdr); |
171 | ||
172 | /* Configure PC2 as input (signal Nand READY ) */ | |
80733994 JS |
173 | writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.per); |
174 | writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.odr); /* disable output */ | |
175 | writel(ATMEL_PMX_CA_BFCK, &pio->pioc.codr); | |
77e7273c JS |
176 | |
177 | /* PIOC clock enabling */ | |
80733994 | 178 | writel(1 << ATMEL_ID_PIOC, &pmc->pcer); |
77e7273c JS |
179 | } |
180 | ||
181 | static void board_nand_hwcontrol(struct mtd_info *mtd, | |
182 | int cmd, unsigned int ctrl) | |
183 | { | |
80733994 | 184 | at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; |
77e7273c JS |
185 | struct nand_chip *this = mtd->priv; |
186 | ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; | |
187 | ||
188 | if (ctrl & NAND_CTRL_CHANGE) { | |
189 | IO_ADDR_W &= ~(MASK_ALE | MASK_CLE); | |
190 | ||
191 | if (ctrl & NAND_CLE) | |
192 | IO_ADDR_W |= MASK_CLE; | |
193 | if (ctrl & NAND_ALE) | |
194 | IO_ADDR_W |= MASK_ALE; | |
195 | ||
196 | if ((ctrl & NAND_NCE)) | |
197 | writel(1, &pio->pioc.codr); | |
198 | else | |
199 | writel(1, &pio->pioc.sodr); | |
200 | ||
201 | this->IO_ADDR_W = (void *) IO_ADDR_W; | |
202 | } | |
203 | if (cmd != NAND_CMD_NONE) | |
204 | writeb(cmd, this->IO_ADDR_W); | |
205 | } | |
206 | ||
207 | static int board_nand_dev_ready(struct mtd_info *mtd) | |
208 | { | |
80733994 | 209 | at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; |
77e7273c JS |
210 | return ((readl(&pio->pioc.pdsr) & (1 << 2)) != 0); |
211 | } | |
212 | ||
213 | int board_nand_init(struct nand_chip *nand) | |
214 | { | |
215 | cpux9k2_nand_hw_init(); | |
216 | nand->ecc.mode = NAND_ECC_SOFT; | |
217 | nand->cmd_ctrl = board_nand_hwcontrol; | |
218 | nand->dev_ready = board_nand_dev_ready; | |
219 | nand->chip_delay = 20; | |
220 | return 0; | |
221 | } | |
222 | ||
223 | #endif | |
224 | ||
225 | #if defined(CONFIG_VIDEO) | |
226 | /* | |
227 | * drv_video_init | |
228 | * FUNCTION: initialize VCxK device | |
229 | */ | |
230 | ||
231 | int drv_video_init(void) | |
232 | { | |
233 | #ifdef CONFIG_SPLASH_SCREEN | |
234 | unsigned long splash; | |
235 | #endif | |
236 | char *s; | |
237 | unsigned long csr; | |
80733994 JS |
238 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
239 | at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC; | |
77e7273c JS |
240 | |
241 | printf("Init Video as "); | |
242 | s = getenv("displaywidth"); | |
243 | if (s != NULL) | |
244 | display_width = simple_strtoul(s, NULL, 10); | |
245 | else | |
246 | display_width = 256; | |
247 | s = getenv("displayheight"); | |
248 | if (s != NULL) | |
249 | display_height = simple_strtoul(s, NULL, 10); | |
250 | else | |
251 | display_height = 256; | |
252 | printf("%ld x %ld pixel matrix\n", display_width, display_height); | |
253 | ||
3bb183be JS |
254 | /* RWH = 2 | RWS =2 | TDF = 4 | NWS = 0x6 */ |
255 | csr = AT91_SMC_CSR_RWHOLD(2) | AT91_SMC_CSR_RWSETUP(2) | | |
256 | AT91_SMC_CSR_TDF(4) | AT91_SMC_CSR_NWS(6) | | |
77e7273c JS |
257 | AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 | |
258 | AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN; | |
259 | writel(csr, &mc->smc.csr[2]); | |
80733994 | 260 | writel(1 << ATMEL_ID_PIOB, &pmc->pcer); |
77e7273c JS |
261 | |
262 | vcxk_init(display_width, display_height); | |
263 | #ifdef CONFIG_SPLASH_SCREEN | |
264 | s = getenv("splashimage"); | |
265 | if (s != NULL) { | |
266 | splash = simple_strtoul(s, NULL, 16); | |
267 | printf("use splashimage: %lx\n", splash); | |
268 | video_display_bitmap(splash, 0, 0); | |
269 | } | |
270 | #endif | |
271 | return 0; | |
272 | } | |
273 | #endif | |
274 | ||
ea818dbb | 275 | #ifdef CONFIG_SYS_I2C_SOFT |
77e7273c JS |
276 | |
277 | void i2c_init_board(void) | |
278 | { | |
279 | u32 pin; | |
80733994 JS |
280 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
281 | at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; | |
77e7273c | 282 | |
80733994 JS |
283 | writel(1 << ATMEL_ID_PIOA, &pmc->pcer); |
284 | pin = ATMEL_PMX_AA_TWD | ATMEL_PMX_AA_TWCK; | |
77e7273c JS |
285 | writel(pin, &pio->pioa.idr); |
286 | writel(pin, &pio->pioa.pudr); | |
287 | writel(pin, &pio->pioa.per); | |
288 | writel(pin, &pio->pioa.oer); | |
289 | writel(pin, &pio->pioa.sodr); | |
290 | } | |
291 | ||
292 | #endif | |
293 | ||
294 | /*--------------------------------------------------------------------------*/ | |
295 | ||
296 | #ifdef CONFIG_STATUS_LED | |
297 | ||
298 | void __led_toggle(led_id_t mask) | |
299 | { | |
80733994 | 300 | at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; |
77e7273c JS |
301 | |
302 | if (readl(&pio->piod.odsr) & mask) | |
303 | writel(mask, &pio->piod.codr); | |
304 | else | |
305 | writel(mask, &pio->piod.codr); | |
306 | } | |
307 | ||
308 | void __led_init(led_id_t mask, int state) | |
309 | { | |
80733994 JS |
310 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
311 | at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; | |
77e7273c | 312 | |
80733994 | 313 | writel(1 << ATMEL_ID_PIOD, &pmc->pcer); /* Enable PIOB clock */ |
77e7273c JS |
314 | /* Disable peripherals on LEDs */ |
315 | writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.per); | |
316 | /* Enable pins as outputs */ | |
317 | writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.oer); | |
318 | /* Turn all LEDs OFF */ | |
319 | writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.sodr); | |
320 | ||
321 | __led_set(mask, state); | |
322 | } | |
323 | ||
324 | void __led_set(led_id_t mask, int state) | |
325 | { | |
80733994 | 326 | at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO; |
77e7273c JS |
327 | if (state == STATUS_LED_ON) |
328 | writel(mask, &pio->piod.codr); | |
329 | else | |
330 | writel(mask, &pio->piod.sodr); | |
331 | } | |
332 | ||
333 | #endif | |
334 | ||
335 | /*---------------------------------------------------------------------------*/ | |
336 | ||
54841ab5 | 337 | int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
77e7273c JS |
338 | { |
339 | int rcode = 0; | |
340 | ulong side; | |
341 | ulong bright; | |
342 | ||
343 | switch (argc) { | |
344 | case 3: | |
345 | side = simple_strtoul(argv[1], NULL, 10); | |
346 | bright = simple_strtoul(argv[2], NULL, 10); | |
347 | if ((side >= 0) && (side <= 3) && | |
348 | (bright >= 0) && (bright <= 1000)) { | |
349 | vcxk_setbrightness(side, bright); | |
350 | rcode = 0; | |
351 | } else { | |
352 | printf("parameters out of range\n"); | |
353 | printf("Usage:\n%s\n", cmdtp->usage); | |
354 | rcode = 1; | |
355 | } | |
356 | break; | |
357 | default: | |
358 | printf("Usage:\n%s\n", cmdtp->usage); | |
359 | rcode = 1; | |
360 | break; | |
361 | } | |
362 | return rcode; | |
363 | } | |
364 | ||
365 | /*---------------------------------------------------------------------------*/ | |
366 | ||
367 | U_BOOT_CMD( | |
368 | bright, 3, 0, do_brightness, | |
369 | "bright - sets the display brightness\n", | |
370 | " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n" | |
371 | ); | |
372 | ||
373 | /* EOF cpu9k2.c */ |