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3a473b2a WD |
1 | #include <config.h> |
2 | #include <74xx_7xx.h> | |
3 | #include "version.h" | |
4 | ||
5 | #include <ppc_asm.tmpl> | |
6 | #include <ppc_defs.h> | |
7 | ||
8 | #include <asm/cache.h> | |
9 | #include <asm/mmu.h> | |
10 | ||
11 | #include "../include/mv_gen_reg.h" | |
12 | ||
13 | #ifdef CONFIG_ECC | |
14 | /* Galileo specific asm code for initializing ECC */ | |
15 | .globl board_relocate_rom | |
16 | board_relocate_rom: | |
17 | mflr r7 | |
18 | /* update the location of the GT registers */ | |
6d0f6bcf | 19 | lis r11, CONFIG_SYS_GT_REGS@h |
3a473b2a WD |
20 | /* if we're using ECC, we must use the DMA engine to copy ourselves */ |
21 | bl start_idma_transfer_0 | |
22 | bl wait_for_idma_0 | |
23 | bl stop_idma_engine_0 | |
24 | ||
25 | mtlr r7 | |
26 | blr | |
27 | ||
28 | .globl board_init_ecc | |
29 | board_init_ecc: | |
30 | mflr r7 | |
31 | /* NOTE: r10 still contains the location we've been relocated to | |
6d0f6bcf | 32 | * which happens to be TOP_OF_RAM - CONFIG_SYS_MONITOR_LEN */ |
3a473b2a WD |
33 | |
34 | /* now that we're running from ram, init the rest of main memory | |
35 | * for ECC use */ | |
6d0f6bcf JCPV |
36 | lis r8, CONFIG_SYS_MONITOR_LEN@h |
37 | ori r8, r8, CONFIG_SYS_MONITOR_LEN@l | |
3a473b2a WD |
38 | |
39 | divw r3, r10, r8 | |
40 | ||
41 | /* set up the counter, and init the starting address */ | |
42 | mtctr r3 | |
43 | li r12, 0 | |
44 | ||
45 | /* bytes per transfer */ | |
46 | mr r5, r8 | |
47 | about_to_init_ecc: | |
48 | 1: mr r3, r12 | |
49 | mr r4, r12 | |
50 | bl start_idma_transfer_0 | |
51 | bl wait_for_idma_0 | |
52 | bl stop_idma_engine_0 | |
53 | add r12, r12, r8 | |
54 | bdnz 1b | |
55 | ||
56 | mtlr r7 | |
57 | blr | |
58 | ||
59 | /* r3: dest addr | |
60 | * r4: source addr | |
61 | * r5: byte count | |
62 | * r11: gt regbase | |
63 | * trashes: r6, r5 | |
64 | */ | |
65 | start_idma_transfer_0: | |
66 | /* set the byte count, including the OWN bit */ | |
67 | mr r6, r11 | |
68 | ori r6, r6, CHANNEL0_DMA_BYTE_COUNT | |
69 | stwbrx r5, 0, (r6) | |
70 | ||
71 | /* set the source address */ | |
72 | mr r6, r11 | |
73 | ori r6, r6, CHANNEL0_DMA_SOURCE_ADDRESS | |
74 | stwbrx r4, 0, (r6) | |
75 | ||
76 | /* set the dest address */ | |
77 | mr r6, r11 | |
78 | ori r6, r6, CHANNEL0_DMA_DESTINATION_ADDRESS | |
79 | stwbrx r3, 0, (r6) | |
80 | ||
81 | /* set the next record pointer */ | |
82 | li r5, 0 | |
83 | mr r6, r11 | |
84 | ori r6, r6, CHANNEL0NEXT_RECORD_POINTER | |
85 | stwbrx r5, 0, (r6) | |
86 | ||
87 | /* set the low control register */ | |
88 | /* bit 9 is NON chained mode, bit 31 is new style descriptors. | |
89 | bit 12 is channel enable */ | |
90 | ori r5, r5, (1 << 12) | (1 << 12) | (1 << 11) | |
91 | /* 15 shifted by 16 (oris) == bit 31 */ | |
92 | oris r5, r5, (1 << 15) | |
93 | mr r6, r11 | |
94 | ori r6, r6, CHANNEL0CONTROL | |
95 | stwbrx r5, 0, (r6) | |
96 | ||
97 | blr | |
98 | ||
99 | /* this waits for the bytecount to return to zero, indicating | |
100 | * that the trasfer is complete */ | |
101 | wait_for_idma_0: | |
102 | mr r5, r11 | |
103 | lis r6, 0xff | |
104 | ori r6, r6, 0xffff | |
105 | ori r5, r5, CHANNEL0_DMA_BYTE_COUNT | |
106 | 1: lwbrx r4, 0, (r5) | |
107 | and. r4, r4, r6 | |
108 | bne 1b | |
109 | ||
110 | blr | |
111 | ||
112 | /* this turns off channel 0 of the idma engine */ | |
113 | stop_idma_engine_0: | |
114 | /* shut off the DMA engine */ | |
115 | li r5, 0 | |
116 | mr r6, r11 | |
117 | ori r6, r6, CHANNEL0CONTROL | |
118 | stwbrx r5, 0, (r6) | |
119 | ||
120 | blr | |
121 | #endif | |
122 | ||
6d0f6bcf | 123 | #ifdef CONFIG_SYS_BOARD_ASM_INIT |
3a473b2a WD |
124 | /* NOTE: trashes r3-r7 */ |
125 | .globl board_asm_init | |
126 | board_asm_init: | |
127 | /* just move the GT registers to where they belong */ | |
6d0f6bcf JCPV |
128 | lis r3, CONFIG_SYS_DFL_GT_REGS@h |
129 | ori r3, r3, CONFIG_SYS_DFL_GT_REGS@l | |
130 | lis r4, CONFIG_SYS_GT_REGS@h | |
131 | ori r4, r4, CONFIG_SYS_GT_REGS@l | |
3a473b2a WD |
132 | li r5, INTERNAL_SPACE_DECODE |
133 | ||
134 | /* test to see if we've already moved */ | |
135 | lwbrx r6, r5, r4 | |
136 | andi. r6, r6, 0xffff | |
137 | /* check loading of R7 is: 0x0F80 should: 0xf800: DONE */ | |
138 | /* rlwinm r7, r4, 8, 16, 31 | |
139 | rlwinm r7, r4, 12, 16, 31 */ /* original */ | |
140 | rlwinm r7, r4, 16, 16, 31 | |
141 | /* -----------------------------------------------------*/ | |
142 | cmp cr0, r7, r6 | |
143 | beqlr | |
144 | ||
145 | /* nope, have to move the registers */ | |
146 | lwbrx r6, r5, r3 | |
147 | andis. r6, r6, 0xffff | |
148 | or r6, r6, r7 | |
149 | stwbrx r6, r5, r3 | |
150 | ||
151 | /* now, poll for the change */ | |
152 | 1: lwbrx r7, r5, r4 | |
153 | cmp cr0, r7, r6 | |
154 | bne 1b | |
155 | ||
156 | /* done! */ | |
157 | blr | |
158 | #endif | |
159 | ||
160 | /* For use of the debug LEDs */ | |
161 | .global led_on0_relocated | |
162 | led_on0_relocated: | |
163 | xor r21, r21, r21 | |
164 | xor r18, r18, r18 | |
165 | lis r18, 0xFC80 | |
166 | ori r18, r18, 0x8000 | |
167 | stw r21, 0x0(r18) | |
168 | /* stw r18, 0x0(r18) */ | |
169 | sync | |
170 | blr | |
171 | ||
172 | .global led_off0_relocated | |
173 | led_off0_relocated: | |
174 | xor r21, r21, r21 | |
175 | xor r18, r18, r18 | |
176 | lis r18, 0xFC81 | |
177 | ori r18, r18, 0x4000 | |
178 | stw r21, 0x0(r18) | |
179 | /* stw r18, 0x0(r18) */ | |
180 | sync | |
181 | blr | |
182 | ||
183 | .global led_on0 | |
184 | led_on0: | |
185 | xor r18, r18, r18 | |
186 | lis r18, 0x1c80 | |
187 | ori r18, r18, 0x8000 | |
188 | stw r18, 0x0(r18) | |
189 | sync | |
190 | blr | |
191 | ||
192 | .global led_off0 | |
193 | led_off0: | |
194 | xor r18, r18, r18 | |
195 | lis r18, 0x1c81 | |
196 | ori r18, r18, 0x4000 | |
197 | stw r18, 0x0(r18) | |
198 | sync | |
199 | blr | |
200 | ||
201 | .global led_on1 | |
202 | led_on1: | |
203 | xor r18, r18, r18 | |
204 | lis r18, 0x1c80 | |
205 | ori r18, r18, 0xc000 | |
206 | stw r18, 0x0(r18) | |
207 | sync | |
208 | blr | |
209 | ||
210 | .global led_off1 | |
211 | led_off1: | |
212 | xor r18, r18, r18 | |
213 | lis r18, 0x1c81 | |
214 | ori r18, r18, 0x8000 | |
215 | stw r18, 0x0(r18) | |
216 | sync | |
217 | blr | |
218 | ||
219 | .global led_on2 | |
220 | led_on2: | |
221 | xor r18, r18, r18 | |
222 | lis r18, 0x1c81 | |
223 | ori r18, r18, 0x0000 | |
224 | stw r18, 0x0(r18) | |
225 | sync | |
226 | blr | |
227 | ||
228 | .global led_off2 | |
229 | led_off2: | |
230 | xor r18, r18, r18 | |
231 | lis r18, 0x1c81 | |
232 | ori r18, r18, 0xc000 | |
233 | stw r18, 0x0(r18) | |
234 | sync | |
235 | blr |