[people/ms/u-boot.git] / board / a3m071 / mt46v16m16-75.h

/*
 * (C) Copyright 2004
 * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#define SDRAM_DDR		/* is DDR */

#if defined(CONFIG_MPC5200)
/* Settings for XLB = 132 MHz */
#define SDRAM_MODE	0x018D0000
#define SDRAM_EMODE	0x40090000
#define SDRAM_CONTROL	0x704f0f00
#define SDRAM_CONFIG1	0x73722930
#define SDRAM_CONFIG2	0x47770000
#define SDRAM_TAPDELAY	0x10000000

#else
#error CONFIG_MPC5200 not defined
#endif
Commit	Line	Data
13b4f639 SR	1	/*
	2	* (C) Copyright 2004
	3	* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*/
	18
	19	#define SDRAM_DDR /* is DDR */
	20
	21	#if defined(CONFIG_MPC5200)
	22	/* Settings for XLB = 132 MHz */
	23	#define SDRAM_MODE 0x018D0000
	24	#define SDRAM_EMODE 0x40090000
	25	#define SDRAM_CONTROL 0x704f0f00
	26	#define SDRAM_CONFIG1 0x73722930
	27	#define SDRAM_CONFIG2 0x47770000
	28	#define SDRAM_TAPDELAY 0x10000000
	29
	30	#else
	31	#error CONFIG_MPC5200 not defined
	32	#endif