projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| aebf00fc MS |
1 | /* |
| 2 | * (C) Copyright 2000 | |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
| 4 | * | |
| 1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
| aebf00fc MS |
6 | */ |
| 7 | ||
| 8 | OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm") | |
| 9 | OUTPUT_ARCH (arm) | |
| 10 | ENTRY (_start) | |
| 11 | SECTIONS | |
| 12 | { | |
| 13 | . = 0x00000000; | |
| 14 | ||
| 15 | . = ALIGN (4); | |
| 16 | .text : { | |
| d026dec8 | 17 | *(.__image_copy_start) |
| af050485 | 18 | arch/arm/cpu/ixp/start.o(.text*) |
| e2906a59 MY |
19 | net/built-in.o(.text*) |
| 20 | board/actux2/built-in.o(.text*) | |
| 21 | arch/arm/cpu/ixp/built-in.o(.text*) | |
| 22 | drivers/input/built-in.o(.text*) | |
| aebf00fc MS |
23 | |
| 24 | . = env_offset; | |
| af050485 MS |
25 | common/env_embedded.o(.ppcenv) |
| 26 | *(.text*) | |
| aebf00fc MS |
27 | } |
| 28 | ||
| 3ebd1cbc | 29 | . = ALIGN(4); |
| aebf00fc | 30 | .rodata : { |
| f62fb999 | 31 | *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) |
| aebf00fc | 32 | } |
| 3ebd1cbc | 33 | . = ALIGN(4); |
| aebf00fc | 34 | .data : { |
| af050485 | 35 | *(.data*) |
| aebf00fc | 36 | } |
| 3ebd1cbc | 37 | . = ALIGN(4); |
| aebf00fc MS |
38 | .got : { |
| 39 | *(.got) | |
| 40 | } | |
| aebf00fc | 41 | . =.; |
| aebf00fc | 42 | |
| 55675142 MV |
43 | . = ALIGN(4); |
| 44 | .u_boot_list : { | |
| ef123c52 | 45 | KEEP(*(SORT(.u_boot_list*))); |
| 55675142 MV |
46 | } |
| 47 | ||
| aebf00fc | 48 | . = ALIGN (4); |
| 7086e91b | 49 | |
| d026dec8 AA |
50 | .image_copy_end : |
| 51 | { | |
| 52 | *(.__image_copy_end) | |
| 53 | } | |
| 7086e91b | 54 | |
| 47bd65ef AA |
55 | .rel_dyn_start : |
| 56 | { | |
| 57 | *(.__rel_dyn_start) | |
| 58 | } | |
| 59 | ||
| af050485 | 60 | .rel.dyn : { |
| af050485 | 61 | *(.rel*) |
| 47bd65ef AA |
62 | } |
| 63 | ||
| 64 | .rel_dyn_end : | |
| 65 | { | |
| 66 | *(.__rel_dyn_end) | |
| af050485 MS |
67 | } |
| 68 | ||
| 3ebd1cbc AA |
69 | _end = .; |
| 70 | ||
| f84a7b8f AA |
71 | /* |
| 72 | * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c | |
| 73 | * __bss_base and __bss_limit are for linker only (overlay ordering) | |
| 74 | */ | |
| 75 | ||
| 3ebd1cbc AA |
76 | .bss_start __rel_dyn_start (OVERLAY) : { |
| 77 | KEEP(*(.__bss_start)); | |
| f84a7b8f | 78 | __bss_base = .; |
| 3ebd1cbc AA |
79 | } |
| 80 | ||
| f84a7b8f | 81 | .bss __bss_base (OVERLAY) : { |
| af050485 MS |
82 | *(.bss*) |
| 83 | . = ALIGN(4); | |
| f84a7b8f | 84 | __bss_limit = .; |
| aebf00fc | 85 | } |
| f84a7b8f AA |
86 | .bss_end __bss_limit (OVERLAY) : { |
| 87 | KEEP(*(.__bss_end)); | |
| 3ebd1cbc AA |
88 | } |
| 89 | ||
| 47ed5dd0 AA |
90 | .dynsym _end : { *(.dynsym) } |
| 91 | .dynbss : { *(.dynbss) } | |
| 92 | .dynstr : { *(.dynstr*) } | |
| 93 | .dynamic : { *(.dynamic*) } | |
| 94 | .hash : { *(.hash*) } | |
| 95 | .plt : { *(.plt*) } | |
| 96 | .interp : { *(.interp*) } | |
| 97 | .gnu : { *(.gnu*) } | |
| 98 | .ARM.exidx : { *(.ARM.exidx*) } | |
| aebf00fc | 99 | } |