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8a316c9b SR |
1 | /* |
2 | * (C) Copyright 2004-2005 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * (C) Copyright 2002 Jun Gu <jung@artesyncp.com> | |
6 | * Add support for Am29F016D and dynamic switch setting. | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | /* | |
28 | * Modified 4/5/2001 | |
29 | * Wait for completion of each sector erase command issued | |
30 | * 4/5/2001 | |
31 | * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com | |
32 | */ | |
33 | ||
34 | #include <common.h> | |
35 | #include <ppc4xx.h> | |
36 | #include <asm/processor.h> | |
37 | ||
38 | #undef DEBUG | |
39 | ||
40 | #ifdef DEBUG | |
41 | #define DEBUGF(x...) printf(x) | |
42 | #else | |
43 | #define DEBUGF(x...) | |
44 | #endif /* DEBUG */ | |
45 | ||
46 | #define BOOT_SMALL_FLASH 0x40 /* 01000000 */ | |
47 | #define FLASH_ONBD_N 2 /* 00000010 */ | |
48 | #define FLASH_SRAM_SEL 1 /* 00000001 */ | |
49 | #define FLASH_ONBD_N 2 /* 00000010 */ | |
50 | #define FLASH_SRAM_SEL 1 /* 00000001 */ | |
51 | ||
52 | #define BOOT_SMALL_FLASH_VAL 4 | |
53 | #define FLASH_ONBD_N_VAL 2 | |
54 | #define FLASH_SRAM_SEL_VAL 1 | |
55 | ||
6d0f6bcf | 56 | flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
8a316c9b | 57 | |
6d0f6bcf | 58 | static unsigned long flash_addr_table[8][CONFIG_SYS_MAX_FLASH_BANKS] = { |
8a316c9b SR |
59 | {0xFF800000, 0xFF880000, 0xFFC00000}, /* 0:000: configuraton 4 */ |
60 | {0xFF900000, 0xFF980000, 0xFFC00000}, /* 1:001: configuraton 3 */ | |
61 | {0x00000000, 0x00000000, 0x00000000}, /* 2:010: configuraton 8 */ | |
62 | {0x00000000, 0x00000000, 0x00000000}, /* 3:011: configuraton 7 */ | |
63 | {0xFFE00000, 0xFFF00000, 0xFF800000}, /* 4:100: configuraton 2 */ | |
64 | {0xFFF00000, 0xFFF80000, 0xFF800000}, /* 5:101: configuraton 1 */ | |
65 | {0x00000000, 0x00000000, 0x00000000}, /* 6:110: configuraton 6 */ | |
66 | {0x00000000, 0x00000000, 0x00000000} /* 7:111: configuraton 5 */ | |
67 | }; | |
68 | ||
69 | /* | |
70 | * include common flash code (for amcc boards) | |
71 | */ | |
72 | #include "../common/flash.c" | |
73 | ||
74 | /*----------------------------------------------------------------------- | |
75 | * Functions | |
76 | */ | |
77 | static ulong flash_get_size(vu_long * addr, flash_info_t * info); | |
78 | static int write_word(flash_info_t * info, ulong dest, ulong data); | |
79 | ||
80 | /*----------------------------------------------------------------------- | |
81 | */ | |
82 | ||
83 | unsigned long flash_init(void) | |
84 | { | |
85 | unsigned long total_b = 0; | |
6d0f6bcf JCPV |
86 | unsigned long size_b[CONFIG_SYS_MAX_FLASH_BANKS]; |
87 | unsigned char *fpga_base = (unsigned char *)CONFIG_SYS_FPGA_BASE; | |
8a316c9b SR |
88 | unsigned char switch_status; |
89 | unsigned short index = 0; | |
90 | int i; | |
91 | ||
92 | /* read FPGA base register FPGA_REG0 */ | |
93 | switch_status = *fpga_base; | |
94 | ||
95 | /* check the bitmap of switch status */ | |
96 | if (switch_status & BOOT_SMALL_FLASH) { | |
97 | index += BOOT_SMALL_FLASH_VAL; | |
98 | } | |
99 | if (switch_status & FLASH_ONBD_N) { | |
100 | index += FLASH_ONBD_N_VAL; | |
101 | } | |
102 | if (switch_status & FLASH_SRAM_SEL) { | |
103 | index += FLASH_SRAM_SEL_VAL; | |
104 | } | |
105 | ||
106 | DEBUGF("\n"); | |
107 | DEBUGF("FLASH: Index: %d\n", index); | |
108 | ||
109 | /* Init: no FLASHes known */ | |
6d0f6bcf | 110 | for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { |
8a316c9b SR |
111 | flash_info[i].flash_id = FLASH_UNKNOWN; |
112 | flash_info[i].sector_count = -1; | |
113 | flash_info[i].size = 0; | |
114 | ||
115 | /* check whether the address is 0 */ | |
116 | if (flash_addr_table[index][i] == 0) { | |
117 | continue; | |
118 | } | |
119 | ||
120 | /* call flash_get_size() to initialize sector address */ | |
121 | size_b[i] = | |
122 | flash_get_size((vu_long *) flash_addr_table[index][i], | |
123 | &flash_info[i]); | |
124 | flash_info[i].size = size_b[i]; | |
125 | if (flash_info[i].flash_id == FLASH_UNKNOWN) { | |
126 | printf | |
127 | ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", | |
128 | i, size_b[i], size_b[i] << 20); | |
129 | flash_info[i].sector_count = -1; | |
130 | flash_info[i].size = 0; | |
131 | } | |
132 | ||
133 | /* Monitor protection ON by default */ | |
6d0f6bcf JCPV |
134 | (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE, |
135 | CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1, | |
8a316c9b | 136 | &flash_info[i]); |
5a1aceb0 | 137 | #ifdef CONFIG_ENV_IS_IN_FLASH |
0e8d1586 JCPV |
138 | (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR, |
139 | CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, | |
8a316c9b | 140 | &flash_info[i]); |
0e8d1586 JCPV |
141 | (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR_REDUND, |
142 | CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, | |
8a316c9b SR |
143 | &flash_info[i]); |
144 | #endif | |
145 | ||
146 | total_b += flash_info[i].size; | |
147 | } | |
148 | ||
149 | return total_b; | |
150 | } |