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Merge branch 'master' of git://git.denx.de/u-boot-imx
[people/ms/u-boot.git] / board / amcc / yucca / flash.c
CommitLineData
6c5879f3
MB		 1/*
2 * (C) Copyright 2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
6 * Add support for Am29F016D and dynamic switch setting.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27/*
28 * Modified 4/5/2001
29 * Wait for completion of each sector erase command issued
30 * 4/5/2001
31 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
32 */
33
34#include <common.h>
b36df561 35#include <asm/ppc4xx.h>
6c5879f3 36#include <asm/processor.h>
b36df561 37#include <asm/ppc440.h>
6c5879f3
MB		 38#include "yucca.h"
39
40#ifdef DEBUG
41#define DEBUGF(x...) printf(x)
42#else
43#define DEBUGF(x...)
44#endif /* DEBUG */
45
6d0f6bcf 46flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
6c5879f3
MB		 47
48/*
49 * Mark big flash bank (16 bit instead of 8 bit access) in address with bit 0
50 */
6d0f6bcf 51static unsigned long flash_addr_table[][CONFIG_SYS_MAX_FLASH_BANKS] = {
6c5879f3
MB		 52 {0xfff00000, 0xfff80000, 0xe7c00001}, /* 0:boot from small flash */
53 {0x00000000, 0x00000000, 0x00000000}, /* 1:boot from pci 66 */
54 {0x00000000, 0x00000000, 0x00000000}, /* 2:boot from nand flash */
55 {0xe7F00000, 0xe7F80000, 0xFFC00001}, /* 3:boot from big flash 33*/
56 {0xe7F00000, 0xe7F80000, 0xFFC00001}, /* 4:boot from big flash 66*/
57 {0x00000000, 0x00000000, 0x00000000}, /* 5:boot from */
58 {0x00000000, 0x00000000, 0x00000000}, /* 6:boot from pci 66 */
59 {0x00000000, 0x00000000, 0x00000000}, /* 7:boot from */
60 {0xfff00000, 0xfff80000, 0xe7c00001}, /* 8:boot from small flash */
61};
62
63/*
64 * include common flash code (for amcc boards)
65 */
66/*-----------------------------------------------------------------------
67 * Functions
68 */
69static int write_word(flash_info_t * info, ulong dest, ulong data);
6d0f6bcf 70#ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
6c5879f3
MB		 71static int write_word_1(flash_info_t * info, ulong dest, ulong data);
72static int write_word_2(flash_info_t * info, ulong dest, ulong data);
73static int flash_erase_1(flash_info_t * info, int s_first, int s_last);
74static int flash_erase_2(flash_info_t * info, int s_first, int s_last);
75static ulong flash_get_size_1(vu_long * addr, flash_info_t * info);
76static ulong flash_get_size_2(vu_long * addr, flash_info_t * info);
77#endif
78
79void flash_print_info(flash_info_t * info)
80{
81 int i;
82 int k;
83 int size;
84 int erased;
85 volatile unsigned long *flash;
86
87 if (info->flash_id == FLASH_UNKNOWN) {
88 printf("missing or unknown FLASH type\n");
89 return;
90 }
91
92 switch (info->flash_id & FLASH_VENDMASK) {
93 case FLASH_MAN_AMD:
94 printf("AMD ");
95 break;
96 case FLASH_MAN_STM:
97 printf("STM ");
98 break;
99 case FLASH_MAN_FUJ:
100 printf("FUJITSU ");
101 break;
102 case FLASH_MAN_SST:
103 printf("SST ");
104 break;
105 case FLASH_MAN_MX:
106 printf("MIXC ");
107 break;
108 default:
109 printf("Unknown Vendor ");
110 break;
111 }
112
113 switch (info->flash_id & FLASH_TYPEMASK) {
114 case FLASH_AM040:
115 printf("AM29F040 (512 Kbit, uniform sector size)\n");
116 break;
117 case FLASH_AM400B:
118 printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
119 break;
120 case FLASH_AM400T:
121 printf("AM29LV400T (4 Mbit, top boot sector)\n");
122 break;
123 case FLASH_AM800B:
124 printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
125 break;
126 case FLASH_AM800T:
127 printf("AM29LV800T (8 Mbit, top boot sector)\n");
128 break;
129 case FLASH_AMD016:
130 printf("AM29F016D (16 Mbit, uniform sector size)\n");
131 break;
132 case FLASH_AM160B:
133 printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
134 break;
135 case FLASH_AM160T:
136 printf("AM29LV160T (16 Mbit, top boot sector)\n");
137 break;
138 case FLASH_AM320B:
139 printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
140 break;
141 case FLASH_AM320T:
142 printf("AM29LV320T (32 Mbit, top boot sector)\n");
143 break;
144 case FLASH_AM033C:
145 printf("AM29LV033C (32 Mbit, top boot sector)\n");
146 break;
147 case FLASH_SST800A:
148 printf("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
149 break;
150 case FLASH_SST160A:
151 printf("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
152 break;
153 case FLASH_STMW320DT:
154 printf ("M29W320DT (32 M, top sector)\n");
155 break;
156 case FLASH_MXLV320T:
157 printf ("MXLV320T (32 Mbit, top sector)\n");
158 break;
159 default:
160 printf("Unknown Chip Type\n");
161 break;
162 }
163
164 printf(" Size: %ld KB in %d Sectors\n",
165 info->size >> 10, info->sector_count);
166
167 printf(" Sector Start Addresses:");
168 for (i = 0; i < info->sector_count; ++i) {
169 /*
170 * Check if whole sector is erased
171 */
172 if (i != (info->sector_count - 1))
173 size = info->start[i + 1] - info->start[i];
174 else
175 size = info->start[0] + info->size - info->start[i];
176 erased = 1;
177 flash = (volatile unsigned long *)info->start[i];
178 size = size >> 2; /* divide by 4 for longword access */
179 for (k = 0; k < size; k++) {
180 if (*flash++ != 0xffffffff) {
181 erased = 0;
182 break;
183 }
184 }
185
186 if ((i % 5) == 0)
187 printf("\n ");
188 printf(" %08lX%s%s",
189 info->start[i],
190 erased ? " E" : " ",
191 info->protect[i] ? "RO " : " ");
192 }
193 printf("\n");
194 return;
195}
196
197
198/*
199 * The following code cannot be run from FLASH!
200 */
6d0f6bcf 201#ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
6c5879f3
MB		 202static ulong flash_get_size(vu_long * addr, flash_info_t * info)
203{
204 /* bit 0 used for big flash marking */
205 if ((ulong)addr & 0x1)
206 return flash_get_size_2((vu_long *)((ulong)addr & 0xfffffffe), info);
207 else
208 return flash_get_size_1(addr, info);
209}
210
211static ulong flash_get_size_1(vu_long * addr, flash_info_t * info)
212#else
213static ulong flash_get_size(vu_long * addr, flash_info_t * info)
214#endif
215{
216 short i;
6d0f6bcf 217 CONFIG_SYS_FLASH_WORD_SIZE value;
6c5879f3 218 ulong base = (ulong) addr;
6d0f6bcf 219 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) addr;
6c5879f3
MB		 220
221 DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
222
223 /* Write auto select command: read Manufacturer ID */
6d0f6bcf
JCPV		 224 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
225 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
226 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00900090;
6c5879f3
MB		 227 udelay(1000);
228
229 value = addr2[0];
230 DEBUGF("FLASH MANUFACT: %x\n", value);
231
232 switch (value) {
6d0f6bcf 233 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_MANUFACT:
6c5879f3
MB		 234 info->flash_id = FLASH_MAN_AMD;
235 break;
6d0f6bcf 236 case (CONFIG_SYS_FLASH_WORD_SIZE) FUJ_MANUFACT:
6c5879f3
MB		 237 info->flash_id = FLASH_MAN_FUJ;
238 break;
6d0f6bcf 239 case (CONFIG_SYS_FLASH_WORD_SIZE) SST_MANUFACT:
6c5879f3
MB		 240 info->flash_id = FLASH_MAN_SST;
241 break;
6d0f6bcf 242 case (CONFIG_SYS_FLASH_WORD_SIZE) STM_MANUFACT:
6c5879f3
MB		 243 info->flash_id = FLASH_MAN_STM;
244 break;
245 default:
246 info->flash_id = FLASH_UNKNOWN;
247 info->sector_count = 0;
248 info->size = 0;
249 return (0); /* no or unknown flash */
250 }
251
252 value = addr2[1]; /* device ID */
253 DEBUGF("\nFLASH DEVICEID: %x\n", value);
254
255 switch (value) {
6d0f6bcf 256 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV040B:
6c5879f3
MB		 257 info->flash_id += FLASH_AM040;
258 info->sector_count = 8;
259 info->size = 0x0080000; /* => 512 ko */
260 break;
261
6d0f6bcf 262 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_F040B:
6c5879f3
MB		 263 info->flash_id += FLASH_AM040;
264 info->sector_count = 8;
265 info->size = 0x0080000; /* => 512 ko */
266 break;
267
6d0f6bcf 268 case (CONFIG_SYS_FLASH_WORD_SIZE) STM_ID_M29W040B:
6c5879f3
MB		 269 info->flash_id += FLASH_AM040;
270 info->sector_count = 8;
271 info->size = 0x0080000; /* => 512 ko */
272 break;
273
6d0f6bcf 274 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_F016D:
6c5879f3
MB		 275 info->flash_id += FLASH_AMD016;
276 info->sector_count = 32;
277 info->size = 0x00200000;
278 break; /* => 2 MB */
279
6d0f6bcf 280 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV033C:
6c5879f3
MB		 281 info->flash_id += FLASH_AMDLV033C;
282 info->sector_count = 64;
283 info->size = 0x00400000;
284 break; /* => 4 MB */
285
6d0f6bcf 286 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV400T:
6c5879f3
MB		 287 info->flash_id += FLASH_AM400T;
288 info->sector_count = 11;
289 info->size = 0x00080000;
290 break; /* => 0.5 MB */
291
6d0f6bcf 292 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV400B:
6c5879f3
MB		 293 info->flash_id += FLASH_AM400B;
294 info->sector_count = 11;
295 info->size = 0x00080000;
296 break; /* => 0.5 MB */
297
6d0f6bcf 298 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV800T:
6c5879f3
MB		 299 info->flash_id += FLASH_AM800T;
300 info->sector_count = 19;
301 info->size = 0x00100000;
302 break; /* => 1 MB */
303
6d0f6bcf 304 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV800B:
6c5879f3
MB		 305 info->flash_id += FLASH_AM800B;
306 info->sector_count = 19;
307 info->size = 0x00100000;
308 break; /* => 1 MB */
309
6d0f6bcf 310 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV160T:
6c5879f3
MB		 311 info->flash_id += FLASH_AM160T;
312 info->sector_count = 35;
313 info->size = 0x00200000;
314 break; /* => 2 MB */
315
6d0f6bcf 316 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV160B:
6c5879f3
MB		 317 info->flash_id += FLASH_AM160B;
318 info->sector_count = 35;
319 info->size = 0x00200000;
320 break; /* => 2 MB */
321
322 default:
323 info->flash_id = FLASH_UNKNOWN;
324 return (0); /* => no or unknown flash */
325 }
326
327 /* set up sector start address table */
328 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
329 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
330 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
331 for (i = 0; i < info->sector_count; i++)
332 info->start[i] = base + (i * 0x00010000);
333 } else {
334 if (info->flash_id & FLASH_BTYPE) {
335 /* set sector offsets for bottom boot block type */
336 info->start[0] = base + 0x00000000;
337 info->start[1] = base + 0x00004000;
338 info->start[2] = base + 0x00006000;
339 info->start[3] = base + 0x00008000;
340 for (i = 4; i < info->sector_count; i++) {
341 info->start[i] =
342 base + (i * 0x00010000) - 0x00030000;
343 }
344 } else {
345 /* set sector offsets for top boot block type */
346 i = info->sector_count - 1;
347 info->start[i--] = base + info->size - 0x00004000;
348 info->start[i--] = base + info->size - 0x00006000;
349 info->start[i--] = base + info->size - 0x00008000;
350 for (; i >= 0; i--) {
351 info->start[i] = base + i * 0x00010000;
352 }
353 }
354 }
355
356 /* check for protected sectors */
357 for (i = 0; i < info->sector_count; i++) {
358 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
359 /* D0 = 1 if protected */
6d0f6bcf 360 addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]);
6c5879f3
MB		 361
362 /* For AMD29033C flash we need to resend the command of *
363 * reading flash protection for upper 8 Mb of flash */
364 if (i == 32) {
6d0f6bcf
JCPV		 365 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0xAAAAAAAA;
366 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x55555555;
367 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x90909090;
6c5879f3
MB		 368 }
369
370 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
371 info->protect[i] = 0;
372 else
373 info->protect[i] = addr2[2] & 1;
374 }
375
376 /* issue bank reset to return to read mode */
6d0f6bcf 377 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0;
6c5879f3
MB		 378
379 return (info->size);
380}
381
382static int wait_for_DQ7_1(flash_info_t * info, int sect)
383{
384 ulong start, now, last;
6d0f6bcf
JCPV		 385 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr =
386 (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
6c5879f3
MB		 387
388 start = get_timer(0);
389 last = start;
6d0f6bcf
JCPV		 390 while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
391 (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) {
392 if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
6c5879f3
MB		 393 printf("Timeout\n");
394 return -1;
395 }
396 /* show that we're waiting */
397 if ((now - last) > 1000) { /* every second */
398 putc('.');
399 last = now;
400 }
401 }
402 return 0;
403}
404
6d0f6bcf 405#ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
6c5879f3
MB		 406int flash_erase(flash_info_t * info, int s_first, int s_last)
407{
408 if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
409 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
410 ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) ||
411 ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T)) {
412 return flash_erase_2(info, s_first, s_last);
413 } else {
414 return flash_erase_1(info, s_first, s_last);
415 }
416}
417
418static int flash_erase_1(flash_info_t * info, int s_first, int s_last)
419#else
420int flash_erase(flash_info_t * info, int s_first, int s_last)
421#endif
422{
6d0f6bcf
JCPV		 423 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
424 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
6c5879f3
MB		 425 int flag, prot, sect, l_sect;
426 int i;
427
428 if ((s_first < 0) || (s_first > s_last)) {
429 if (info->flash_id == FLASH_UNKNOWN)
430 printf("- missing\n");
431 else
432 printf("- no sectors to erase\n");
433 return 1;
434 }
435
436 if (info->flash_id == FLASH_UNKNOWN) {
437 printf("Can't erase unknown flash type - aborted\n");
438 return 1;
439 }
440
441 prot = 0;
442 for (sect = s_first; sect <= s_last; ++sect) {
443 if (info->protect[sect])
444 prot++;
445 }
446
447 if (prot)
448 printf("- Warning: %d protected sectors will not be erased!", prot);
449
450 printf("\n");
451
452 l_sect = -1;
453
454 /* Disable interrupts which might cause a timeout here */
455 flag = disable_interrupts();
456
457 /* Start erase on unprotected sectors */
458 for (sect = s_first; sect <= s_last; sect++) {
459 if (info->protect[sect] == 0) { /* not protected */
6d0f6bcf 460 addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
6c5879f3
MB		 461
462 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
6d0f6bcf
JCPV		 463 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
464 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
465 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
466 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
467 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
468 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00500050; /* block erase */
6c5879f3
MB		 469 for (i = 0; i < 50; i++)
470 udelay(1000); /* wait 1 ms */
471 } else {
6d0f6bcf
JCPV		 472 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
473 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
474 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
475 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
476 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
477 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
6c5879f3
MB		 478 }
479 l_sect = sect;
480 /*
481 * Wait for each sector to complete, it's more
482 * reliable. According to AMD Spec, you must
483 * issue all erase commands within a specified
484 * timeout. This has been seen to fail, especially
485 * if printf()s are included (for debug)!!
486 */
487 wait_for_DQ7_1(info, sect);
488 }
489 }
490
491 /* re-enable interrupts if necessary */
492 if (flag)
493 enable_interrupts();
494
495 /* wait at least 80us - let's wait 1 ms */
496 udelay(1000);
497
498 /* reset to read mode */
6d0f6bcf
JCPV		 499 addr = (CONFIG_SYS_FLASH_WORD_SIZE *) info->start[0];
500 addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
6c5879f3
MB		 501
502 printf(" done\n");
503 return 0;
504}
505
506/*-----------------------------------------------------------------------
507 * Copy memory to flash, returns:
508 * 0 - OK
509 * 1 - write timeout
510 * 2 - Flash not erased
511 */
512int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
513{
514 ulong cp, wp, data;
515 int i, l, rc;
516
517 wp = (addr & ~3); /* get lower word aligned address */
518
519 /*
520 * handle unaligned start bytes
521 */
522 if ((l = addr - wp) != 0) {
523 data = 0;
524 for (i = 0, cp = wp; i < l; ++i, ++cp)
525 data = (data << 8) | (*(uchar *) cp);
526
527 for (; i < 4 && cnt > 0; ++i) {
528 data = (data << 8) | *src++;
529 --cnt;
530 ++cp;
531 }
532
533 for (; cnt == 0 && i < 4; ++i, ++cp)
534 data = (data << 8) | (*(uchar *) cp);
535
536 if ((rc = write_word(info, wp, data)) != 0)
537 return (rc);
538
539 wp += 4;
540 }
541
542 /*
543 * handle word aligned part
544 */
545 while (cnt >= 4) {
546 data = 0;
547 for (i = 0; i < 4; ++i)
548 data = (data << 8) | *src++;
549
550 if ((rc = write_word(info, wp, data)) != 0)
551 return (rc);
552
553 wp += 4;
554 cnt -= 4;
555 }
556
557 if (cnt == 0)
558 return (0);
559
560 /*
561 * handle unaligned tail bytes
562 */
563 data = 0;
564 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
565 data = (data << 8) | *src++;
566 --cnt;
567 }
568 for (; i < 4; ++i, ++cp)
569 data = (data << 8) | (*(uchar *) cp);
570
571 return (write_word(info, wp, data));
572}
573
574/*-----------------------------------------------------------------------
575 * Copy memory to flash, returns:
576 * 0 - OK
577 * 1 - write timeout
578 * 2 - Flash not erased
579 */
6d0f6bcf 580#ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
6c5879f3
MB		 581static int write_word(flash_info_t * info, ulong dest, ulong data)
582{
583 if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
584 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
585 ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) ||
586 ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T)) {
587 return write_word_2(info, dest, data);
588 } else {
589 return write_word_1(info, dest, data);
590 }
591}
592
593static int write_word_1(flash_info_t * info, ulong dest, ulong data)
594#else
595static int write_word(flash_info_t * info, ulong dest, ulong data)
596#endif
597{
6d0f6bcf
JCPV		 598 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
599 volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *) dest;
600 volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *) & data;
6c5879f3
MB		 601 ulong start;
602 int i, flag;
603
604 /* Check if Flash is (sufficiently) erased */
605 if ((*((vu_long *)dest) & data) != data)
606 return (2);
607
6d0f6bcf 608 for (i = 0; i < 4 / sizeof(CONFIG_SYS_FLASH_WORD_SIZE); i++) {
6c5879f3
MB		 609 /* Disable interrupts which might cause a timeout here */
610 flag = disable_interrupts();
611
6d0f6bcf
JCPV		 612 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
613 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
614 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00A000A0;
6c5879f3
MB		 615
616 dest2[i] = data2[i];
617
618 /* re-enable interrupts if necessary */
619 if (flag)
620 enable_interrupts();
621
622 /* data polling for D7 */
623 start = get_timer(0);
6d0f6bcf
JCPV		 624 while ((dest2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
625 (data2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080)) {
6c5879f3 626
6d0f6bcf 627 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
6c5879f3
MB		 628 return (1);
629 }
630 }
631
632 return (0);
633}
634
6d0f6bcf 635#ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
6c5879f3 636
6d0f6bcf
JCPV		 637#undef CONFIG_SYS_FLASH_WORD_SIZE
638#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short
6c5879f3
MB		 639
640/*
641 * The following code cannot be run from FLASH!
642 */
643static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
644{
645 short i;
646 int n;
6d0f6bcf 647 CONFIG_SYS_FLASH_WORD_SIZE value;
6c5879f3 648 ulong base = (ulong) addr;
6d0f6bcf 649 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) addr;
6c5879f3
MB		 650
651 DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
652
653 /* issue bank reset to return to read mode */
6d0f6bcf 654 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0;
6c5879f3 655 /* Write auto select command: read Manufacturer ID */
6d0f6bcf
JCPV		 656 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
657 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
658 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00900090;
6c5879f3
MB		 659 udelay(1000);
660
661 value = addr2[0];
662 DEBUGF("FLASH MANUFACT: %x\n", value);
663
664 switch (value) {
6d0f6bcf 665 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_MANUFACT:
6c5879f3
MB		 666 info->flash_id = FLASH_MAN_AMD;
667 break;
6d0f6bcf 668 case (CONFIG_SYS_FLASH_WORD_SIZE) FUJ_MANUFACT:
6c5879f3
MB		 669 info->flash_id = FLASH_MAN_FUJ;
670 break;
6d0f6bcf 671 case (CONFIG_SYS_FLASH_WORD_SIZE) SST_MANUFACT:
6c5879f3
MB		 672 info->flash_id = FLASH_MAN_SST;
673 break;
6d0f6bcf 674 case (CONFIG_SYS_FLASH_WORD_SIZE) STM_MANUFACT:
6c5879f3
MB		 675 info->flash_id = FLASH_MAN_STM;
676 break;
6d0f6bcf 677 case (CONFIG_SYS_FLASH_WORD_SIZE) MX_MANUFACT:
6c5879f3
MB		 678 info->flash_id = FLASH_MAN_MX;
679 break;
680 default:
681 info->flash_id = FLASH_UNKNOWN;
682 info->sector_count = 0;
683 info->size = 0;
684 return (0); /* no or unknown flash */
685 }
686
687 value = addr2[1]; /* device ID */
688 DEBUGF("\nFLASH DEVICEID: %x\n", value);
689
690 switch (value) {
6d0f6bcf 691 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320T:
6c5879f3
MB		 692 info->flash_id += FLASH_AM320T;
693 info->sector_count = 71;
694 info->size = 0x00400000;
695 break; /* => 4 MB */
6d0f6bcf 696 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320B:
6c5879f3
MB		 697 info->flash_id += FLASH_AM320B;
698 info->sector_count = 71;
699 info->size = 0x00400000;
700 break; /* => 4 MB */
6d0f6bcf 701 case (CONFIG_SYS_FLASH_WORD_SIZE)STM_ID_29W320DT:
6c5879f3
MB		 702 info->flash_id += FLASH_STMW320DT;
703 info->sector_count = 67;
704 info->size = 0x00400000;
705 break; /* => 4 MB */
6d0f6bcf 706 case (CONFIG_SYS_FLASH_WORD_SIZE)MX_ID_LV320T:
6c5879f3
MB		 707 info->flash_id += FLASH_MXLV320T;
708 info->sector_count = 71;
709 info->size = 0x00400000;
710 break; /* => 4 MB */
711 default:
712 info->flash_id = FLASH_UNKNOWN;
713 return (0); /* => no or unknown flash */
714 }
715
716 /* set up sector start address table */
717 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
718 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
719 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
720 for (i = 0; i < info->sector_count; i++)
721 info->start[i] = base + (i * 0x00010000);
722 } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) {
723 /* set sector offsets for top boot block type */
724 base += info->size;
725 i = info->sector_count;
726 /* 1 x 16k boot sector */
727 base -= 16 << 10;
728 --i;
729 info->start[i] = base;
730 /* 2 x 8k boot sectors */
731 for (n = 0; n < 2; ++n) {
732 base -= 8 << 10;
733 --i;
734 info->start[i] = base;
735 }
736 /* 1 x 32k boot sector */
737 base -= 32 << 10;
738 --i;
739 info->start[i] = base;
740
741 while (i > 0) { /* 64k regular sectors */
742 base -= 64 << 10;
743 --i;
744 info->start[i] = base;
745 }
746 } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T) {
747 i = info->sector_count - 1;
748 info->start[i--] = base + info->size - 0x00002000;
749 info->start[i--] = base + info->size - 0x00004000;
750 info->start[i--] = base + info->size - 0x00006000;
751 info->start[i--] = base + info->size - 0x00008000;
752 info->start[i--] = base + info->size - 0x0000a000;
753 info->start[i--] = base + info->size - 0x0000c000;
754 info->start[i--] = base + info->size - 0x0000e000;
755 info->start[i--] = base + info->size - 0x00010000;
756
757 for (; i >= 0; i--)
758 info->start[i] = base + i * 0x00010000;
759 } else {
760 if (info->flash_id & FLASH_BTYPE) {
761 /* set sector offsets for bottom boot block type */
762 info->start[0] = base + 0x00000000;
763 info->start[1] = base + 0x00004000;
764 info->start[2] = base + 0x00006000;
765 info->start[3] = base + 0x00008000;
766
767 for (i = 4; i < info->sector_count; i++)
768 info->start[i] = base + (i * 0x00010000) - 0x00030000;
769 } else {
770 /* set sector offsets for top boot block type */
771 i = info->sector_count - 1;
772 info->start[i--] = base + info->size - 0x00004000;
773 info->start[i--] = base + info->size - 0x00006000;
774 info->start[i--] = base + info->size - 0x00008000;
775
776 for (; i >= 0; i--)
777 info->start[i] = base + i * 0x00010000;
778 }
779 }
780
781 /* check for protected sectors */
782 for (i = 0; i < info->sector_count; i++) {
783 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
784 /* D0 = 1 if protected */
6d0f6bcf 785 addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]);
6c5879f3
MB		 786
787 /* For AMD29033C flash we need to resend the command of *
788 * reading flash protection for upper 8 Mb of flash */
789 if (i == 32) {
6d0f6bcf
JCPV		 790 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0xAAAAAAAA;
791 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x55555555;
792 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x90909090;
6c5879f3
MB		 793 }
794
795 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
796 info->protect[i] = 0;
797 else
798 info->protect[i] = addr2[2] & 1;
799 }
800
801 /* issue bank reset to return to read mode */
6d0f6bcf 802 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0;
6c5879f3
MB		 803
804 return (info->size);
805}
806
807static int wait_for_DQ7_2(flash_info_t * info, int sect)
808{
809 ulong start, now, last;
6d0f6bcf
JCPV		 810 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr =
811 (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
6c5879f3
MB		 812
813 start = get_timer(0);
814 last = start;
6d0f6bcf
JCPV		 815 while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
816 (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) {
817 if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
6c5879f3
MB		 818 printf("Timeout\n");
819 return -1;
820 }
821 /* show that we're waiting */
822 if ((now - last) > 1000) { /* every second */
823 putc('.');
824 last = now;
825 }
826 }
827 return 0;
828}
829
830static int flash_erase_2(flash_info_t * info, int s_first, int s_last)
831{
6d0f6bcf
JCPV		 832 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
833 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
6c5879f3
MB		 834 int flag, prot, sect, l_sect;
835 int i;
836
837 if ((s_first < 0) || (s_first > s_last)) {
838 if (info->flash_id == FLASH_UNKNOWN)
839 printf("- missing\n");
840 else
841 printf("- no sectors to erase\n");
842 return 1;
843 }
844
845 if (info->flash_id == FLASH_UNKNOWN) {
846 printf("Can't erase unknown flash type - aborted\n");
847 return 1;
848 }
849
850 prot = 0;
851 for (sect = s_first; sect <= s_last; ++sect) {
852 if (info->protect[sect])
853 prot++;
854 }
855
856 if (prot)
857 printf("- Warning: %d protected sectors will not be erased!", prot);
858
859 printf("\n");
860
861 l_sect = -1;
862
863 /* Disable interrupts which might cause a timeout here */
864 flag = disable_interrupts();
865
866 /* Start erase on unprotected sectors */
867 for (sect = s_first; sect <= s_last; sect++) {
868 if (info->protect[sect] == 0) { /* not protected */
6d0f6bcf 869 addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
6c5879f3
MB		 870
871 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
6d0f6bcf
JCPV		 872 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
873 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
874 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
875 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
876 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
877 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00500050; /* block erase */
6c5879f3
MB		 878 for (i = 0; i < 50; i++)
879 udelay(1000); /* wait 1 ms */
880 } else {
6d0f6bcf
JCPV		 881 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
882 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
883 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
884 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
885 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
886 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
6c5879f3
MB		 887 }
888 l_sect = sect;
889 /*
890 * Wait for each sector to complete, it's more
891 * reliable. According to AMD Spec, you must
892 * issue all erase commands within a specified
893 * timeout. This has been seen to fail, especially
894 * if printf()s are included (for debug)!!
895 */
896 wait_for_DQ7_2(info, sect);
897 }
898 }
899
900 /* re-enable interrupts if necessary */
901 if (flag)
902 enable_interrupts();
903
904 /* wait at least 80us - let's wait 1 ms */
905 udelay(1000);
906
907 /* reset to read mode */
6d0f6bcf
JCPV		 908 addr = (CONFIG_SYS_FLASH_WORD_SIZE *) info->start[0];
909 addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
6c5879f3
MB		 910
911 printf(" done\n");
912 return 0;
913}
914
915static int write_word_2(flash_info_t * info, ulong dest, ulong data)
916{
70fb809c
WD		 917 ulong *data_ptr = &data;
918 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]);
919 volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *)dest;
920 volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *)data_ptr;
6c5879f3
MB		 921 ulong start;
922 int i;
923
924 /* Check if Flash is (sufficiently) erased */
925 if ((*((vu_long *)dest) & data) != data)
926 return (2);
927
6d0f6bcf 928 for (i = 0; i < 4 / sizeof(CONFIG_SYS_FLASH_WORD_SIZE); i++) {
6c5879f3
MB		 929 int flag;
930
931 /* Disable interrupts which might cause a timeout here */
932 flag = disable_interrupts();
933
6d0f6bcf
JCPV		 934 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
935 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
936 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00A000A0;
6c5879f3
MB		 937
938 dest2[i] = data2[i];
939
940 /* re-enable interrupts if necessary */
941 if (flag)
942 enable_interrupts();
943
944 /* data polling for D7 */
945 start = get_timer(0);
6d0f6bcf
JCPV		 946 while ((dest2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
947 (data2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080)) {
6c5879f3 948
6d0f6bcf 949 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
6c5879f3
MB		 950 return (1);
951 }
952 }
953
954 return (0);
955}
6d0f6bcf 956#endif /* CONFIG_SYS_FLASH_2ND_16BIT_DEV */
6c5879f3
MB		 957
958/*-----------------------------------------------------------------------
959 * Functions
960 */
961static ulong flash_get_size(vu_long * addr, flash_info_t * info);
962static int write_word(flash_info_t * info, ulong dest, ulong data);
963
964/*-----------------------------------------------------------------------
965 */
966
967unsigned long flash_init(void)
968{
969 unsigned long total_b = 0;
6d0f6bcf 970 unsigned long size_b[CONFIG_SYS_MAX_FLASH_BANKS];
6c5879f3
MB		 971 unsigned short index = 0;
972 int i;
973 unsigned long val;
974 unsigned long ebc_boot_size;
975 unsigned long boot_selection;
976
977 mfsdr(sdr_pstrp0, val);
978 index = (val & SDR0_PSTRP0_BOOTSTRAP_MASK) >> 28;
979
980 if ((index == 0xc) || (index == 8)) {
981 /*
982 * Boot Settings in IIC EEprom address 0xA8 or 0xA0
983 * Read Serial Device Strap Register1 in PPC440SPe
984 */
d1c3b275 985 mfsdr(SDR0_SDSTP1, val);
6c5879f3
MB		 986 boot_selection = val & SDR0_SDSTP1_BOOT_SEL_MASK;
987 ebc_boot_size = val & SDR0_SDSTP1_EBC_ROM_BS_MASK;
988
989 switch(boot_selection) {
990 case SDR0_SDSTP1_BOOT_SEL_EBC:
991 switch(ebc_boot_size) {
992 case SDR0_SDSTP1_EBC_ROM_BS_16BIT:
993 index = 3;
994 break;
995 case SDR0_SDSTP1_EBC_ROM_BS_8BIT:
996 index = 0;
997 break;
998 }
999 break;
1000
1001 case SDR0_SDSTP1_BOOT_SEL_PCI:
1002 index = 1;
1003 break;
1004
1005 }
1006 } /*else if (index == 0) {*/
1007/* if (in8(FPGA_SETTING_REG) & FPGA_SET_REG_OP_CODE_FLASH_ABOVE)*/
b87dfd28 1008/* index = 8;*/ /* sram below op code flash -> new index 8*/
6c5879f3
MB		 1009/* }*/
1010
1011 DEBUGF("\n");
1012 DEBUGF("FLASH: Index: %d\n", index);
1013
1014 /* Init: no FLASHes known */
6d0f6bcf 1015 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
6c5879f3
MB		 1016 flash_info[i].flash_id = FLASH_UNKNOWN;
1017 flash_info[i].sector_count = -1;
1018 flash_info[i].size = 0;
1019
1020 /* check whether the address is 0 */
1021 if (flash_addr_table[index][i] == 0)
1022 continue;
1023
1024 /* call flash_get_size() to initialize sector address */
1025 size_b[i] = flash_get_size((vu_long *) flash_addr_table[index][i],
1026 &flash_info[i]);
1027
1028 flash_info[i].size = size_b[i];
1029
1030 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
1031 printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
1032 i, size_b[i], size_b[i] << 20);
1033 flash_info[i].sector_count = -1;
1034 flash_info[i].size = 0;
1035 }
1036
1037 /* Monitor protection ON by default */
6d0f6bcf
JCPV		 1038 (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE,
1039 CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1,
6c5879f3 1040 &flash_info[i]);
5a1aceb0 1041#if defined(CONFIG_ENV_IS_IN_FLASH)
0e8d1586
JCPV		 1042 (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR,
1043 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
6c5879f3 1044 &flash_info[i]);
0e8d1586
JCPV		 1045#if defined(CONFIG_ENV_ADDR_REDUND)
1046 (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR_REDUND,
1047 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
6c5879f3
MB		 1048 &flash_info[i]);
1049#endif
1050#endif
1051 total_b += flash_info[i].size;
1052 }
1053
1054 return total_b;
1055}
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