[people/ms/u-boot.git] / board / amlogic / odroid-c2 / odroid-c2.c

/*
 * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <asm/arch/gxbb.h>
#include <asm/arch/sm.h>
#include <asm/arch/eth.h>
#include <asm/arch/mem.h>

#define EFUSE_SN_OFFSET		20
#define EFUSE_SN_SIZE		16
#define EFUSE_MAC_OFFSET	52
#define EFUSE_MAC_SIZE		6

int board_init(void)
{
	return 0;
}

int misc_init_r(void)
{
	u8 mac_addr[EFUSE_MAC_SIZE];
	char serial[EFUSE_SN_SIZE];
	ssize_t len;

	meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0);

	/* Enable power and clock gate */
	setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C);

	/* Reset PHY on GPIOZ_14 */
	clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
	clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
	mdelay(10);
	setbits_le32(GXBB_GPIO_OUT(3), BIT(14));

	if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
		len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
					  mac_addr, EFUSE_MAC_SIZE);
		if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
			eth_env_set_enetaddr("ethaddr", mac_addr);
	}

	if (!env_get("serial#")) {
		len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
			EFUSE_SN_SIZE);
		if (len == EFUSE_SN_SIZE) 
			env_set("serial#", serial);
	}

	return 0;
}

int ft_board_setup(void *blob, bd_t *bd)
{
	meson_gx_init_reserved_memory(blob);

	return 0;
}
Commit	Line	Data
bfcef28a BG	1	/*
	2	* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
9d922450	8	#include <dm.h>
bfcef28a BG	9	#include <asm/io.h>
bfcef28a BG	10	#include <asm/arch/gxbb.h>
c7757d46	11	#include <asm/arch/sm.h>
9a41746f	12	#include <asm/arch/eth.h>
c7be3e5a	13	#include <asm/arch/mem.h>
bfcef28a	14
c7757d46 BG	15	#define EFUSE_SN_OFFSET 20
	16	#define EFUSE_SN_SIZE 16
	17	#define EFUSE_MAC_OFFSET 52
	18	#define EFUSE_MAC_SIZE 6
	19
bfcef28a BG	20	int board_init(void)
	21	{
	22	return 0;
	23	}
	24
bfcef28a BG	25	int misc_init_r(void)
bfcef28a BG	26	{
c7757d46	27	u8 mac_addr[EFUSE_MAC_SIZE];
cb86d374	28	char serial[EFUSE_SN_SIZE];
c7757d46 BG	29	ssize_t len;
c7757d46 BG	30
9a41746f	31	meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
bfcef28a BG	32
bfcef28a BG	33	/* Enable power and clock gate */
456efb51	34	setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C);
bfcef28a BG	35
	36	/* Reset PHY on GPIOZ_14 */
	37	clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
	38	clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
	39	mdelay(10);
	40	setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
	41
35affd7a	42	if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
c7757d46 BG	43	len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
	44	mac_addr, EFUSE_MAC_SIZE);
	45	if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
fd1e959e	46	eth_env_set_enetaddr("ethaddr", mac_addr);
c7757d46 BG	47	}
c7757d46 BG	48
00caae6d	49	if (!env_get("serial#")) {
cb86d374 MB	50	len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
	51	EFUSE_SN_SIZE);
	52	if (len == EFUSE_SN_SIZE)
382bee57	53	env_set("serial#", serial);
cb86d374 MB	54	}
cb86d374 MB	55
bfcef28a BG	56	return 0;
bfcef28a BG	57	}
c7be3e5a NA	58
	59	int ft_board_setup(void blob, bd_t bd)
	60	{
	61	meson_gx_init_reserved_memory(blob);
	62
	63	return 0;
	64	}