[thirdparty/u-boot.git] / board / aristainetos / clocks.cfg

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2013 Boundary Devices
 *
 * Device Configuration Data (DCD)
 *
 * Each entry must have the format:
 * Addr-type           Address        Value
 *
 * where:
 *      Addr-type register length (1,2 or 4 bytes)
 *      Address   absolute address of the register
 *      value     value to be stored in the register
 */

/* set the default clock gate to save power */
DATA 4, CCM_CCGR0, 0x00c03f3f
DATA 4, CCM_CCGR1, 0x0030fcff
DATA 4, CCM_CCGR2, 0x0fffcfc0
DATA 4, CCM_CCGR3, 0x3ff0300f
DATA 4, CCM_CCGR4, 0xfffff30c /* enable NAND/GPMI/BCH clocks */
DATA 4, CCM_CCGR5, 0x0f0000c3
DATA 4, CCM_CCGR6, 0x000003ff
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
e379c039 HS	2	/*
	3	* Copyright (C) 2013 Boundary Devices
	4	*
e379c039 HS	5	* Device Configuration Data (DCD)
	6	*
	7	* Each entry must have the format:
	8	* Addr-type Address Value
	9	*
	10	* where:
	11	* Addr-type register length (1,2 or 4 bytes)
	12	* Address absolute address of the register
	13	* value value to be stored in the register
	14	*/
	15
	16	/* set the default clock gate to save power */
	17	DATA 4, CCM_CCGR0, 0x00c03f3f
	18	DATA 4, CCM_CCGR1, 0x0030fcff
	19	DATA 4, CCM_CCGR2, 0x0fffcfc0
	20	DATA 4, CCM_CCGR3, 0x3ff0300f
	21	DATA 4, CCM_CCGR4, 0xfffff30c /* enable NAND/GPMI/BCH clocks */
	22	DATA 4, CCM_CCGR5, 0x0f0000c3
	23	DATA 4, CCM_CCGR6, 0x000003ff