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integrator: do not test first part of the memory
[people/ms/u-boot.git] / board / armltd / integrator / integrator.c
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1/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8 *
9 * (C) Copyright 2003
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
12 *
13 * (C) Copyright 2004
14 * ARM Ltd.
15 * Philippe Robin, <philippe.robin@arm.com>
16 *
17 * See file CREDITS for list of people who contributed to this
18 * project.
19 *
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License as
22 * published by the Free Software Foundation; either version 2 of
23 * the License, or (at your option) any later version.
24 *
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
fe7eb5d8 27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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28 * GNU General Public License for more details.
29 *
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 * MA 02111-1307 USA
34 */
35
36#include <common.h>
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37#include <netdev.h>
38
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39DECLARE_GLOBAL_DATA_PTR;
40
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41void peripheral_power_enable (void);
42
43#if defined(CONFIG_SHOW_BOOT_PROGRESS)
44void show_boot_progress(int progress)
45{
716c1dcb 46 printf("Boot reached stage %d\n", progress);
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47}
48#endif
49
50#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
51
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52/*
53 * Miscellaneous platform dependent initialisations
54 */
55
56int board_init (void)
57{
3d3befa7 58 /* arch number of Integrator Board */
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59#ifdef CONFIG_ARCH_CINTEGRATOR
60 gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
61#else
731215eb 62 gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR;
576afd4f 63#endif
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64
65 /* adress of boot parameters */
66 gd->bd->bi_boot_params = 0x00000100;
67
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68 gd->flags = 0;
69
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70#ifdef CONFIG_CM_REMAP
71extern void cm_remap(void);
72 cm_remap(); /* remaps writeable memory to 0x00000000 */
73#endif
716c1dcb 74
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75 icache_enable ();
76
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77 return 0;
78}
79
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80int misc_init_r (void)
81{
82#ifdef CONFIG_PCI
83 pci_init();
84#endif
85 setenv("verify", "n");
86 return (0);
87}
88
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89/*
90 * The Integrator remaps the Flash memory to 0x00000000 and executes U-Boot
91 * from there, which means we cannot test the RAM underneath the ROM at this
92 * point. It will be unmapped later on, when we are executing from the
93 * relocated in RAM U-Boot. We simply assume that this RAM is usable if the
94 * RAM on higher addresses works fine.
95 */
96#define REMAPPED_FLASH_SZ 0x40000
97
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98int dram_init (void)
99{
26c82638 100 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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101#ifdef CONFIG_CM_SPD_DETECT
102 {
103extern void dram_query(void);
104 unsigned long cm_reg_sdram;
105 unsigned long sdram_shift;
106
107 dram_query(); /* Assembler accesses to CM registers */
716c1dcb 108 /* Queries the SPD values */
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109
110 /* Obtain the SDRAM size from the CM SDRAM register */
111
112 cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
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113 /* Register SDRAM size
114 *
115 * 0xXXXXXXbbb000bb 16 MB
116 * 0xXXXXXXbbb001bb 32 MB
117 * 0xXXXXXXbbb010bb 64 MB
118 * 0xXXXXXXbbb011bb 128 MB
119 * 0xXXXXXXbbb100bb 256 MB
0148e8cb 120 *
0148e8cb 121 */
716c1dcb 122 sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
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123 gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
124 REMAPPED_FLASH_SZ,
26c82638 125 0x01000000 << sdram_shift);
0148e8cb 126 }
26c82638 127#else
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128 gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
129 REMAPPED_FLASH_SZ,
26c82638 130 PHYS_SDRAM_1_SIZE);
0148e8cb 131#endif /* CM_SPD_DETECT */
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132 /* We only have one bank of RAM, set it to whatever was detected */
133 gd->bd->bi_dram[0].size = gd->ram_size;
0148e8cb 134
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135 return 0;
136}
74f4304e 137
7194ab80 138#ifdef CONFIG_CMD_NET
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139int board_eth_init(bd_t *bis)
140{
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141 int rc = 0;
142#ifdef CONFIG_SMC91111
143 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
144#endif
7194ab80 145 rc += pci_eth_init(bis);
7194ab80 146 return rc;
10efa024 147}
576afd4f 148#endif