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6ccec449 WD |
1 | /* |
2 | * Copyright (C) 2005-2006 Atmel Corporation | |
3 | * | |
4 | * See file CREDITS for list of people who contributed to this | |
5 | * project. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License as | |
9 | * published by the Free Software Foundation; either version 2 of | |
10 | * the License, or (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
20 | * MA 02111-1307 USA | |
21 | */ | |
22 | #include <common.h> | |
23 | ||
24 | #include <asm/io.h> | |
25 | #include <asm/sdram.h> | |
d38da537 | 26 | #include <asm/arch/clk.h> |
df548d3c | 27 | #include <asm/arch/gpio.h> |
44453b25 | 28 | #include <asm/arch/hmatrix.h> |
6ccec449 WD |
29 | |
30 | DECLARE_GLOBAL_DATA_PTR; | |
31 | ||
a23e277c HS |
32 | static const struct sdram_config sdram_config = { |
33 | #if defined(CONFIG_ATSTK1006) | |
34 | /* Dual MT48LC16M16A2-7E (64 MB) on daughterboard */ | |
35 | .data_bits = SDRAM_DATA_32BIT, | |
0a2e4879 HS |
36 | .row_bits = 13, |
37 | .col_bits = 9, | |
38 | .bank_bits = 2, | |
39 | .cas = 2, | |
40 | .twr = 2, | |
41 | .trc = 7, | |
42 | .trp = 2, | |
43 | .trcd = 2, | |
44 | .tras = 4, | |
45 | .txsr = 7, | |
46 | /* 7.81 us */ | |
47 | .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, | |
0a2e4879 | 48 | #else |
a23e277c HS |
49 | /* MT48LC2M32B2P-5 (8 MB) on motherboard */ |
50 | #ifdef CONFIG_ATSTK1004 | |
51 | .data_bits = SDRAM_DATA_16BIT, | |
52 | #else | |
53 | .data_bits = SDRAM_DATA_32BIT, | |
54 | #endif | |
55 | #ifdef CONFIG_ATSTK1000_16MB_SDRAM | |
56 | /* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */ | |
57 | .row_bits = 12, | |
58 | #else | |
6ccec449 | 59 | .row_bits = 11, |
a23e277c | 60 | #endif |
6ccec449 WD |
61 | .col_bits = 8, |
62 | .bank_bits = 2, | |
63 | .cas = 3, | |
64 | .twr = 2, | |
65 | .trc = 7, | |
66 | .trp = 2, | |
67 | .trcd = 2, | |
68 | .tras = 5, | |
69 | .txsr = 5, | |
d38da537 HS |
70 | /* 15.6 us */ |
71 | .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, | |
0a2e4879 | 72 | #endif |
a23e277c | 73 | }; |
6ccec449 | 74 | |
df548d3c HS |
75 | int board_early_init_f(void) |
76 | { | |
44453b25 HS |
77 | /* Enable SDRAM in the EBI mux */ |
78 | hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); | |
df548d3c HS |
79 | |
80 | gpio_enable_ebi(); | |
81 | gpio_enable_usart1(); | |
9a24f477 HS |
82 | #if defined(CONFIG_MACB) |
83 | gpio_enable_macb0(); | |
84 | gpio_enable_macb1(); | |
85 | #endif | |
8e687518 HS |
86 | #if defined(CONFIG_MMC) |
87 | gpio_enable_mmci(); | |
88 | #endif | |
df548d3c HS |
89 | |
90 | return 0; | |
91 | } | |
92 | ||
9973e3c6 | 93 | phys_size_t initdram(int board_type) |
6ccec449 | 94 | { |
a23e277c HS |
95 | unsigned long expected_size; |
96 | unsigned long actual_size; | |
97 | void *sdram_base; | |
98 | ||
99 | sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE); | |
100 | ||
101 | expected_size = sdram_init(sdram_base, &sdram_config); | |
102 | actual_size = get_ram_size(sdram_base, expected_size); | |
103 | ||
104 | unmap_physmem(sdram_base, EBI_SDRAM_SIZE); | |
105 | ||
106 | if (expected_size != actual_size) | |
7f4b009f | 107 | printf("Warning: Only %lu of %lu MiB SDRAM is working\n", |
a23e277c HS |
108 | actual_size >> 20, expected_size >> 20); |
109 | ||
110 | return actual_size; | |
6ccec449 WD |
111 | } |
112 | ||
113 | void board_init_info(void) | |
114 | { | |
115 | gd->bd->bi_phy_id[0] = 0x10; | |
116 | gd->bd->bi_phy_id[1] = 0x11; | |
117 | } | |
c8c845cf BW |
118 | |
119 | extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); | |
120 | ||
121 | #ifdef CONFIG_CMD_NET | |
122 | int board_eth_init(bd_t *bi) | |
123 | { | |
124 | macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]); | |
125 | macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]); | |
126 | return 0; | |
127 | } | |
128 | #endif |