[people/ms/u-boot.git] / board / avionic-design / dts / tegra20-tamonten.dtsi

#include "tegra20.dtsi"

/ {
	model = "Avionic Design Tamonten SOM";
	compatible = "ad,tamonten", "nvidia,tegra20";

	memory {
		reg = <0x00000000 0x20000000>;
	};

	host1x {
		hdmi {
			vdd-supply = <&hdmi_vdd_reg>;
			pll-supply = <&hdmi_pll_reg>;

			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
			nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
		};
	};

	pinmux {
		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinmux {
			ata {
				nvidia,pins = "ata";
				nvidia,function = "ide";
			};
			atb {
				nvidia,pins = "atb", "gma", "gme";
				nvidia,function = "sdio4";
			};
			atc {
				nvidia,pins = "atc";
				nvidia,function = "nand";
			};
			atd {
				nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
					"spia", "spib", "spic";
				nvidia,function = "gmi";
			};
			cdev1 {
				nvidia,pins = "cdev1";
				nvidia,function = "plla_out";
			};
			cdev2 {
				nvidia,pins = "cdev2";
				nvidia,function = "pllp_out4";
			};
			crtp {
				nvidia,pins = "crtp";
				nvidia,function = "crt";
			};
			csus {
				nvidia,pins = "csus";
				nvidia,function = "vi_sensor_clk";
			};
			dap1 {
				nvidia,pins = "dap1";
				nvidia,function = "dap1";
			};
			dap2 {
				nvidia,pins = "dap2";
				nvidia,function = "dap2";
			};
			dap3 {
				nvidia,pins = "dap3";
				nvidia,function = "dap3";
			};
			dap4 {
				nvidia,pins = "dap4";
				nvidia,function = "dap4";
			};
			dta {
				nvidia,pins = "dta", "dtd";
				nvidia,function = "sdio2";
			};
			dtb {
				nvidia,pins = "dtb", "dtc", "dte";
				nvidia,function = "rsvd1";
			};
			dtf {
				nvidia,pins = "dtf";
				nvidia,function = "i2c3";
			};
			gmc {
				nvidia,pins = "gmc";
				nvidia,function = "uartd";
			};
			gpu7 {
				nvidia,pins = "gpu7";
				nvidia,function = "rtck";
			};
			gpv {
				nvidia,pins = "gpv", "slxa", "slxk";
				nvidia,function = "pcie";
			};
			hdint {
				nvidia,pins = "hdint";
				nvidia,function = "hdmi";
			};
			i2cp {
				nvidia,pins = "i2cp";
				nvidia,function = "i2cp";
			};
			irrx {
				nvidia,pins = "irrx", "irtx";
				nvidia,function = "uarta";
			};
			kbca {
				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
					"kbce", "kbcf";
				nvidia,function = "kbc";
			};
			lcsn {
				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
					"ld3", "ld4", "ld5", "ld6", "ld7",
					"ld8", "ld9", "ld10", "ld11", "ld12",
					"ld13", "ld14", "ld15", "ld16", "ld17",
					"ldc", "ldi", "lhp0", "lhp1", "lhp2",
					"lhs", "lm0", "lm1", "lpp", "lpw0",
					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
					"lsda", "lsdi", "lspi", "lvp0", "lvp1",
					"lvs";
				nvidia,function = "displaya";
			};
			owc {
				nvidia,pins = "owc", "spdi", "spdo", "uac";
				nvidia,function = "rsvd2";
			};
			pmc {
				nvidia,pins = "pmc";
				nvidia,function = "pwr_on";
			};
			rm {
				nvidia,pins = "rm";
				nvidia,function = "i2c1";
			};
			sdb {
				nvidia,pins = "sdb", "sdc", "sdd";
				nvidia,function = "pwm";
			};
			sdio1 {
				nvidia,pins = "sdio1";
				nvidia,function = "sdio1";
			};
			slxc {
				nvidia,pins = "slxc", "slxd";
				nvidia,function = "spdif";
			};
			spid {
				nvidia,pins = "spid", "spie", "spif";
				nvidia,function = "spi1";
			};
			spig {
				nvidia,pins = "spig", "spih";
				nvidia,function = "spi2_alt";
			};
			uaa {
				nvidia,pins = "uaa", "uab", "uda";
				nvidia,function = "ulpi";
			};
			uad {
				nvidia,pins = "uad";
				nvidia,function = "irda";
			};
			uca {
				nvidia,pins = "uca", "ucb";
				nvidia,function = "uartc";
			};
			conf_ata {
				nvidia,pins = "ata", "atb", "atc", "atd", "ate",
					"cdev1", "cdev2", "dap1", "dtb", "gma",
					"gmb", "gmc", "gmd", "gme", "gpu7",
					"gpv", "i2cp", "pta", "rm", "slxa",
					"slxk", "spia", "spib", "uac";
				nvidia,pull = <0>;
				nvidia,tristate = <0>;
			};
			conf_ck32 {
				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
				nvidia,pull = <0>;
			};
			conf_csus {
				nvidia,pins = "csus", "spid", "spif";
				nvidia,pull = <1>;
				nvidia,tristate = <1>;
			};
			conf_crtp {
				nvidia,pins = "crtp", "dap2", "dap3", "dap4",
					"dtc", "dte", "dtf", "gpu", "sdio1",
					"slxc", "slxd", "spdi", "spdo", "spig",
					"uda";
				nvidia,pull = <0>;
				nvidia,tristate = <1>;
			};
			conf_ddc {
				nvidia,pins = "ddc", "dta", "dtd", "kbca",
					"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
					"sdc";
				nvidia,pull = <2>;
				nvidia,tristate = <0>;
			};
			conf_hdint {
				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
					"lpw1", "lsc1", "lsck", "lsda", "lsdi",
					"lvp0", "owc", "sdb";
				nvidia,tristate = <1>;
			};
			conf_irrx {
				nvidia,pins = "irrx", "irtx", "sdd", "spic",
					"spie", "spih", "uaa", "uab", "uad",
					"uca", "ucb";
				nvidia,pull = <2>;
				nvidia,tristate = <1>;
			};
			conf_lc {
				nvidia,pins = "lc", "ls";
				nvidia,pull = <2>;
			};
			conf_ld0 {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
					"ld5", "ld6", "ld7", "ld8", "ld9",
					"ld10", "ld11", "ld12", "ld13", "ld14",
					"ld15", "ld16", "ld17", "ldi", "lhp0",
					"lhp1", "lhp2", "lhs", "lm0", "lpp",
					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
					"lvs", "pmc";
				nvidia,tristate = <0>;
			};
			conf_ld17_0 {
				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
					"ld23_22";
				nvidia,pull = <1>;
			};
		};

		state_i2cmux_ddc: pinmux_i2cmux_ddc {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "i2c2";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};

		state_i2cmux_pta: pinmux_i2cmux_pta {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "i2c2";
			};
		};

		state_i2cmux_idle: pinmux_i2cmux_idle {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};
	};

	i2s@70002800 {
		status = "okay";
	};

	serial@70006300 {
		status = "okay";
	};

	i2c@7000c000 {
		clock-frequency = <400000>;
		status = "okay";
	};

	i2c@7000c400 {
		clock-frequency = <100000>;
		status = "okay";
	};

	i2cmux {
		compatible = "i2c-mux-pinctrl";
		#address-cells = <1>;
		#size-cells = <0>;

		i2c-parent = <&{/i2c@7000c400}>;

		pinctrl-names = "ddc", "pta", "idle";
		pinctrl-0 = <&state_i2cmux_ddc>;
		pinctrl-1 = <&state_i2cmux_pta>;
		pinctrl-2 = <&state_i2cmux_idle>;

		hdmi_ddc: i2c@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	i2c@7000d000 {
		clock-frequency = <400000>;
		status = "okay";

		pmic: tps6586x@34 {
			compatible = "ti,tps6586x";
			reg = <0x34>;
			interrupts = <0 86 0x4>;

			ti,system-power-controller;

			#gpio-cells = <2>;
			gpio-controller;

			sys-supply = <&vdd_5v0_reg>;
			vin-sm0-supply = <&sys_reg>;
			vin-sm1-supply = <&sys_reg>;
			vin-sm2-supply = <&sys_reg>;
			vinldo01-supply = <&sm2_reg>;
			vinldo23-supply = <&sm2_reg>;
			vinldo4-supply = <&sm2_reg>;
			vinldo678-supply = <&sm2_reg>;
			vinldo9-supply = <&sm2_reg>;

			regulators {
				sys_reg: sys {
					regulator-name = "vdd_sys";
					regulator-always-on;
				};

				sm0 {
					regulator-name = "vdd_sys_sm0,vdd_core";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
				};

				sm1 {
					regulator-name = "vdd_sys_sm1,vdd_cpu";
					regulator-min-microvolt = <1000000>;
					regulator-max-microvolt = <1000000>;
					regulator-always-on;
				};

				sm2_reg: sm2 {
					regulator-name = "vdd_sys_sm2,vin_ldo*";
					regulator-min-microvolt = <3700000>;
					regulator-max-microvolt = <3700000>;
					regulator-always-on;
				};

				ldo0 {
					regulator-name = "vdd_ldo0,vddio_pex_clk";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
				};

				ldo1 {
					regulator-name = "vdd_ldo1,avdd_pll*";
					regulator-min-microvolt = <1100000>;
					regulator-max-microvolt = <1100000>;
					regulator-always-on;
				};

				ldo2 {
					regulator-name = "vdd_ldo2,vdd_rtc";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
				};

				ldo3 {
					regulator-name = "vdd_ldo3,avdd_usb*";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};

				ldo4 {
					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
				};

				ldo5 {
					regulator-name = "vdd_ldo5,vcore_mmc";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
				};

				ldo6 {
					regulator-name = "vdd_ldo6,avdd_vdac";
					/*
					 * According to the Tegra 2 Automotive
					 * DataSheet, a typical value for this
					 * would be 2.8V, but the PMIC only
					 * supports 2.85V.
					 */
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
				};

				hdmi_vdd_reg: ldo7 {
					regulator-name = "vdd_ldo7,avdd_hdmi";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
				};

				hdmi_pll_reg: ldo8 {
					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				ldo9 {
					regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
					/*
					 * According to the Tegra 2 Automotive
					 * DataSheet, a typical value for this
					 * would be 2.8V, but the PMIC only
					 * supports 2.85V.
					 */
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				ldo_rtc {
					regulator-name = "vdd_rtc_out";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};
			};
		};

		temperature-sensor@4c {
			compatible = "onnn,nct1008";
			reg = <0x4c>;
		};
	};

	pmc {
		nvidia,invert-interrupt;
	};

	usb@c5008000 {
		status = "okay";
	};

	sdhci@c8000600 {
		cd-gpios = <&gpio 58 1>; /* gpio PH2 */
		wp-gpios = <&gpio 59 0>; /* gpio PH3 */
		bus-width = <4>;
		status = "okay";
	};

	regulators {
		compatible = "simple-bus";

		#address-cells = <1>;
		#size-cells = <0>;

		vdd_5v0_reg: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "vdd_5v0";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};
	};
};
Commit	Line	Data
90b079c8 TW	1	#include "tegra20.dtsi"
	2
	3	/ {
	4	model = "Avionic Design Tamonten SOM";
	5	compatible = "ad,tamonten", "nvidia,tegra20";
	6
	7	memory {
	8	reg = <0x00000000 0x20000000>;
	9	};
	10
	11	host1x {
	12	hdmi {
	13	vdd-supply = <&hdmi_vdd_reg>;
	14	pll-supply = <&hdmi_pll_reg>;
	15
	16	nvidia,ddc-i2c-bus = <&hdmi_ddc>;
	17	nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
	18	};
	19	};
	20
	21	pinmux {
	22	pinctrl-names = "default";
	23	pinctrl-0 = <&state_default>;
	24
	25	state_default: pinmux {
	26	ata {
	27	nvidia,pins = "ata";
	28	nvidia,function = "ide";
	29	};
	30	atb {
	31	nvidia,pins = "atb", "gma", "gme";
	32	nvidia,function = "sdio4";
	33	};
	34	atc {
	35	nvidia,pins = "atc";
	36	nvidia,function = "nand";
	37	};
	38	atd {
	39	nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
	40	"spia", "spib", "spic";
	41	nvidia,function = "gmi";
	42	};
	43	cdev1 {
	44	nvidia,pins = "cdev1";
	45	nvidia,function = "plla_out";
	46	};
	47	cdev2 {
	48	nvidia,pins = "cdev2";
	49	nvidia,function = "pllp_out4";
	50	};
	51	crtp {
	52	nvidia,pins = "crtp";
	53	nvidia,function = "crt";
	54	};
	55	csus {
	56	nvidia,pins = "csus";
	57	nvidia,function = "vi_sensor_clk";
	58	};
	59	dap1 {
	60	nvidia,pins = "dap1";
	61	nvidia,function = "dap1";
	62	};
	63	dap2 {
	64	nvidia,pins = "dap2";
65	nvidia,function = "dap2";
66	};
67	dap3 {
68	nvidia,pins = "dap3";
69	nvidia,function = "dap3";
70	};
71	dap4 {
72	nvidia,pins = "dap4";
73	nvidia,function = "dap4";
74	};
75	dta {
76	nvidia,pins = "dta", "dtd";
77	nvidia,function = "sdio2";
78	};
79	dtb {
80	nvidia,pins = "dtb", "dtc", "dte";
81	nvidia,function = "rsvd1";
82	};
83	dtf {
84	nvidia,pins = "dtf";
85	nvidia,function = "i2c3";
86	};
87	gmc {
88	nvidia,pins = "gmc";
89	nvidia,function = "uartd";
90	};
91	gpu7 {
92	nvidia,pins = "gpu7";
93	nvidia,function = "rtck";
94	};
95	gpv {
96	nvidia,pins = "gpv", "slxa", "slxk";
97	nvidia,function = "pcie";
98	};
99	hdint {
100	nvidia,pins = "hdint";
101	nvidia,function = "hdmi";
102	};
103	i2cp {
104	nvidia,pins = "i2cp";
105	nvidia,function = "i2cp";
106	};
107	irrx {
108	nvidia,pins = "irrx", "irtx";
109	nvidia,function = "uarta";
110	};
111	kbca {
112	nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
113	"kbce", "kbcf";
114	nvidia,function = "kbc";
115	};
116	lcsn {
117	nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
118	"ld3", "ld4", "ld5", "ld6", "ld7",
119	"ld8", "ld9", "ld10", "ld11", "ld12",
120	"ld13", "ld14", "ld15", "ld16", "ld17",
121	"ldc", "ldi", "lhp0", "lhp1", "lhp2",
122	"lhs", "lm0", "lm1", "lpp", "lpw0",
123	"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
124	"lsda", "lsdi", "lspi", "lvp0", "lvp1",
125	"lvs";
126	nvidia,function = "displaya";
127	};
128	owc {
129	nvidia,pins = "owc", "spdi", "spdo", "uac";
130	nvidia,function = "rsvd2";
131	};
132	pmc {
133	nvidia,pins = "pmc";
134	nvidia,function = "pwr_on";
135	};
136	rm {
137	nvidia,pins = "rm";
138	nvidia,function = "i2c1";
139	};
140	sdb {
141	nvidia,pins = "sdb", "sdc", "sdd";
142	nvidia,function = "pwm";
143	};
144	sdio1 {
145	nvidia,pins = "sdio1";
146	nvidia,function = "sdio1";
147	};
148	slxc {
149	nvidia,pins = "slxc", "slxd";
150	nvidia,function = "spdif";
151	};
152	spid {
153	nvidia,pins = "spid", "spie", "spif";
154	nvidia,function = "spi1";
155	};
156	spig {
157	nvidia,pins = "spig", "spih";
158	nvidia,function = "spi2_alt";
159	};
160	uaa {
161	nvidia,pins = "uaa", "uab", "uda";
162	nvidia,function = "ulpi";
163	};
164	uad {
165	nvidia,pins = "uad";
166	nvidia,function = "irda";
167	};
168	uca {
169	nvidia,pins = "uca", "ucb";
170	nvidia,function = "uartc";
171	};
172	conf_ata {
173	nvidia,pins = "ata", "atb", "atc", "atd", "ate",
174	"cdev1", "cdev2", "dap1", "dtb", "gma",
175	"gmb", "gmc", "gmd", "gme", "gpu7",
176	"gpv", "i2cp", "pta", "rm", "slxa",
177	"slxk", "spia", "spib", "uac";
178	nvidia,pull = <0>;
179	nvidia,tristate = <0>;
180	};
181	conf_ck32 {
182	nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
183	"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
184	nvidia,pull = <0>;
185	};
186	conf_csus {
187	nvidia,pins = "csus", "spid", "spif";
188	nvidia,pull = <1>;
189	nvidia,tristate = <1>;
190	};
191	conf_crtp {
192	nvidia,pins = "crtp", "dap2", "dap3", "dap4",
193	"dtc", "dte", "dtf", "gpu", "sdio1",
194	"slxc", "slxd", "spdi", "spdo", "spig",
195	"uda";
196	nvidia,pull = <0>;
197	nvidia,tristate = <1>;
198	};
199	conf_ddc {
200	nvidia,pins = "ddc", "dta", "dtd", "kbca",
201	"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
202	"sdc";
203	nvidia,pull = <2>;
204	nvidia,tristate = <0>;
205	};
206	conf_hdint {
207	nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
208	"lpw1", "lsc1", "lsck", "lsda", "lsdi",
209	"lvp0", "owc", "sdb";
210	nvidia,tristate = <1>;
211	};
212	conf_irrx {
213	nvidia,pins = "irrx", "irtx", "sdd", "spic",
214	"spie", "spih", "uaa", "uab", "uad",
215	"uca", "ucb";
216	nvidia,pull = <2>;
217	nvidia,tristate = <1>;
218	};
219	conf_lc {
220	nvidia,pins = "lc", "ls";
221	nvidia,pull = <2>;
222	};
223	conf_ld0 {
224	nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
225	"ld5", "ld6", "ld7", "ld8", "ld9",
226	"ld10", "ld11", "ld12", "ld13", "ld14",
227	"ld15", "ld16", "ld17", "ldi", "lhp0",
228	"lhp1", "lhp2", "lhs", "lm0", "lpp",
229	"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
230	"lvs", "pmc";
231	nvidia,tristate = <0>;
232	};
233	conf_ld17_0 {
234	nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
235	"ld23_22";
236	nvidia,pull = <1>;
237	};
238	};
239
240	state_i2cmux_ddc: pinmux_i2cmux_ddc {
241	ddc {
242	nvidia,pins = "ddc";
243	nvidia,function = "i2c2";
244	};
245	pta {
246	nvidia,pins = "pta";
247	nvidia,function = "rsvd4";
248	};
249	};
250
251	state_i2cmux_pta: pinmux_i2cmux_pta {
252	ddc {
253	nvidia,pins = "ddc";
254	nvidia,function = "rsvd4";
255	};
256	pta {
257	nvidia,pins = "pta";
258	nvidia,function = "i2c2";
259	};
260	};
261
262	state_i2cmux_idle: pinmux_i2cmux_idle {
263	ddc {
264	nvidia,pins = "ddc";
265	nvidia,function = "rsvd4";
266	};
267	pta {
268	nvidia,pins = "pta";
269	nvidia,function = "rsvd4";
270	};
271	};
272	};
273
274	i2s@70002800 {
275	status = "okay";
276	};
277
278	serial@70006300 {
279	status = "okay";
280	};
281
282	i2c@7000c000 {
283	clock-frequency = <400000>;
284	status = "okay";
285	};
286
287	i2c@7000c400 {
288	clock-frequency = <100000>;
289	status = "okay";
290	};
291
292	i2cmux {
293	compatible = "i2c-mux-pinctrl";
294	#address-cells = <1>;
295	#size-cells = <0>;
296
297	i2c-parent = <&{/i2c@7000c400}>;
298
299	pinctrl-names = "ddc", "pta", "idle";
300	pinctrl-0 = <&state_i2cmux_ddc>;
301	pinctrl-1 = <&state_i2cmux_pta>;
302	pinctrl-2 = <&state_i2cmux_idle>;
303
304	hdmi_ddc: i2c@0 {
305	reg = <0>;
306	#address-cells = <1>;
307	#size-cells = <0>;
308	};
309
310	i2c@1 {
311	reg = <1>;
312	#address-cells = <1>;
313	#size-cells = <0>;
314	};
315	};
316
317	i2c@7000d000 {
318	clock-frequency = <400000>;
319	status = "okay";
320
321	pmic: tps6586x@34 {
322	compatible = "ti,tps6586x";
323	reg = <0x34>;
324	interrupts = <0 86 0x4>;
325
326	ti,system-power-controller;
327
328	#gpio-cells = <2>;
329	gpio-controller;
330
331	sys-supply = <&vdd_5v0_reg>;
332	vin-sm0-supply = <&sys_reg>;
333	vin-sm1-supply = <&sys_reg>;
334	vin-sm2-supply = <&sys_reg>;
335	vinldo01-supply = <&sm2_reg>;
336	vinldo23-supply = <&sm2_reg>;
337	vinldo4-supply = <&sm2_reg>;
338	vinldo678-supply = <&sm2_reg>;
339	vinldo9-supply = <&sm2_reg>;
340
341	regulators {
342	sys_reg: sys {
343	regulator-name = "vdd_sys";
344	regulator-always-on;
345	};
346
347	sm0 {
348	regulator-name = "vdd_sys_sm0,vdd_core";
349	regulator-min-microvolt = <1200000>;
350	regulator-max-microvolt = <1200000>;
351	regulator-always-on;
352	};
353
354	sm1 {
355	regulator-name = "vdd_sys_sm1,vdd_cpu";
356	regulator-min-microvolt = <1000000>;
357	regulator-max-microvolt = <1000000>;
358	regulator-always-on;
359	};
360
361	sm2_reg: sm2 {
362	regulator-name = "vdd_sys_sm2,vin_ldo*";
363	regulator-min-microvolt = <3700000>;
364	regulator-max-microvolt = <3700000>;
365	regulator-always-on;
366	};
367
368	ldo0 {
369	regulator-name = "vdd_ldo0,vddio_pex_clk";
370	regulator-min-microvolt = <3300000>;
371	regulator-max-microvolt = <3300000>;
372	};
373
374	ldo1 {
375	regulator-name = "vdd_ldo1,avdd_pll*";
376	regulator-min-microvolt = <1100000>;
377	regulator-max-microvolt = <1100000>;
378	regulator-always-on;
379	};
380
381	ldo2 {
382	regulator-name = "vdd_ldo2,vdd_rtc";
383	regulator-min-microvolt = <1200000>;
384	regulator-max-microvolt = <1200000>;
385	};
386
387	ldo3 {
388	regulator-name = "vdd_ldo3,avdd_usb*";
389	regulator-min-microvolt = <3300000>;
390	regulator-max-microvolt = <3300000>;
391	regulator-always-on;
392	};
393
394	ldo4 {
395	regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
396	regulator-min-microvolt = <1800000>;
397	regulator-max-microvolt = <1800000>;
398	regulator-always-on;
399	};
400
401	ldo5 {
402	regulator-name = "vdd_ldo5,vcore_mmc";
403	regulator-min-microvolt = <2850000>;
404	regulator-max-microvolt = <2850000>;
405	};
406
407	ldo6 {
408	regulator-name = "vdd_ldo6,avdd_vdac";
409	/*
410	* According to the Tegra 2 Automotive
411	* DataSheet, a typical value for this
412	* would be 2.8V, but the PMIC only
413	* supports 2.85V.
414	*/
415	regulator-min-microvolt = <2850000>;
416	regulator-max-microvolt = <2850000>;
417	};
418
419	hdmi_vdd_reg: ldo7 {
420	regulator-name = "vdd_ldo7,avdd_hdmi";
421	regulator-min-microvolt = <3300000>;
422	regulator-max-microvolt = <3300000>;
423	};
424
425	hdmi_pll_reg: ldo8 {
426	regulator-name = "vdd_ldo8,avdd_hdmi_pll";
427	regulator-min-microvolt = <1800000>;
428	regulator-max-microvolt = <1800000>;
429	};
430
431	ldo9 {
432	regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
433	/*
434	* According to the Tegra 2 Automotive
435	* DataSheet, a typical value for this
436	* would be 2.8V, but the PMIC only
437	* supports 2.85V.
438	*/
439	regulator-min-microvolt = <2850000>;
440	regulator-max-microvolt = <2850000>;
441	regulator-always-on;
442	};
443
444	ldo_rtc {
445	regulator-name = "vdd_rtc_out";
446	regulator-min-microvolt = <3300000>;
447	regulator-max-microvolt = <3300000>;
448	regulator-always-on;
449	};
450	};
451	};
452
453	temperature-sensor@4c {
454	compatible = "onnn,nct1008";
455	reg = <0x4c>;
456	};
457	};
458
459	pmc {
460	nvidia,invert-interrupt;
461	};
462
463	usb@c5008000 {
464	status = "okay";
465	};
466
467	sdhci@c8000600 {
468	cd-gpios = <&gpio 58 1>; /* gpio PH2 */
469	wp-gpios = <&gpio 59 0>; /* gpio PH3 */
470	bus-width = <4>;
471	status = "okay";
472	};
473
474	regulators {
475	compatible = "simple-bus";
476
477	#address-cells = <1>;
478	#size-cells = <0>;
479
480	vdd_5v0_reg: regulator@0 {
481	compatible = "regulator-fixed";
482	reg = <0>;
483	regulator-name = "vdd_5v0";
484	regulator-min-microvolt = <5000000>;
485	regulator-max-microvolt = <5000000>;
486	regulator-always-on;
487	};
488	};
489	};