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Blackfin: bf518f-ezbrd: enable SST SPI flash driver
[people/ms/u-boot.git] / board / bf537-stamp / u-boot.lds.S
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1/*
2 * U-boot - u-boot.lds.S
3 *
9171fc81 4 * Copyright (c) 2005-2008 Analog Device Inc.
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5 *
6 * (C) Copyright 2000-2004
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <config.h>
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29#include <asm/blackfin.h>
30#undef ALIGN
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31#undef ENTRY
32#undef bfin
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33
34/* If we don't actually load anything into L1 data, this will avoid
35 * a syntax error. If we do actually load something into L1 data,
36 * we'll get a linker memory load error (which is what we'd want).
37 * This is here in the first place so we can quickly test building
38 * for different CPU's which may lack non-cache L1 data.
39 */
40#ifndef L1_DATA_B_SRAM
6d0f6bcf 41# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
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42# define L1_DATA_B_SRAM_SIZE 0
43#endif
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44
45OUTPUT_ARCH(bfin)
9171fc81 46
26bf7dec 47MEMORY
9171fc81 48{
6d0f6bcf 49 ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
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50 l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
51 l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
9171fc81 52}
26bf7dec 53
b9eecc34 54ENTRY(_start)
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55SECTIONS
56{
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57 .text :
58 {
b9eecc34 59 cpu/blackfin/start.o (.text .text.*)
c23bff63 60
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61#ifdef ENV_IS_EMBEDDED
62 /* WARNING - the following is hand-optimized to fit within
63 * the sector before the environment sector. If it throws
64 * an error during compilation remove an object here to get
65 * it linked after the configuration sector.
66 */
67
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68 cpu/blackfin/traps.o (.text .text.*)
69 cpu/blackfin/interrupt.o (.text .text.*)
70 cpu/blackfin/serial.o (.text .text.*)
71 common/dlmalloc.o (.text .text.*)
72 lib_generic/crc32.o (.text .text.*)
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73
74 . = DEFINED(env_offset) ? env_offset : .;
b9eecc34 75 common/env_embedded.o (.text .text.*)
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76#endif
77
c23bff63 78 __initcode_start = .;
b9eecc34 79 cpu/blackfin/initcode.o (.text .text.*)
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80 __initcode_end = .;
81
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82 *(.text .text.*)
83 } >ram
84
85 .rodata :
86 {
87 . = ALIGN(4);
88 *(.rodata .rodata.*)
89 *(.rodata1)
90 *(.eh_frame)
91 . = ALIGN(4);
92 } >ram
93
94 .data :
95 {
96 . = ALIGN(256);
97 *(.data .data.*)
98 *(.data1)
99 *(.sdata)
100 *(.sdata2)
101 *(.dynamic)
102 CONSTRUCTORS
103 } >ram
104
105 .u_boot_cmd :
106 {
107 ___u_boot_cmd_start = .;
108 *(.u_boot_cmd)
109 ___u_boot_cmd_end = .;
110 } >ram
111
112 .text_l1 :
113 {
114 . = ALIGN(4);
115 __stext_l1 = .;
116 *(.l1.text)
117 . = ALIGN(4);
118 __etext_l1 = .;
119 } >l1_code AT>ram
120 __stext_l1_lma = LOADADDR(.text_l1);
121
122 .data_l1 :
123 {
124 . = ALIGN(4);
125 __sdata_l1 = .;
126 *(.l1.data)
127 *(.l1.bss)
128 . = ALIGN(4);
129 __edata_l1 = .;
130 } >l1_data AT>ram
131 __sdata_l1_lma = LOADADDR(.data_l1);
132
133 .bss :
134 {
135 . = ALIGN(4);
136 __bss_start = .;
137 *(.sbss) *(.scommon)
138 *(.dynbss)
139 *(.bss .bss.*)
140 *(COMMON)
141 __bss_end = .;
142 } >ram
26bf7dec 143}