]>
Commit | Line | Data |
---|---|---|
83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
274bced8 JM |
2 | /* |
3 | * (C) Copyright 2016 Broadcom Ltd. | |
274bced8 JM |
4 | */ |
5 | #include <common.h> | |
9a3b4ceb | 6 | #include <cpu_func.h> |
9b4a205f | 7 | #include <init.h> |
90526e9f | 8 | #include <asm/cache.h> |
274bced8 JM |
9 | #include <asm/system.h> |
10 | #include <asm/armv8/mmu.h> | |
11 | ||
12 | static struct mm_region ns2_mem_map[] = { | |
13 | { | |
14 | .virt = 0x0UL, | |
15 | .phys = 0x0UL, | |
16 | .size = 0x80000000UL, | |
17 | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | | |
18 | PTE_BLOCK_NON_SHARE | | |
19 | PTE_BLOCK_PXN | PTE_BLOCK_UXN | |
20 | }, { | |
21 | .virt = 0x80000000UL, | |
22 | .phys = 0x80000000UL, | |
23 | .size = 0xff80000000UL, | |
24 | .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | | |
25 | PTE_BLOCK_INNER_SHARE | |
26 | }, { | |
27 | /* List terminator */ | |
28 | 0, | |
29 | } | |
30 | }; | |
31 | ||
32 | struct mm_region *mem_map = ns2_mem_map; | |
33 | ||
34 | DECLARE_GLOBAL_DATA_PTR; | |
35 | ||
36 | int board_init(void) | |
37 | { | |
38 | return 0; | |
39 | } | |
40 | ||
41 | int dram_init(void) | |
42 | { | |
43 | gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, | |
44 | PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE); | |
45 | return 0; | |
46 | } | |
47 | ||
76b00aca | 48 | int dram_init_banksize(void) |
274bced8 JM |
49 | { |
50 | gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; | |
51 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; | |
52 | ||
53 | gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE; | |
54 | gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; | |
76b00aca SG |
55 | |
56 | return 0; | |
274bced8 JM |
57 | } |
58 | ||
59 | void reset_cpu(ulong addr) | |
60 | { | |
61 | psci_system_reset(); | |
62 | } |