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Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.
[people/ms/u-boot.git] / board / bubinga405ep / flash.c
CommitLineData
46578cc0
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1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Modified 4/5/2001
26 * Wait for completion of each sector erase command issued
27 * 4/5/2001
28 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
29 */
30
31#include <common.h>
32#include <ppc4xx.h>
33#include <asm/processor.h>
34
35flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
36
37/*-----------------------------------------------------------------------
38 * Functions
39 */
40static ulong flash_get_size (vu_long *addr, flash_info_t *info);
41static int write_word (flash_info_t *info, ulong dest, ulong data);
42static void flash_get_offsets (ulong base, flash_info_t *info);
43
44#ifdef CONFIG_ADCIOP
45#define ADDR0 0x0aa9
46#define ADDR1 0x0556
47#define FLASH_WORD_SIZE unsigned char
48#endif
49
50#ifdef CONFIG_CPCI405
51#define ADDR0 0x5555
52#define ADDR1 0x2aaa
53#define FLASH_WORD_SIZE unsigned short
54#endif
55
56#ifdef CONFIG_WALNUT405
57#define ADDR0 0x5555
58#define ADDR1 0x2aaa
59#define FLASH_WORD_SIZE unsigned char
60#endif
61
62#ifdef CONFIG_BUBINGA405EP
63#define ADDR0 0x5555
64#define ADDR1 0x2aaa
65#define FLASH_WORD_SIZE unsigned char
66#endif
67
68
69/*-----------------------------------------------------------------------
70 */
71
72unsigned long flash_init (void)
73{
74 unsigned long size_b0, size_b1;
75 int i;
8bde7f77
WD
76 uint pbcr;
77 unsigned long base_b0, base_b1;
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78
79 /* Init: no FLASHes known */
50015ab3 80 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
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81 flash_info[i].flash_id = FLASH_UNKNOWN;
82 }
83
84 /* Static FLASH Bank configuration here - FIXME XXX */
85
50015ab3 86 size_b0 = flash_get_size ((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
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87
88 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
89 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
50015ab3 90 size_b0, size_b0 << 20);
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91 }
92
93 /* Only one bank */
50015ab3
WD
94 if (CFG_MAX_FLASH_BANKS == 1) {
95 /* Setup offsets */
96 flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
97
98 /* Monitor protection ON by default */
99 (void) flash_protect (FLAG_PROTECT_SET,
100 FLASH_BASE0_PRELIM,
101 FLASH_BASE0_PRELIM + CFG_MONITOR_LEN - 1,
102 &flash_info[0]);
103 /* Also protect sector containing initial power-up instruction */
104 (void) flash_protect (FLAG_PROTECT_SET,
105 0xFFFFFFFC, 0xFFFFFFFF, &flash_info[0]);
106 size_b1 = 0;
107 flash_info[0].size = size_b0;
108 }
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109
110 /* 2 banks */
50015ab3
WD
111 else {
112 size_b1 = flash_get_size ((vu_long *) FLASH_BASE1_PRELIM, &flash_info[1]);
113
114 /* Re-do sizing to get full correct info */
115
116 if (size_b1) {
117 mtdcr (ebccfga, pb0cr);
118 pbcr = mfdcr (ebccfgd);
119 mtdcr (ebccfga, pb0cr);
120 base_b1 = -size_b1;
121 pbcr = (pbcr & 0x0001ffff) | base_b1 |
122 (((size_b1 / 1024 / 1024) - 1) << 17);
123 mtdcr (ebccfgd, pbcr);
124 /* printf("pb1cr = %x\n", pbcr); */
125 }
126
127 if (size_b0) {
128 mtdcr (ebccfga, pb1cr);
129 pbcr = mfdcr (ebccfgd);
130 mtdcr (ebccfga, pb1cr);
131 base_b0 = base_b1 - size_b0;
132 pbcr = (pbcr & 0x0001ffff) | base_b0 |
133 (((size_b0 / 1024 / 1024) - 1) << 17);
134 mtdcr (ebccfgd, pbcr);
135 /* printf("pb0cr = %x\n", pbcr); */
136 }
137
138 size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);
139
140 flash_get_offsets (base_b0, &flash_info[0]);
141
142 /* monitor protection ON by default */
143 (void) flash_protect (FLAG_PROTECT_SET,
144 base_b0 + size_b0 - CFG_MONITOR_LEN,
145 base_b0 + size_b0 - 1, &flash_info[0]);
146 /* Also protect sector containing initial power-up instruction */
147 /* (flash_protect() checks address range - other call ignored) */
148 (void) flash_protect (FLAG_PROTECT_SET,
149 0xFFFFFFFC, 0xFFFFFFFF, &flash_info[0]);
150 (void) flash_protect (FLAG_PROTECT_SET,
151 0xFFFFFFFC, 0xFFFFFFFF, &flash_info[1]);
152
153 if (size_b1) {
154 /* Re-do sizing to get full correct info */
155 size_b1 = flash_get_size ((vu_long *) base_b1, &flash_info[1]);
156
157 flash_get_offsets (base_b1, &flash_info[1]);
158
159 /* monitor protection ON by default */
160 (void) flash_protect (FLAG_PROTECT_SET,
161 base_b1 + size_b1 - CFG_MONITOR_LEN,
162 base_b1 + size_b1 - 1,
163 &flash_info[1]);
164 /* monitor protection OFF by default (one is enough) */
165 (void) flash_protect (FLAG_PROTECT_CLEAR,
166 base_b0 + size_b0 - CFG_MONITOR_LEN,
167 base_b0 + size_b0 - 1,
168 &flash_info[0]);
169 } else {
170 flash_info[1].flash_id = FLASH_UNKNOWN;
171 flash_info[1].sector_count = -1;
172 }
173
174 flash_info[0].size = size_b0;
175 flash_info[1].size = size_b1;
176 } /* else 2 banks */
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177 return (size_b0 + size_b1);
178}
179
180
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181/*-----------------------------------------------------------------------
182 */
50015ab3 183static void flash_get_offsets (ulong base, flash_info_t * info)
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184{
185 int i;
186
187 /* set up sector start address table */
8bde7f77 188 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
50015ab3
WD
189 (info->flash_id == FLASH_AM040)) {
190 for (i = 0; i < info->sector_count; i++)
191 info->start[i] = base + (i * 0x00010000);
8bde7f77 192 } else {
50015ab3
WD
193 if (info->flash_id & FLASH_BTYPE) {
194 /* set sector offsets for bottom boot block type */
195 info->start[0] = base + 0x00000000;
196 info->start[1] = base + 0x00004000;
197 info->start[2] = base + 0x00006000;
198 info->start[3] = base + 0x00008000;
199 for (i = 4; i < info->sector_count; i++) {
200 info->start[i] = base + (i * 0x00010000) - 0x00030000;
201 }
202 } else {
203 /* set sector offsets for top boot block type */
204 i = info->sector_count - 1;
205 info->start[i--] = base + info->size - 0x00004000;
206 info->start[i--] = base + info->size - 0x00006000;
207 info->start[i--] = base + info->size - 0x00008000;
208 for (; i >= 0; i--) {
209 info->start[i] = base + i * 0x00010000;
210 }
46578cc0 211 }
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212 }
213}
214
215/*-----------------------------------------------------------------------
216 */
50015ab3 217void flash_print_info (flash_info_t * info)
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218{
219 int i;
8bde7f77
WD
220 int k;
221 int size;
222 int erased;
223 volatile unsigned long *flash;
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SR
224
225 if (info->flash_id == FLASH_UNKNOWN) {
226 printf ("missing or unknown FLASH type\n");
227 return;
228 }
229
230 switch (info->flash_id & FLASH_VENDMASK) {
231 case FLASH_MAN_AMD: printf ("AMD "); break;
232 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
233 case FLASH_MAN_SST: printf ("SST "); break;
234 default: printf ("Unknown Vendor "); break;
235 }
236
237 switch (info->flash_id & FLASH_TYPEMASK) {
238 case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
239 break;
240 case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
241 break;
242 case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
243 break;
244 case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
245 break;
246 case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
247 break;
248 case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
249 break;
250 case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
251 break;
252 case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
253 break;
254 case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
255 break;
256 case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
257 break;
258 case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
259 break;
260 default: printf ("Unknown Chip Type\n");
261 break;
262 }
263
264 printf (" Size: %ld KB in %d Sectors\n",
265 info->size >> 10, info->sector_count);
266
267 printf (" Sector Start Addresses:");
50015ab3 268 for (i = 0; i < info->sector_count; ++i) {
8bde7f77
WD
269 /*
270 * Check if whole sector is erased
271 */
50015ab3
WD
272 if (i != (info->sector_count - 1))
273 size = info->start[i + 1] - info->start[i];
8bde7f77 274 else
50015ab3 275 size = info->start[0] + info->size - info->start[i];
8bde7f77 276 erased = 1;
50015ab3
WD
277 flash = (volatile unsigned long *) info->start[i];
278 size = size >> 2; /* divide by 4 for longword access */
279 for (k = 0; k < size; k++) {
280 if (*flash++ != 0xffffffff) {
281 erased = 0;
282 break;
283 }
284 }
46578cc0
SR
285
286 if ((i % 5) == 0)
287 printf ("\n ");
50015ab3 288#if 0 /* test-only */
46578cc0 289 printf (" %08lX%s",
50015ab3 290 info->start[i], info->protect[i] ? " (RO)" : " "
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SR
291#else
292 printf (" %08lX%s%s",
293 info->start[i],
50015ab3 294 erased ? " E" : " ", info->protect[i] ? "RO " : " "
46578cc0 295#endif
50015ab3 296 );
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SR
297 }
298 printf ("\n");
299 return;
300}
301
302/*-----------------------------------------------------------------------
303 */
304
305
306/*-----------------------------------------------------------------------
307 */
308
309/*
310 * The following code cannot be run from FLASH!
311 */
50015ab3 312static ulong flash_get_size (vu_long * addr, flash_info_t * info)
46578cc0
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313{
314 short i;
315 FLASH_WORD_SIZE value;
50015ab3
WD
316 ulong base = (ulong) addr;
317 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr;
46578cc0
SR
318
319 /* Write auto select command: read Manufacturer ID */
50015ab3
WD
320 addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
321 addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
322 addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00900090;
46578cc0
SR
323
324#ifdef CONFIG_ADCIOP
325 value = addr2[2];
326#else
327 value = addr2[0];
328#endif
329
330 switch (value) {
50015ab3 331 case (FLASH_WORD_SIZE) AMD_MANUFACT:
46578cc0
SR
332 info->flash_id = FLASH_MAN_AMD;
333 break;
50015ab3 334 case (FLASH_WORD_SIZE) FUJ_MANUFACT:
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SR
335 info->flash_id = FLASH_MAN_FUJ;
336 break;
50015ab3 337 case (FLASH_WORD_SIZE) SST_MANUFACT:
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SR
338 info->flash_id = FLASH_MAN_SST;
339 break;
340 default:
341 info->flash_id = FLASH_UNKNOWN;
342 info->sector_count = 0;
343 info->size = 0;
50015ab3 344 return (0); /* no or unknown flash */
46578cc0
SR
345 }
346
347#ifdef CONFIG_ADCIOP
50015ab3 348 value = addr2[0]; /* device ID */
8bde7f77 349 /* printf("\ndev_code=%x\n", value); */
46578cc0 350#else
50015ab3 351 value = addr2[1]; /* device ID */
46578cc0
SR
352#endif
353
354 switch (value) {
50015ab3 355 case (FLASH_WORD_SIZE) AMD_ID_F040B:
8bde7f77 356 info->flash_id += FLASH_AM040;
46578cc0 357 info->sector_count = 8;
50015ab3 358 info->size = 0x0080000; /* => 512 ko */
46578cc0 359 break;
50015ab3 360 case (FLASH_WORD_SIZE) AMD_ID_LV400T:
46578cc0
SR
361 info->flash_id += FLASH_AM400T;
362 info->sector_count = 11;
363 info->size = 0x00080000;
50015ab3 364 break; /* => 0.5 MB */
46578cc0 365
50015ab3 366 case (FLASH_WORD_SIZE) AMD_ID_LV400B:
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SR
367 info->flash_id += FLASH_AM400B;
368 info->sector_count = 11;
369 info->size = 0x00080000;
50015ab3 370 break; /* => 0.5 MB */
46578cc0 371
50015ab3 372 case (FLASH_WORD_SIZE) AMD_ID_LV800T:
46578cc0
SR
373 info->flash_id += FLASH_AM800T;
374 info->sector_count = 19;
375 info->size = 0x00100000;
50015ab3 376 break; /* => 1 MB */
46578cc0 377
50015ab3 378 case (FLASH_WORD_SIZE) AMD_ID_LV800B:
46578cc0
SR
379 info->flash_id += FLASH_AM800B;
380 info->sector_count = 19;
381 info->size = 0x00100000;
50015ab3 382 break; /* => 1 MB */
46578cc0 383
50015ab3 384 case (FLASH_WORD_SIZE) AMD_ID_LV160T:
46578cc0
SR
385 info->flash_id += FLASH_AM160T;
386 info->sector_count = 35;
387 info->size = 0x00200000;
50015ab3 388 break; /* => 2 MB */
46578cc0 389
50015ab3 390 case (FLASH_WORD_SIZE) AMD_ID_LV160B:
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SR
391 info->flash_id += FLASH_AM160B;
392 info->sector_count = 35;
393 info->size = 0x00200000;
50015ab3
WD
394 break; /* => 2 MB */
395#if 0 /* enable when device IDs are available */
396 case (FLASH_WORD_SIZE) AMD_ID_LV320T:
46578cc0
SR
397 info->flash_id += FLASH_AM320T;
398 info->sector_count = 67;
399 info->size = 0x00400000;
50015ab3 400 break; /* => 4 MB */
46578cc0 401
50015ab3 402 case (FLASH_WORD_SIZE) AMD_ID_LV320B:
46578cc0
SR
403 info->flash_id += FLASH_AM320B;
404 info->sector_count = 67;
405 info->size = 0x00400000;
50015ab3 406 break; /* => 4 MB */
46578cc0 407#endif
50015ab3 408 case (FLASH_WORD_SIZE) SST_ID_xF800A:
46578cc0
SR
409 info->flash_id += FLASH_SST800A;
410 info->sector_count = 16;
411 info->size = 0x00100000;
50015ab3 412 break; /* => 1 MB */
46578cc0 413
50015ab3 414 case (FLASH_WORD_SIZE) SST_ID_xF160A:
46578cc0
SR
415 info->flash_id += FLASH_SST160A;
416 info->sector_count = 32;
417 info->size = 0x00200000;
50015ab3 418 break; /* => 2 MB */
46578cc0
SR
419
420 default:
421 info->flash_id = FLASH_UNKNOWN;
50015ab3 422 return (0); /* => no or unknown flash */
46578cc0
SR
423
424 }
425
426 /* set up sector start address table */
8bde7f77 427 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
50015ab3
WD
428 (info->flash_id == FLASH_AM040)) {
429 for (i = 0; i < info->sector_count; i++)
430 info->start[i] = base + (i * 0x00010000);
8bde7f77 431 } else {
50015ab3
WD
432 if (info->flash_id & FLASH_BTYPE) {
433 /* set sector offsets for bottom boot block type */
434 info->start[0] = base + 0x00000000;
435 info->start[1] = base + 0x00004000;
436 info->start[2] = base + 0x00006000;
437 info->start[3] = base + 0x00008000;
438 for (i = 4; i < info->sector_count; i++) {
439 info->start[i] = base + (i * 0x00010000) - 0x00030000;
440 }
441 } else {
442 /* set sector offsets for top boot block type */
443 i = info->sector_count - 1;
444 info->start[i--] = base + info->size - 0x00004000;
445 info->start[i--] = base + info->size - 0x00006000;
446 info->start[i--] = base + info->size - 0x00008000;
447 for (; i >= 0; i--) {
448 info->start[i] = base + i * 0x00010000;
449 }
46578cc0 450 }
46578cc0
SR
451 }
452
453 /* check for protected sectors */
454 for (i = 0; i < info->sector_count; i++) {
455 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
456 /* D0 = 1 if protected */
457#ifdef CONFIG_ADCIOP
50015ab3 458 addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]);
46578cc0
SR
459 info->protect[i] = addr2[4] & 1;
460#else
50015ab3 461 addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]);
8bde7f77 462 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
50015ab3 463 info->protect[i] = 0;
8bde7f77 464 else
50015ab3 465 info->protect[i] = addr2[2] & 1;
46578cc0
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466#endif
467 }
468
469 /*
470 * Prevent writes to uninitialized FLASH.
471 */
472 if (info->flash_id != FLASH_UNKNOWN) {
50015ab3 473#if 0 /* test-only */
46578cc0 474#ifdef CONFIG_ADCIOP
50015ab3 475 addr2 = (volatile unsigned char *) info->start[0];
8bde7f77
WD
476 addr2[ADDR0] = 0xAA;
477 addr2[ADDR1] = 0x55;
50015ab3 478 addr2[ADDR0] = 0xF0; /* reset bank */
46578cc0 479#else
50015ab3
WD
480 addr2 = (FLASH_WORD_SIZE *) info->start[0];
481 *addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
46578cc0 482#endif
50015ab3
WD
483#else /* test-only */
484 addr2 = (FLASH_WORD_SIZE *) info->start[0];
485 *addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
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SR
486#endif /* test-only */
487 }
488
489 return (info->size);
490}
491
50015ab3 492int wait_for_DQ7 (flash_info_t * info, int sect)
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SR
493{
494 ulong start, now, last;
50015ab3 495 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[sect]);
46578cc0
SR
496
497 start = get_timer (0);
50015ab3
WD
498 last = 0;
499 while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) != (FLASH_WORD_SIZE) 0x00800080) {
500 if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
b828dda6
SR
501 printf ("Timeout\n");
502 return -1;
503 }
504 /* show that we're waiting */
50015ab3 505 if ((now - last) > 1000) { /* every second */
b828dda6
SR
506 putc ('.');
507 last = now;
508 }
8bde7f77 509 }
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SR
510 return 0;
511}
512
513/*-----------------------------------------------------------------------
514 */
515
50015ab3 516int flash_erase (flash_info_t * info, int s_first, int s_last)
46578cc0 517{
50015ab3 518 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
46578cc0
SR
519 volatile FLASH_WORD_SIZE *addr2;
520 int flag, prot, sect, l_sect;
521 int i;
522
523 if ((s_first < 0) || (s_first > s_last)) {
524 if (info->flash_id == FLASH_UNKNOWN) {
525 printf ("- missing\n");
526 } else {
527 printf ("- no sectors to erase\n");
528 }
529 return 1;
530 }
531
532 if (info->flash_id == FLASH_UNKNOWN) {
533 printf ("Can't erase unknown flash type - aborted\n");
534 return 1;
535 }
536
537 prot = 0;
50015ab3 538 for (sect = s_first; sect <= s_last; ++sect) {
46578cc0
SR
539 if (info->protect[sect]) {
540 prot++;
541 }
542 }
543
544 if (prot) {
50015ab3 545 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
46578cc0
SR
546 } else {
547 printf ("\n");
548 }
549
550 l_sect = -1;
551
552 /* Disable interrupts which might cause a timeout here */
50015ab3 553 flag = disable_interrupts ();
46578cc0
SR
554
555 /* Start erase on unprotected sectors */
50015ab3 556 for (sect = s_first; sect <= s_last; sect++) {
46578cc0 557 if (info->protect[sect] == 0) { /* not protected */
50015ab3
WD
558 addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
559 printf ("Erasing sector %p\n", addr2); /* CLH */
560
561 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
562 addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
563 addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
564 addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
565 addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
566 addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
567 addr2[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */
568 for (i = 0; i < 50; i++)
569 udelay (1000); /* wait 1 ms */
570 } else {
571 addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
572 addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
573 addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
574 addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
575 addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
576 addr2[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
577 }
578 l_sect = sect;
579 /*
580 * Wait for each sector to complete, it's more
581 * reliable. According to AMD Spec, you must
582 * issue all erase commands within a specified
583 * timeout. This has been seen to fail, especially
584 * if printf()s are included (for debug)!!
585 */
586 wait_for_DQ7 (info, sect);
46578cc0
SR
587 }
588 }
589
590 /* re-enable interrupts if necessary */
591 if (flag)
50015ab3 592 enable_interrupts ();
46578cc0
SR
593
594 /* wait at least 80us - let's wait 1 ms */
595 udelay (1000);
596
597#if 0
598 /*
599 * We wait for the last triggered sector
600 */
601 if (l_sect < 0)
602 goto DONE;
50015ab3 603 wait_for_DQ7 (info, l_sect);
46578cc0 604
50015ab3 605 DONE:
46578cc0
SR
606#endif
607 /* reset to read mode */
50015ab3
WD
608 addr = (FLASH_WORD_SIZE *) info->start[0];
609 addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
46578cc0
SR
610
611 printf (" done\n");
612 return 0;
613}
614
615/*-----------------------------------------------------------------------
616 * Copy memory to flash, returns:
617 * 0 - OK
618 * 1 - write timeout
619 * 2 - Flash not erased
620 */
621
50015ab3 622int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
46578cc0
SR
623{
624 ulong cp, wp, data;
625 int i, l, rc;
626
627 wp = (addr & ~3); /* get lower word aligned address */
628
629 /*
630 * handle unaligned start bytes
631 */
632 if ((l = addr - wp) != 0) {
633 data = 0;
50015ab3
WD
634 for (i = 0, cp = wp; i < l; ++i, ++cp) {
635 data = (data << 8) | (*(uchar *) cp);
46578cc0 636 }
50015ab3 637 for (; i < 4 && cnt > 0; ++i) {
46578cc0
SR
638 data = (data << 8) | *src++;
639 --cnt;
640 ++cp;
641 }
50015ab3
WD
642 for (; cnt == 0 && i < 4; ++i, ++cp) {
643 data = (data << 8) | (*(uchar *) cp);
46578cc0
SR
644 }
645
50015ab3 646 if ((rc = write_word (info, wp, data)) != 0) {
46578cc0
SR
647 return (rc);
648 }
649 wp += 4;
650 }
651
652 /*
653 * handle word aligned part
654 */
655 while (cnt >= 4) {
656 data = 0;
50015ab3 657 for (i = 0; i < 4; ++i) {
46578cc0
SR
658 data = (data << 8) | *src++;
659 }
50015ab3 660 if ((rc = write_word (info, wp, data)) != 0) {
46578cc0
SR
661 return (rc);
662 }
50015ab3 663 wp += 4;
46578cc0
SR
664 cnt -= 4;
665 }
666
667 if (cnt == 0) {
668 return (0);
669 }
670
671 /*
672 * handle unaligned tail bytes
673 */
674 data = 0;
50015ab3 675 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
46578cc0
SR
676 data = (data << 8) | *src++;
677 --cnt;
678 }
50015ab3
WD
679 for (; i < 4; ++i, ++cp) {
680 data = (data << 8) | (*(uchar *) cp);
46578cc0
SR
681 }
682
50015ab3 683 return (write_word (info, wp, data));
46578cc0
SR
684}
685
686/*-----------------------------------------------------------------------
687 * Write a word to Flash, returns:
688 * 0 - OK
689 * 1 - write timeout
690 * 2 - Flash not erased
691 */
692static int write_word (flash_info_t * info, ulong dest, ulong data)
693{
694 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) (info->start[0]);
695 volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
696 volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
697 ulong start;
698 int i;
699
700 /* Check if Flash is (sufficiently) erased */
701 if ((*((volatile FLASH_WORD_SIZE *) dest) &
50015ab3 702 (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
46578cc0
SR
703 return (2);
704 }
705
706 for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
707 int flag;
708
709 /* Disable interrupts which might cause a timeout here */
710 flag = disable_interrupts ();
711
712 addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
713 addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
714 addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
715
716 dest2[i] = data2[i];
717
718 /* re-enable interrupts if necessary */
719 if (flag)
720 enable_interrupts ();
721
722 /* data polling for D7 */
723 start = get_timer (0);
724 while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
725 (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
726
727 if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
728 return (1);
729 }
730 }
731 }
732
733 return (0);
734}
735
736/*-----------------------------------------------------------------------
737 */