[thirdparty/u-boot.git] / board / canmb / mt48lc16m32s2-75.h

/*
 * (C) Copyright 2004
 * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#define SDRAM_DDR	0		/* is SDR */

/* Settings for XLB = 132 MHz */
#define SDRAM_MODE	0x00CD0000
#define SDRAM_CONTROL	0x504F0000
#define SDRAM_CONFIG1	0xD2322800
#define SDRAM_CONFIG2	0x8AD70000
Commit	Line	Data
ec0ca731 WD	1	/*
	2	* (C) Copyright 2004
	3	* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
ec0ca731 WD	6	*/
	7
	8	#define SDRAM_DDR 0 /* is SDR */
	9
ec0ca731 WD	10	/* Settings for XLB = 132 MHz */
	11	#define SDRAM_MODE 0x00CD0000
	12	#define SDRAM_CONTROL 0x504F0000
	13	#define SDRAM_CONFIG1 0xD2322800
	14	#define SDRAM_CONFIG2 0x8AD70000