[people/ms/u-boot.git] / board / cogent / mb.c

/*
 * (C) Copyright 2000
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <board/cogent/dipsw.h>
#include <board/cogent/lcd.h>
#include <board/cogent/rtc.h>
#include <board/cogent/par.h>
#include <board/cogent/pci.h>

/* ------------------------------------------------------------------------- */

#if defined(CONFIG_8260)

#include <ioports.h>

/*
 * I/O Port configuration table
 *
 * if conf is 1, then that port pin will be configured at boot time
 * according to the five values podr/pdir/ppar/psor/pdat for that entry
 */

const iop_conf_t iop_conf_tab[4][32] = {

	/* Port A configuration */
	{			/*            conf ppar psor pdir podr pdat */
	 /* PA31 */ {0, 0, 0, 0, 0, 0},
	 /* PA30 */ {0, 0, 0, 0, 0, 0},
	 /* PA29 */ {0, 0, 0, 0, 0, 0},
	 /* PA28 */ {0, 0, 0, 0, 0, 0},
	 /* PA27 */ {0, 0, 0, 0, 0, 0},
	 /* PA26 */ {0, 0, 0, 0, 0, 0},
	 /* PA25 */ {0, 0, 0, 0, 0, 0},
	 /* PA24 */ {0, 0, 0, 0, 0, 0},
	 /* PA23 */ {0, 0, 0, 0, 0, 0},
	 /* PA22 */ {0, 0, 0, 0, 0, 0},
	 /* PA21 */ {0, 0, 0, 0, 0, 0},
	 /* PA20 */ {0, 0, 0, 0, 0, 0},
	 /* PA19 */ {0, 0, 0, 0, 0, 0},
	 /* PA18 */ {0, 0, 0, 0, 0, 0},
	 /* PA17 */ {0, 0, 0, 0, 0, 0},
	 /* PA16 */ {0, 0, 0, 0, 0, 0},
	 /* PA15 */ {0, 0, 0, 0, 0, 0},
	 /* PA14 */ {0, 0, 0, 0, 0, 0},
	 /* PA13 */ {0, 0, 0, 0, 0, 0},
	 /* PA12 */ {0, 0, 0, 0, 0, 0},
	 /* PA11 */ {0, 0, 0, 0, 0, 0},
	 /* PA10 */ {0, 0, 0, 0, 0, 0},
					/* PA9  */ {1, 1, 0, 1, 0, 0},
					/* SMC2 TXD */
					/* PA8  */ {1, 1, 0, 0, 0, 0},
					/* SMC2 RXD */
	 /* PA7  */ {0, 0, 0, 0, 0, 0},
	 /* PA6  */ {0, 0, 0, 0, 0, 0},
	 /* PA5  */ {0, 0, 0, 0, 0, 0},
	 /* PA4  */ {0, 0, 0, 0, 0, 0},
	 /* PA3  */ {0, 0, 0, 0, 0, 0},
	 /* PA2  */ {0, 0, 0, 0, 0, 0},
	 /* PA1  */ {0, 0, 0, 0, 0, 0},
	 /* PA0  */ {0, 0, 0, 0, 0, 0}
	 },


	{			/*            conf ppar psor pdir podr pdat */
	 /* PB31 */ {0, 0, 0, 0, 0, 0},
	 /* PB30 */ {0, 0, 0, 0, 0, 0},
	 /* PB29 */ {0, 0, 0, 0, 0, 0},
	 /* PB28 */ {0, 0, 0, 0, 0, 0},
	 /* PB27 */ {0, 0, 0, 0, 0, 0},
	 /* PB26 */ {0, 0, 0, 0, 0, 0},
	 /* PB25 */ {0, 0, 0, 0, 0, 0},
	 /* PB24 */ {0, 0, 0, 0, 0, 0},
	 /* PB23 */ {0, 0, 0, 0, 0, 0},
	 /* PB22 */ {0, 0, 0, 0, 0, 0},
	 /* PB21 */ {0, 0, 0, 0, 0, 0},
	 /* PB20 */ {0, 0, 0, 0, 0, 0},
	 /* PB19 */ {0, 0, 0, 0, 0, 0},
	 /* PB18 */ {0, 0, 0, 0, 0, 0},
	 /* PB17 */ {0, 0, 0, 0, 0, 0},
	 /* PB16 */ {0, 0, 0, 0, 0, 0},
	 /* PB15 */ {0, 0, 0, 0, 0, 0},
	 /* PB14 */ {0, 0, 0, 0, 0, 0},
	 /* PB13 */ {0, 0, 0, 0, 0, 0},
	 /* PB12 */ {0, 0, 0, 0, 0, 0},
	 /* PB11 */ {0, 0, 0, 0, 0, 0},
	 /* PB10 */ {0, 0, 0, 0, 0, 0},
	 /* PB9  */ {0, 0, 0, 0, 0, 0},
	 /* PB8  */ {0, 0, 0, 0, 0, 0},
	 /* PB7  */ {0, 0, 0, 0, 0, 0},
	 /* PB6  */ {0, 0, 0, 0, 0, 0},
	 /* PB5  */ {0, 0, 0, 0, 0, 0},
	 /* PB4  */ {0, 0, 0, 0, 0, 0},
					/* PB3  */ {0, 0, 0, 0, 0, 0},
					/* pin doesn't exist */
					/* PB2  */ {0, 0, 0, 0, 0, 0},
					/* pin doesn't exist */
					/* PB1  */ {0, 0, 0, 0, 0, 0},
					/* pin doesn't exist */
					/* PB0  */ {0, 0, 0, 0, 0, 0}
					/* pin doesn't exist */
	 },


	{			/*            conf ppar psor pdir podr pdat */
	 /* PC31 */ {0, 0, 0, 0, 0, 0},
	 /* PC30 */ {0, 0, 0, 0, 0, 0},
	 /* PC29 */ {0, 0, 0, 0, 0, 0},
	 /* PC28 */ {0, 0, 0, 0, 0, 0},
	 /* PC27 */ {0, 0, 0, 0, 0, 0},
	 /* PC26 */ {0, 0, 0, 0, 0, 0},
	 /* PC25 */ {0, 0, 0, 0, 0, 0},
	 /* PC24 */ {0, 0, 0, 0, 0, 0},
	 /* PC23 */ {0, 0, 0, 0, 0, 0},
	 /* PC22 */ {0, 0, 0, 0, 0, 0},
	 /* PC21 */ {0, 0, 0, 0, 0, 0},
	 /* PC20 */ {0, 0, 0, 0, 0, 0},
	 /* PC19 */ {0, 0, 0, 0, 0, 0},
	 /* PC18 */ {0, 0, 0, 0, 0, 0},
	 /* PC17 */ {0, 0, 0, 0, 0, 0},
	 /* PC16 */ {0, 0, 0, 0, 0, 0},
	 /* PC15 */ {0, 0, 0, 0, 0, 0},
	 /* PC14 */ {0, 0, 0, 0, 0, 0},
	 /* PC13 */ {0, 0, 0, 0, 0, 0},
	 /* PC12 */ {0, 0, 0, 0, 0, 0},
	 /* PC11 */ {0, 0, 0, 0, 0, 0},
	 /* PC10 */ {0, 0, 0, 0, 0, 0},
	 /* PC9  */ {0, 0, 0, 0, 0, 0},
	 /* PC8  */ {0, 0, 0, 0, 0, 0},
	 /* PC7  */ {0, 0, 0, 0, 0, 0},
	 /* PC6  */ {0, 0, 0, 0, 0, 0},
	 /* PC5  */ {0, 0, 0, 0, 0, 0},
	 /* PC4  */ {0, 0, 0, 0, 0, 0},
	 /* PC3  */ {0, 0, 0, 0, 0, 0},
	 /* PC2  */ {0, 0, 0, 0, 0, 0},
	 /* PC1  */ {0, 0, 0, 0, 0, 0},
	 /* PC0  */ {0, 0, 0, 0, 0, 0}
	 },


	{			/*            conf ppar psor pdir podr pdat */
	 /* PD31 */ {0, 0, 0, 0, 0, 0},
	 /* PD30 */ {0, 0, 0, 0, 0, 0},
	 /* PD29 */ {0, 0, 0, 0, 0, 0},
	 /* PD28 */ {0, 0, 0, 0, 0, 0},
	 /* PD27 */ {0, 0, 0, 0, 0, 0},
	 /* PD26 */ {0, 0, 0, 0, 0, 0},
	 /* PD25 */ {0, 0, 0, 0, 0, 0},
	 /* PD24 */ {0, 0, 0, 0, 0, 0},
	 /* PD23 */ {0, 0, 0, 0, 0, 0},
	 /* PD22 */ {0, 0, 0, 0, 0, 0},
	 /* PD21 */ {0, 0, 0, 0, 0, 0},
	 /* PD20 */ {0, 0, 0, 0, 0, 0},
	 /* PD19 */ {0, 0, 0, 0, 0, 0},
	 /* PD18 */ {0, 0, 0, 0, 0, 0},
	 /* PD17 */ {0, 0, 0, 0, 0, 0},
	 /* PD16 */ {0, 0, 0, 0, 0, 0},
					/* PD15 */ {1, 1, 1, 0, 0, 0},
					/* I2C SDA */
					/* PD14 */ {1, 1, 1, 0, 0, 0},
					/* I2C SCL */
	 /* PD13 */ {0, 0, 0, 0, 0, 0},
	 /* PD12 */ {0, 0, 0, 0, 0, 0},
	 /* PD11 */ {0, 0, 0, 0, 0, 0},
	 /* PD10 */ {0, 0, 0, 0, 0, 0},
					/* PD9  */ {1, 1, 0, 1, 0, 0},
					/* SMC1 TXD */
					/* PD8  */ {1, 1, 0, 0, 0, 0},
					/* SMC1 RXD */
	 /* PD7  */ {0, 0, 0, 0, 0, 0},
	 /* PD6  */ {0, 0, 0, 0, 0, 0},
	 /* PD5  */ {0, 0, 0, 0, 0, 0},
	 /* PD4  */ {0, 0, 0, 0, 0, 0},
					/* PD3  */ {0, 0, 0, 0, 0, 0},
					/* pin doesn't exist */
					/* PD2  */ {0, 0, 0, 0, 0, 0},
					/* pin doesn't exist */
					/* PD1  */ {0, 0, 0, 0, 0, 0},
					/* pin doesn't exist */
					/* PD0  */ {0, 0, 0, 0, 0, 0}
					/* pin doesn't exist */
	 }
};

#endif /* CONFIG_8260 */

/* ------------------------------------------------------------------------- */

/*
 * Check Board Identity:
 */

int checkboard (void)
{
	puts ("Board: Cogent " COGENT_MOTHERBOARD " motherboard with a "
	      COGENT_CPU_MODULE " CPU Module\n");
	return (0);
}

/* ------------------------------------------------------------------------- */

/*
 * Miscelaneous platform dependent initialisations while still
 * running in flash
 */

int misc_init_f (void)
{
	printf ("DIPSW: ");
	dipsw_init ();
	return (0);
}

/* ------------------------------------------------------------------------- */

phys_size_t initdram (int board_type)
{
#ifdef CONFIG_CMA111
	return (32L * 1024L * 1024L);
#else
	unsigned char dipsw_val;
	int dual, size0, size1;
	long int memsize;

	dipsw_val = dipsw_cooked ();

	dual = dipsw_val & 0x01;
	size0 = (dipsw_val & 0x08) >> 3;
	size1 = (dipsw_val & 0x04) >> 2;

	if (size0)
		if (size1)
			memsize = 16L * 1024L * 1024L;
		else
			memsize = 1L * 1024L * 1024L;
	else if (size1)
		memsize = 4L * 1024L * 1024L;
	else {
		printf ("[Illegal dip switch settings - assuming 16Mbyte SIMMs] ");
		memsize = 16L * 1024L * 1024L;	/* shouldn't happen - guess 16M */
	}

	if (dual)
		memsize *= 2L;

	return (memsize);
#endif
}

/* ------------------------------------------------------------------------- */

/*
 * Miscelaneous platform dependent initialisations after monitor
 * has been relocated into ram
 */

int misc_init_r (void)
{
	printf ("LCD:   ");
	lcd_init ();

#if 0
	printf ("RTC:   ");
	rtc_init ();

	printf ("PAR:   ");
	par_init ();

	printf ("KBM:   ");
	kbm_init ();

	printf ("PCI:   ");
	pci_init ();
#endif
	return (0);
}
Commit	Line	Data
354bc6fe WD	1	/*
	2	* (C) Copyright 2000
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	#include <common.h>
	25	#include <board/cogent/dipsw.h>
	26	#include <board/cogent/lcd.h>
	27	#include <board/cogent/rtc.h>
	28	#include <board/cogent/par.h>
	29	#include <board/cogent/pci.h>
	30
	31	/* ------------------------------------------------------------------------- */
	32
	33	#if defined(CONFIG_8260)
	34
	35	#include <ioports.h>
	36
	37	/*
	38	* I/O Port configuration table
	39	*
	40	* if conf is 1, then that port pin will be configured at boot time
	41	* according to the five values podr/pdir/ppar/psor/pdat for that entry
	42	*/
	43
	44	const iop_conf_t iop_conf_tab[4][32] = {
	45
bf9e3b38 WD	46	/* Port A configuration */
	47	{ /* conf ppar psor pdir podr pdat */
	48	/* PA31 */ {0, 0, 0, 0, 0, 0},
	49	/* PA30 */ {0, 0, 0, 0, 0, 0},
	50	/* PA29 */ {0, 0, 0, 0, 0, 0},
	51	/* PA28 */ {0, 0, 0, 0, 0, 0},
	52	/* PA27 */ {0, 0, 0, 0, 0, 0},
	53	/* PA26 */ {0, 0, 0, 0, 0, 0},
	54	/* PA25 */ {0, 0, 0, 0, 0, 0},
	55	/* PA24 */ {0, 0, 0, 0, 0, 0},
	56	/* PA23 */ {0, 0, 0, 0, 0, 0},
	57	/* PA22 */ {0, 0, 0, 0, 0, 0},
	58	/* PA21 */ {0, 0, 0, 0, 0, 0},
	59	/* PA20 */ {0, 0, 0, 0, 0, 0},
	60	/* PA19 */ {0, 0, 0, 0, 0, 0},
	61	/* PA18 */ {0, 0, 0, 0, 0, 0},
	62	/* PA17 */ {0, 0, 0, 0, 0, 0},
	63	/* PA16 */ {0, 0, 0, 0, 0, 0},
	64	/* PA15 */ {0, 0, 0, 0, 0, 0},
	65	/* PA14 */ {0, 0, 0, 0, 0, 0},
	66	/* PA13 */ {0, 0, 0, 0, 0, 0},
	67	/* PA12 */ {0, 0, 0, 0, 0, 0},
	68	/* PA11 */ {0, 0, 0, 0, 0, 0},
	69	/* PA10 */ {0, 0, 0, 0, 0, 0},
	70	/* PA9 */ {1, 1, 0, 1, 0, 0},
	71	/* SMC2 TXD */
	72	/* PA8 */ {1, 1, 0, 0, 0, 0},
	73	/* SMC2 RXD */
	74	/* PA7 */ {0, 0, 0, 0, 0, 0},
	75	/* PA6 */ {0, 0, 0, 0, 0, 0},
	76	/* PA5 */ {0, 0, 0, 0, 0, 0},
	77	/* PA4 */ {0, 0, 0, 0, 0, 0},
	78	/* PA3 */ {0, 0, 0, 0, 0, 0},
	79	/* PA2 */ {0, 0, 0, 0, 0, 0},
	80	/* PA1 */ {0, 0, 0, 0, 0, 0},
	81	/* PA0 */ {0, 0, 0, 0, 0, 0}
	82	},
	83
	84
	85	{ /* conf ppar psor pdir podr pdat */
	86	/* PB31 */ {0, 0, 0, 0, 0, 0},
	87	/* PB30 */ {0, 0, 0, 0, 0, 0},
	88	/* PB29 */ {0, 0, 0, 0, 0, 0},
	89	/* PB28 */ {0, 0, 0, 0, 0, 0},
	90	/* PB27 */ {0, 0, 0, 0, 0, 0},
	91	/* PB26 */ {0, 0, 0, 0, 0, 0},
	92	/* PB25 */ {0, 0, 0, 0, 0, 0},
	93	/* PB24 */ {0, 0, 0, 0, 0, 0},
	94	/* PB23 */ {0, 0, 0, 0, 0, 0},
	95	/* PB22 */ {0, 0, 0, 0, 0, 0},
	96	/* PB21 */ {0, 0, 0, 0, 0, 0},
	97	/* PB20 */ {0, 0, 0, 0, 0, 0},
	98	/* PB19 */ {0, 0, 0, 0, 0, 0},
	99	/* PB18 */ {0, 0, 0, 0, 0, 0},
	100	/* PB17 */ {0, 0, 0, 0, 0, 0},
	101	/* PB16 */ {0, 0, 0, 0, 0, 0},
	102	/* PB15 */ {0, 0, 0, 0, 0, 0},
	103	/* PB14 */ {0, 0, 0, 0, 0, 0},
	104	/* PB13 */ {0, 0, 0, 0, 0, 0},
	105	/* PB12 */ {0, 0, 0, 0, 0, 0},
	106	/* PB11 */ {0, 0, 0, 0, 0, 0},
	107	/* PB10 */ {0, 0, 0, 0, 0, 0},
	108	/* PB9 */ {0, 0, 0, 0, 0, 0},
	109	/* PB8 */ {0, 0, 0, 0, 0, 0},
110	/* PB7 */ {0, 0, 0, 0, 0, 0},
111	/* PB6 */ {0, 0, 0, 0, 0, 0},
112	/* PB5 */ {0, 0, 0, 0, 0, 0},
113	/* PB4 */ {0, 0, 0, 0, 0, 0},
114	/* PB3 */ {0, 0, 0, 0, 0, 0},
115	/* pin doesn't exist */
116	/* PB2 */ {0, 0, 0, 0, 0, 0},
117	/* pin doesn't exist */
118	/* PB1 */ {0, 0, 0, 0, 0, 0},
119	/* pin doesn't exist */
120	/* PB0 */ {0, 0, 0, 0, 0, 0}
121	/* pin doesn't exist */
122	},
123
124
125	{ /* conf ppar psor pdir podr pdat */
126	/* PC31 */ {0, 0, 0, 0, 0, 0},
127	/* PC30 */ {0, 0, 0, 0, 0, 0},
128	/* PC29 */ {0, 0, 0, 0, 0, 0},
129	/* PC28 */ {0, 0, 0, 0, 0, 0},
130	/* PC27 */ {0, 0, 0, 0, 0, 0},
131	/* PC26 */ {0, 0, 0, 0, 0, 0},
132	/* PC25 */ {0, 0, 0, 0, 0, 0},
133	/* PC24 */ {0, 0, 0, 0, 0, 0},
134	/* PC23 */ {0, 0, 0, 0, 0, 0},
135	/* PC22 */ {0, 0, 0, 0, 0, 0},
136	/* PC21 */ {0, 0, 0, 0, 0, 0},
137	/* PC20 */ {0, 0, 0, 0, 0, 0},
138	/* PC19 */ {0, 0, 0, 0, 0, 0},
139	/* PC18 */ {0, 0, 0, 0, 0, 0},
140	/* PC17 */ {0, 0, 0, 0, 0, 0},
141	/* PC16 */ {0, 0, 0, 0, 0, 0},
142	/* PC15 */ {0, 0, 0, 0, 0, 0},
143	/* PC14 */ {0, 0, 0, 0, 0, 0},
144	/* PC13 */ {0, 0, 0, 0, 0, 0},
145	/* PC12 */ {0, 0, 0, 0, 0, 0},
146	/* PC11 */ {0, 0, 0, 0, 0, 0},
147	/* PC10 */ {0, 0, 0, 0, 0, 0},
148	/* PC9 */ {0, 0, 0, 0, 0, 0},
149	/* PC8 */ {0, 0, 0, 0, 0, 0},
150	/* PC7 */ {0, 0, 0, 0, 0, 0},
151	/* PC6 */ {0, 0, 0, 0, 0, 0},
152	/* PC5 */ {0, 0, 0, 0, 0, 0},
153	/* PC4 */ {0, 0, 0, 0, 0, 0},
154	/* PC3 */ {0, 0, 0, 0, 0, 0},
155	/* PC2 */ {0, 0, 0, 0, 0, 0},
156	/* PC1 */ {0, 0, 0, 0, 0, 0},
157	/* PC0 */ {0, 0, 0, 0, 0, 0}
158	},
159
160
161	{ /* conf ppar psor pdir podr pdat */
162	/* PD31 */ {0, 0, 0, 0, 0, 0},
163	/* PD30 */ {0, 0, 0, 0, 0, 0},
164	/* PD29 */ {0, 0, 0, 0, 0, 0},
165	/* PD28 */ {0, 0, 0, 0, 0, 0},
166	/* PD27 */ {0, 0, 0, 0, 0, 0},
167	/* PD26 */ {0, 0, 0, 0, 0, 0},
168	/* PD25 */ {0, 0, 0, 0, 0, 0},
169	/* PD24 */ {0, 0, 0, 0, 0, 0},
170	/* PD23 */ {0, 0, 0, 0, 0, 0},
171	/* PD22 */ {0, 0, 0, 0, 0, 0},
172	/* PD21 */ {0, 0, 0, 0, 0, 0},
173	/* PD20 */ {0, 0, 0, 0, 0, 0},
174	/* PD19 */ {0, 0, 0, 0, 0, 0},
175	/* PD18 */ {0, 0, 0, 0, 0, 0},
176	/* PD17 */ {0, 0, 0, 0, 0, 0},
177	/* PD16 */ {0, 0, 0, 0, 0, 0},
178	/* PD15 */ {1, 1, 1, 0, 0, 0},
179	/* I2C SDA */
180	/* PD14 */ {1, 1, 1, 0, 0, 0},
181	/* I2C SCL */
182	/* PD13 */ {0, 0, 0, 0, 0, 0},
183	/* PD12 */ {0, 0, 0, 0, 0, 0},
184	/* PD11 */ {0, 0, 0, 0, 0, 0},
185	/* PD10 */ {0, 0, 0, 0, 0, 0},
186	/* PD9 */ {1, 1, 0, 1, 0, 0},
187	/* SMC1 TXD */
188	/* PD8 */ {1, 1, 0, 0, 0, 0},
189	/* SMC1 RXD */
190	/* PD7 */ {0, 0, 0, 0, 0, 0},
191	/* PD6 */ {0, 0, 0, 0, 0, 0},
192	/* PD5 */ {0, 0, 0, 0, 0, 0},
193	/* PD4 */ {0, 0, 0, 0, 0, 0},
194	/* PD3 */ {0, 0, 0, 0, 0, 0},
195	/* pin doesn't exist */
196	/* PD2 */ {0, 0, 0, 0, 0, 0},
197	/* pin doesn't exist */
198	/* PD1 */ {0, 0, 0, 0, 0, 0},
199	/* pin doesn't exist */
200	/* PD0 */ {0, 0, 0, 0, 0, 0}
201	/* pin doesn't exist */
202	}
354bc6fe WD	203	};
354bc6fe WD	204
bf9e3b38	205	#endif /* CONFIG_8260 */
354bc6fe WD	206
	207	/* ------------------------------------------------------------------------- */
	208
	209	/*
	210	* Check Board Identity:
	211	*/
	212
bf9e3b38	213	int checkboard (void)
354bc6fe	214	{
bf9e3b38 WD	215	puts ("Board: Cogent " COGENT_MOTHERBOARD " motherboard with a "
	216	COGENT_CPU_MODULE " CPU Module\n");
	217	return (0);
354bc6fe WD	218	}
	219
	220	/* ------------------------------------------------------------------------- */
	221
	222	/*
	223	* Miscelaneous platform dependent initialisations while still
	224	* running in flash
	225	*/
	226
	227	int misc_init_f (void)
	228	{
bf9e3b38 WD	229	printf ("DIPSW: ");
	230	dipsw_init ();
	231	return (0);
354bc6fe WD	232	}
	233
	234	/* ------------------------------------------------------------------------- */
	235
9973e3c6	236	phys_size_t initdram (int board_type)
354bc6fe	237	{
42dfe7a1	238	#ifdef CONFIG_CMA111
bf9e3b38	239	return (32L * 1024L * 1024L);
354bc6fe	240	#else
bf9e3b38 WD	241	unsigned char dipsw_val;
	242	int dual, size0, size1;
	243	long int memsize;
	244
	245	dipsw_val = dipsw_cooked ();
	246
	247	dual = dipsw_val & 0x01;
	248	size0 = (dipsw_val & 0x08) >> 3;
	249	size1 = (dipsw_val & 0x04) >> 2;
	250
	251	if (size0)
	252	if (size1)
	253	memsize = 16L * 1024L * 1024L;
	254	else
	255	memsize = 1L * 1024L * 1024L;
	256	else if (size1)
	257	memsize = 4L * 1024L * 1024L;
354bc6fe	258	else {
bf9e3b38 WD	259	printf ("[Illegal dip switch settings - assuming 16Mbyte SIMMs] ");
bf9e3b38 WD	260	memsize = 16L * 1024L * 1024L; /* shouldn't happen - guess 16M */
354bc6fe WD	261	}
354bc6fe WD	262
bf9e3b38 WD	263	if (dual)
bf9e3b38 WD	264	memsize *= 2L;
354bc6fe	265
bf9e3b38	266	return (memsize);
354bc6fe WD	267	#endif
	268	}
	269
	270	/* ------------------------------------------------------------------------- */
	271
	272	/*
	273	* Miscelaneous platform dependent initialisations after monitor
	274	* has been relocated into ram
	275	*/
	276
	277	int misc_init_r (void)
	278	{
bf9e3b38 WD	279	printf ("LCD: ");
bf9e3b38 WD	280	lcd_init ();
354bc6fe WD	281
354bc6fe WD	282	#if 0
bf9e3b38 WD	283	printf ("RTC: ");
bf9e3b38 WD	284	rtc_init ();
354bc6fe	285
bf9e3b38 WD	286	printf ("PAR: ");
bf9e3b38 WD	287	par_init ();
354bc6fe	288
bf9e3b38 WD	289	printf ("KBM: ");
bf9e3b38 WD	290	kbm_init ();
354bc6fe	291
bf9e3b38 WD	292	printf ("PCI: ");
bf9e3b38 WD	293	pci_init ();
354bc6fe	294	#endif
bf9e3b38	295	return (0);
354bc6fe	296	}