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39e37118 SW |
1 | /* |
2 | * (C) Copyright 2010-2012 | |
3 | * NVIDIA Corporation <www.nvidia.com> | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
39e37118 SW |
6 | */ |
7 | ||
8 | #include <common.h> | |
39e37118 | 9 | #include <asm/io.h> |
150c2493 | 10 | #include <asm/arch/tegra.h> |
39e37118 SW |
11 | #include <asm/arch/clock.h> |
12 | #include <asm/arch/funcmux.h> | |
13 | #include <asm/arch/pinmux.h> | |
39e37118 | 14 | #include <asm/gpio.h> |
150c2493 | 15 | #include <i2c.h> |
39e37118 | 16 | |
7155dc97 SW |
17 | void pin_mux_usb(void) |
18 | { | |
19 | /* | |
20 | * USB1 internal/external mux GPIO, which masquerades as a VBUS GPIO | |
21 | * in the current device tree. | |
22 | */ | |
70ad375e | 23 | pinmux_tristate_disable(PMUX_PINGRP_UAC); |
7155dc97 | 24 | } |
39e37118 | 25 | |
2db7b952 SW |
26 | void pin_mux_spi(void) |
27 | { | |
28 | funcmux_select(PERIPH_ID_SPI1, FUNCMUX_SPI1_GMC_GMD); | |
29 | } | |
30 | ||
39e37118 SW |
31 | /* |
32 | * Routine: pin_mux_mmc | |
33 | * Description: setup the pin muxes/tristate values for the SDMMC(s) | |
34 | */ | |
c9aa831e | 35 | void pin_mux_mmc(void) |
39e37118 SW |
36 | { |
37 | funcmux_select(PERIPH_ID_SDMMC1, FUNCMUX_SDMMC1_SDIO1_4BIT); | |
38 | funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT); | |
39 | ||
40 | /* For CD GPIO PP1 */ | |
70ad375e | 41 | pinmux_tristate_disable(PMUX_PINGRP_DAP3); |
39e37118 | 42 | } |