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aa04fef4 MV |
1 | /* |
2 | * Creative ZEN X-Fi3 setup | |
3 | * | |
4 | * Copyright (C) 2013 Marek Vasut <marex@denx.de> | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #include <common.h> | |
10 | #include <config.h> | |
11 | #include <asm/io.h> | |
12 | #include <asm/arch/iomux-mx23.h> | |
13 | #include <asm/arch/imx-regs.h> | |
14 | #include <asm/arch/sys_proto.h> | |
15 | ||
16 | #define MUX_CONFIG_EMI (MXS_PAD_1V8 | MXS_PAD_12MA | MXS_PAD_PULLUP) | |
17 | #define MUX_CONFIG_SSP (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) | |
18 | #define MUX_CONFIG_LCD (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) | |
19 | ||
20 | const iomux_cfg_t iomux_setup[] = { | |
21 | /* EMI */ | |
22 | MX23_PAD_EMI_D00__EMI_D00 | MUX_CONFIG_EMI, | |
23 | MX23_PAD_EMI_D01__EMI_D01 | MUX_CONFIG_EMI, | |
24 | MX23_PAD_EMI_D02__EMI_D02 | MUX_CONFIG_EMI, | |
25 | MX23_PAD_EMI_D03__EMI_D03 | MUX_CONFIG_EMI, | |
26 | MX23_PAD_EMI_D04__EMI_D04 | MUX_CONFIG_EMI, | |
27 | MX23_PAD_EMI_D05__EMI_D05 | MUX_CONFIG_EMI, | |
28 | MX23_PAD_EMI_D06__EMI_D06 | MUX_CONFIG_EMI, | |
29 | MX23_PAD_EMI_D07__EMI_D07 | MUX_CONFIG_EMI, | |
30 | MX23_PAD_EMI_D08__EMI_D08 | MUX_CONFIG_EMI, | |
31 | MX23_PAD_EMI_D09__EMI_D09 | MUX_CONFIG_EMI, | |
32 | MX23_PAD_EMI_D10__EMI_D10 | MUX_CONFIG_EMI, | |
33 | MX23_PAD_EMI_D11__EMI_D11 | MUX_CONFIG_EMI, | |
34 | MX23_PAD_EMI_D12__EMI_D12 | MUX_CONFIG_EMI, | |
35 | MX23_PAD_EMI_D13__EMI_D13 | MUX_CONFIG_EMI, | |
36 | MX23_PAD_EMI_D14__EMI_D14 | MUX_CONFIG_EMI, | |
37 | MX23_PAD_EMI_D15__EMI_D15 | MUX_CONFIG_EMI, | |
38 | MX23_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI, | |
39 | MX23_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI, | |
40 | MX23_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI, | |
41 | MX23_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI, | |
42 | MX23_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI, | |
43 | MX23_PAD_EMI_CLKN__EMI_CLKN | MUX_CONFIG_EMI, | |
44 | ||
45 | MX23_PAD_EMI_A00__EMI_A00 | MUX_CONFIG_EMI, | |
46 | MX23_PAD_EMI_A01__EMI_A01 | MUX_CONFIG_EMI, | |
47 | MX23_PAD_EMI_A02__EMI_A02 | MUX_CONFIG_EMI, | |
48 | MX23_PAD_EMI_A03__EMI_A03 | MUX_CONFIG_EMI, | |
49 | MX23_PAD_EMI_A04__EMI_A04 | MUX_CONFIG_EMI, | |
50 | MX23_PAD_EMI_A05__EMI_A05 | MUX_CONFIG_EMI, | |
51 | MX23_PAD_EMI_A06__EMI_A06 | MUX_CONFIG_EMI, | |
52 | MX23_PAD_EMI_A07__EMI_A07 | MUX_CONFIG_EMI, | |
53 | MX23_PAD_EMI_A08__EMI_A08 | MUX_CONFIG_EMI, | |
54 | MX23_PAD_EMI_A09__EMI_A09 | MUX_CONFIG_EMI, | |
55 | MX23_PAD_EMI_A10__EMI_A10 | MUX_CONFIG_EMI, | |
56 | MX23_PAD_EMI_A11__EMI_A11 | MUX_CONFIG_EMI, | |
57 | MX23_PAD_EMI_A12__EMI_A12 | MUX_CONFIG_EMI, | |
58 | MX23_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI, | |
59 | MX23_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI, | |
60 | ||
61 | MX23_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI, | |
62 | MX23_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI, | |
63 | MX23_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI, | |
64 | MX23_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI, | |
65 | MX23_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI, | |
66 | MX23_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI, | |
67 | ||
68 | MX23_PAD_LCD_D00__LCD_D00 | MUX_CONFIG_LCD, | |
69 | MX23_PAD_LCD_D01__LCD_D01 | MUX_CONFIG_LCD, | |
70 | MX23_PAD_LCD_D02__LCD_D02 | MUX_CONFIG_LCD, | |
71 | MX23_PAD_LCD_D03__LCD_D03 | MUX_CONFIG_LCD, | |
72 | MX23_PAD_LCD_D04__LCD_D04 | MUX_CONFIG_LCD, | |
73 | MX23_PAD_LCD_D05__LCD_D05 | MUX_CONFIG_LCD, | |
74 | MX23_PAD_LCD_D06__LCD_D06 | MUX_CONFIG_LCD, | |
75 | MX23_PAD_LCD_D07__LCD_D07 | MUX_CONFIG_LCD, | |
76 | MX23_PAD_LCD_D08__LCD_D08 | MUX_CONFIG_LCD, | |
77 | MX23_PAD_LCD_D09__LCD_D09 | MUX_CONFIG_LCD, | |
78 | MX23_PAD_LCD_D10__LCD_D10 | MUX_CONFIG_LCD, | |
79 | MX23_PAD_LCD_D11__LCD_D11 | MUX_CONFIG_LCD, | |
80 | MX23_PAD_LCD_D12__LCD_D12 | MUX_CONFIG_LCD, | |
81 | MX23_PAD_LCD_D13__LCD_D13 | MUX_CONFIG_LCD, | |
82 | MX23_PAD_LCD_D14__LCD_D14 | MUX_CONFIG_LCD, | |
83 | MX23_PAD_LCD_D15__LCD_D15 | MUX_CONFIG_LCD, | |
84 | MX23_PAD_LCD_D16__LCD_D16 | MUX_CONFIG_LCD, | |
85 | MX23_PAD_LCD_D17__LCD_D17 | MUX_CONFIG_LCD, | |
86 | MX23_PAD_LCD_RESET__LCD_RESET | MUX_CONFIG_LCD, | |
87 | MX23_PAD_LCD_RS__LCD_RS | MUX_CONFIG_LCD, | |
88 | MX23_PAD_LCD_WR__LCD_WR | MUX_CONFIG_LCD, | |
89 | MX23_PAD_LCD_CS__LCD_CS | MUX_CONFIG_LCD, | |
90 | MX23_PAD_LCD_ENABLE__LCD_ENABLE | MUX_CONFIG_LCD, | |
91 | MX23_PAD_LCD_VSYNC__LCD_VSYNC | MUX_CONFIG_LCD, | |
92 | ||
93 | MX23_PAD_SSP1_CMD__SSP1_CMD | MUX_CONFIG_SSP, | |
94 | MX23_PAD_SSP1_DETECT__GPIO_2_1 | MUX_CONFIG_SSP, | |
95 | MX23_PAD_SSP1_DATA0__SSP1_DATA0 | MUX_CONFIG_SSP, | |
96 | MX23_PAD_SSP1_DATA1__SSP1_DATA1 | MUX_CONFIG_SSP, | |
97 | MX23_PAD_SSP1_DATA2__SSP1_DATA2 | MUX_CONFIG_SSP, | |
98 | MX23_PAD_SSP1_DATA3__SSP1_DATA3 | MUX_CONFIG_SSP, | |
99 | MX23_PAD_SSP1_SCK__SSP1_SCK | MUX_CONFIG_SSP, | |
100 | MX23_PAD_GPMI_D07__GPIO_0_7 | MUX_CONFIG_SSP, | |
101 | ||
102 | MX23_PAD_GPMI_D00__SSP2_DATA0 | MUX_CONFIG_SSP, | |
103 | MX23_PAD_GPMI_D01__SSP2_DATA1 | MUX_CONFIG_SSP, | |
104 | MX23_PAD_GPMI_D02__SSP2_DATA2 | MUX_CONFIG_SSP, | |
105 | MX23_PAD_GPMI_D03__SSP2_DATA3 | MUX_CONFIG_SSP, | |
106 | MX23_PAD_GPMI_RDY1__SSP2_CMD | MUX_CONFIG_SSP, | |
107 | MX23_PAD_GPMI_WRN__SSP2_SCK | MUX_CONFIG_SSP, | |
108 | ||
109 | /* PWM -- FIXME */ | |
110 | MX23_PAD_PWM2__GPIO_1_28 | MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP, | |
111 | }; | |
112 | ||
113 | void mxs_adjust_memory_params(uint32_t *dram_vals) | |
114 | { | |
115 | /* mDDR configuration values */ | |
116 | const uint32_t regs[] = { | |
117 | 0x01010001, 0x00010000, 0x01000000, 0x00000001, | |
118 | 0x00010101, 0x00000001, 0x00010000, 0x01000001, | |
119 | 0x01010000, 0x00000001, 0x07000200, 0x04070203, | |
120 | 0x02020002, 0x06070a02, 0x0d000201, 0x0305000d, | |
121 | 0x02080800, 0x19330f0a, 0x1f1f1c00, 0x020a1313, | |
122 | 0x03061323, 0x0000000a, 0x00080008, 0x00200020, | |
123 | 0x00200020, 0x00200020, 0x000003f7, 0x00000000, | |
124 | 0x00000000, 0x00000000, 0x00000020, 0x00000000, | |
125 | 0x001023cd, 0x20410010, 0x00006665, 0x00000000, | |
126 | 0x00000101, 0x00000001, 0x00000000, 0x00000000, | |
127 | }; | |
128 | memcpy(dram_vals, regs, sizeof(regs)); | |
129 | } | |
130 | ||
131 | void board_init_ll(const uint32_t arg, const uint32_t *resptr) | |
132 | { | |
133 | mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup)); | |
134 | } |