[people/ms/u-boot.git] / board / dave / B2 / B2.c

/*
 * (C) Copyright 2004
 * DAVE Srl
 * http://www.dave-tech.it
 * http://www.wawnet.biz
 * mailto:info@wawnet.biz
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <netdev.h>
#include <asm/hardware.h>

DECLARE_GLOBAL_DATA_PTR;

/*
 * Miscelaneous platform dependent initialization
 */

int board_init (void)
{
	u32 temp;

	/* Configuration Port Control Register*/
	/* Port A */
	PCONA = 0x3ff;

	/* Port B */
	PCONB = 0xff;
	PDATB = 0xFFFF;

	/* Port C */
	/*
	PCONC = 0xff55ff15;
	PDATC = 0x0;
	PUPC = 0xffff;
	*/

	/* Port D */
	/*
	PCOND = 0xaaaa;
	PUPD = 0xff;
	*/

	/* Port E */
	PCONE = 0x0001aaa9;
	PDATE = 0x0;
	PUPE = 0xff;

	/* Port F */
	PCONF = 0x124955;
	PDATF  = 0xff; /* B2-eth_reset tied high level */
	/*
	PUPF = 0x1e3;
	*/

	/* Port G */
	PUPG = 0x1;
	PCONG = 0x3; /*PG0= EINT0= ETH_INT prepared for linux kernel*/

	INTMSK = 0x03fffeff;
	INTCON = 0x05;

    /*
	Configure chip ethernet interrupt as High level
	Port G EINT 0-7 EINT0 -> CHIP ETHERNET
    */
	temp = EXTINT;
	temp &= ~0x7;
    temp |= 0x1; /*LEVEL_HIGH*/
	EXTINT = temp;

    /*
	Reset SMSC LAN91C96 chip
    */
    temp= PCONF;
    temp |= 0x00000040;
    PCONF = temp;

	/* Reset high */
    temp = PDATF;
    temp |= (1 << 3);
    PDATF = temp;

    /* Short delay */
    for (temp=0;temp<10;temp++)
    {
		/* NOP */
    }

    /* Reset low */
    temp = PDATF;
    temp &= ~(1 << 3);
    PDATF = temp;

	/* arch number MACH_TYPE_MBA44B0 */
	gd->bd->bi_arch_number = MACH_TYPE_S3C44B0;

	/* location of boot parameters */
	gd->bd->bi_boot_params = 0x0c000100;

	return 0;
}

int dram_init (void)
{
	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

	return (0);
}

#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{
	int rc = 0;
#ifdef CONFIG_LAN91C96
	rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
#endif
	return rc;
}
#endif
Commit	Line	Data
5cfbab3d WD	1	/*
	2	* (C) Copyright 2004
	3	* DAVE Srl
	4	* http://www.dave-tech.it
	5	* http://www.wawnet.biz
	6	* mailto:info@wawnet.biz
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#include <common.h>
1ab70f6f	28	#include <netdev.h>
5cfbab3d WD	29	#include <asm/hardware.h>
5cfbab3d WD	30
d87080b7 WD	31	DECLARE_GLOBAL_DATA_PTR;
d87080b7 WD	32
5cfbab3d WD	33	/*
	34	* Miscelaneous platform dependent initialization
	35	*/
	36
	37	int board_init (void)
	38	{
5cfbab3d WD	39	u32 temp;
	40
	41	/* Configuration Port Control Register*/
	42	/* Port A */
	43	PCONA = 0x3ff;
	44
	45	/* Port B */
	46	PCONB = 0xff;
	47	PDATB = 0xFFFF;
	48
	49	/* Port C */
	50	/*
	51	PCONC = 0xff55ff15;
	52	PDATC = 0x0;
	53	PUPC = 0xffff;
	54	*/
	55
	56	/* Port D */
	57	/*
	58	PCOND = 0xaaaa;
	59	PUPD = 0xff;
	60	*/
	61
	62	/* Port E */
	63	PCONE = 0x0001aaa9;
	64	PDATE = 0x0;
	65	PUPE = 0xff;
	66
	67	/* Port F */
	68	PCONF = 0x124955;
	69	PDATF = 0xff; /* B2-eth_reset tied high level */
	70	/*
	71	PUPF = 0x1e3;
	72	*/
	73
	74	/* Port G */
	75	PUPG = 0x1;
	76	PCONG = 0x3; /PG0= EINT0= ETH_INT prepared for linux kernel/
	77
	78	INTMSK = 0x03fffeff;
	79	INTCON = 0x05;
	80
	81	/*
53677ef1 WD	82	Configure chip ethernet interrupt as High level
53677ef1 WD	83	Port G EINT 0-7 EINT0 -> CHIP ETHERNET
5cfbab3d WD	84	*/
5cfbab3d WD	85	temp = EXTINT;
53677ef1	86	temp &= ~0x7;
5cfbab3d WD	87	temp \|= 0x1; /LEVEL_HIGH/
	88	EXTINT = temp;
	89
	90	/*
53677ef1	91	Reset SMSC LAN91C96 chip
5cfbab3d WD	92	*/
	93	temp= PCONF;
	94	temp \|= 0x00000040;
	95	PCONF = temp;
	96
	97	/* Reset high */
	98	temp = PDATF;
	99	temp \|= (1 << 3);
	100	PDATF = temp;
	101
	102	/* Short delay */
	103	for (temp=0;temp<10;temp++)
	104	{
	105	/* NOP */
	106	}
	107
	108	/* Reset low */
	109	temp = PDATF;
	110	temp &= ~(1 << 3);
	111	PDATF = temp;
	112
	113	/* arch number MACH_TYPE_MBA44B0 */
731215eb	114	gd->bd->bi_arch_number = MACH_TYPE_S3C44B0;
5cfbab3d WD	115
	116	/* location of boot parameters */
	117	gd->bd->bi_boot_params = 0x0c000100;
	118
	119	return 0;
	120	}
	121
	122	int dram_init (void)
	123	{
5cfbab3d WD	124	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
	125	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
	126
	127	return (0);
	128	}
1ab70f6f BW	129
	130	#ifdef CONFIG_CMD_NET
	131	int board_eth_init(bd_t *bis)
	132	{
	133	int rc = 0;
	134	#ifdef CONFIG_LAN91C96
	135	rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
	136	#endif
	137	return rc;
	138	}
	139	#endif