[people/ms/u-boot.git] / board / davinci / da8xxevm / da850evm.c

/*
 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Based on da830evm.c. Original Copyrights follow:
 *
 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <common.h>
#include <i2c.h>
#include <net.h>
#include <netdev.h>
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/arch/emac_defs.h>
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
#include <asm/arch/da8xx_common.h>

DECLARE_GLOBAL_DATA_PTR;

#define pinmux(x)	(&davinci_syscfg_regs->pinmux[x])

/* SPI0 pin muxer settings */
static const struct pinmux_config spi1_pins[] = {
	{ pinmux(5), 1, 1 },
	{ pinmux(5), 1, 2 },
	{ pinmux(5), 1, 4 },
	{ pinmux(5), 1, 5 }
};

/* UART pin muxer settings */
static const struct pinmux_config uart_pins[] = {
	{ pinmux(0), 4, 6 },
	{ pinmux(0), 4, 7 },
	{ pinmux(4), 2, 4 },
	{ pinmux(4), 2, 5 }
};

#ifdef CONFIG_DRIVER_TI_EMAC
static const struct pinmux_config emac_pins[] = {
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
	{ pinmux(14), 8, 2 },
	{ pinmux(14), 8, 3 },
	{ pinmux(14), 8, 4 },
	{ pinmux(14), 8, 5 },
	{ pinmux(14), 8, 6 },
	{ pinmux(14), 8, 7 },
	{ pinmux(15), 8, 1 },
#else /* ! CONFIG_DRIVER_TI_EMAC_USE_RMII */
	{ pinmux(2), 8, 1 },
	{ pinmux(2), 8, 2 },
	{ pinmux(2), 8, 3 },
	{ pinmux(2), 8, 4 },
	{ pinmux(2), 8, 5 },
	{ pinmux(2), 8, 6 },
	{ pinmux(2), 8, 7 },
	{ pinmux(3), 8, 0 },
	{ pinmux(3), 8, 1 },
	{ pinmux(3), 8, 2 },
	{ pinmux(3), 8, 3 },
	{ pinmux(3), 8, 4 },
	{ pinmux(3), 8, 5 },
	{ pinmux(3), 8, 6 },
	{ pinmux(3), 8, 7 },
#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
	{ pinmux(4), 8, 0 },
	{ pinmux(4), 8, 1 }
};

/* I2C pin muxer settings */
static const struct pinmux_config i2c_pins[] = {
	{ pinmux(4), 2, 2 },
	{ pinmux(4), 2, 3 }
};

#ifdef CONFIG_NAND_DAVINCI
const struct pinmux_config nand_pins[] = {
	{ pinmux(7), 1, 1 },
	{ pinmux(7), 1, 2 },
	{ pinmux(7), 1, 4 },
	{ pinmux(7), 1, 5 },
	{ pinmux(9), 1, 0 },
	{ pinmux(9), 1, 1 },
	{ pinmux(9), 1, 2 },
	{ pinmux(9), 1, 3 },
	{ pinmux(9), 1, 4 },
	{ pinmux(9), 1, 5 },
	{ pinmux(9), 1, 6 },
	{ pinmux(9), 1, 7 },
	{ pinmux(12), 1, 5 },
	{ pinmux(12), 1, 6 }
};
#endif

#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
#define HAS_RMII 1
#else
#define HAS_RMII 0
#endif
#endif /* CONFIG_DRIVER_TI_EMAC */

static const struct pinmux_resource pinmuxes[] = {
#ifdef CONFIG_SPI_FLASH
	PINMUX_ITEM(spi1_pins),
#endif
	PINMUX_ITEM(uart_pins),
	PINMUX_ITEM(i2c_pins),
#ifdef CONFIG_NAND_DAVINCI
	PINMUX_ITEM(nand_pins),
#endif
};

static const struct lpsc_resource lpsc[] = {
	{ DAVINCI_LPSC_AEMIF },	/* NAND, NOR */
	{ DAVINCI_LPSC_SPI1 },	/* Serial Flash */
	{ DAVINCI_LPSC_EMAC },	/* image download */
	{ DAVINCI_LPSC_UART2 },	/* console */
	{ DAVINCI_LPSC_GPIO },
};

#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
#define CONFIG_DA850_EVM_MAX_CPU_CLK	300000000
#endif

/*
 * get_board_rev() - setup to pass kernel board revision information
 * Returns:
 * bit[0-3]	Maximum cpu clock rate supported by onboard SoC
 *		0000b - 300 MHz
 *		0001b - 372 MHz
 *		0010b - 408 MHz
 *		0011b - 456 MHz
 */
u32 get_board_rev(void)
{
	char *s;
	u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
	u32 rev = 0;

	s = getenv("maxcpuclk");
	if (s)
		maxcpuclk = simple_strtoul(s, NULL, 10);

	if (maxcpuclk >= 456000000)
		rev = 3;
	else if (maxcpuclk >= 408000000)
		rev = 2;
	else if (maxcpuclk >= 372000000)
		rev = 1;

	return rev;
}

int board_init(void)
{
#ifndef CONFIG_USE_IRQ
	irq_init();
#endif


#ifdef CONFIG_NAND_DAVINCI
	/*
	 * NAND CS setup - cycle counts based on da850evm NAND timings in the
	 * Linux kernel @ 25MHz EMIFA
	 */
	writel((DAVINCI_ABCR_WSETUP(0) |
		DAVINCI_ABCR_WSTROBE(0) |
		DAVINCI_ABCR_WHOLD(0) |
		DAVINCI_ABCR_RSETUP(0) |
		DAVINCI_ABCR_RSTROBE(1) |
		DAVINCI_ABCR_RHOLD(0) |
		DAVINCI_ABCR_TA(0) |
		DAVINCI_ABCR_ASIZE_8BIT),
	       &davinci_emif_regs->ab2cr); /* CS3 */
#endif

	/* arch number of the board */
	gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;

	/* address of boot parameters */
	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;

	/*
	 * Power on required peripherals
	 * ARM does not have access by default to PSC0 and PSC1
	 * assuming here that the DSP bootloader has set the IOPU
	 * such that PSC access is available to ARM
	 */
	if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
		return 1;

	/* setup the SUSPSRC for ARM to control emulation suspend */
	writel(readl(&davinci_syscfg_regs->suspsrc) &
	       ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
		 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
		 DAVINCI_SYSCFG_SUSPSRC_UART2),
	       &davinci_syscfg_regs->suspsrc);

	/* configure pinmux settings */
	if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
		return 1;

#ifdef CONFIG_DRIVER_TI_EMAC
	if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
		return 1;

	da850_emac_mii_mode_sel(HAS_RMII);
#endif /* CONFIG_DRIVER_TI_EMAC */

	/* enable the console UART */
	writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
		DAVINCI_UART_PWREMU_MGMT_UTRST),
	       &davinci_uart2_ctrl_regs->pwremu_mgmt);

	return 0;
}

#ifdef CONFIG_DRIVER_TI_EMAC

#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
/**
 * rmii_hw_init
 *
 * DA850/OMAP-L138 EVM can interface to a daughter card for
 * additional features. This card has an I2C GPIO Expander TCA6416
 * to select the required functions like camera, RMII Ethernet,
 * character LCD, video.
 *
 * Initialization of the expander involves configuring the
 * polarity and direction of the ports. P07-P05 are used here.
 * These ports are connected to a Mux chip which enables only one
 * functionality at a time.
 *
 * For RMII phy to respond, the MII MDIO clock has to be  disabled
 * since both the PHY devices have address as zero. The MII MDIO
 * clock is controlled via GPIO2[6].
 *
 * This code is valid for Beta version of the hardware
 */
int rmii_hw_init(void)
{
	const struct pinmux_config gpio_pins[] = {
		{ pinmux(6), 8, 1 }
	};
	u_int8_t buf[2];
	unsigned int temp;
	int ret;

	/* PinMux for GPIO */
	if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
		return 1;

	/* I2C Exapnder configuration */
	/* Set polarity to non-inverted */
	buf[0] = 0x0;
	buf[1] = 0x0;
	ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
	if (ret) {
		printf("\nExpander @ 0x%02x write FAILED!!!\n",
				CONFIG_SYS_I2C_EXPANDER_ADDR);
		return ret;
	}

	/* Configure P07-P05 as outputs */
	buf[0] = 0x1f;
	buf[1] = 0xff;
	ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
	if (ret) {
		printf("\nExpander @ 0x%02x write FAILED!!!\n",
				CONFIG_SYS_I2C_EXPANDER_ADDR);
	}

	/* For Ethernet RMII selection
	 * P07(SelA)=0
	 * P06(SelB)=1
	 * P05(SelC)=1
	 */
	if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
		printf("\nExpander @ 0x%02x read FAILED!!!\n",
				CONFIG_SYS_I2C_EXPANDER_ADDR);
	}

	buf[0] &= 0x1f;
	buf[0] |= (0 << 7) | (1 << 6) | (1 << 5);
	if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
		printf("\nExpander @ 0x%02x write FAILED!!!\n",
				CONFIG_SYS_I2C_EXPANDER_ADDR);
	}

	/* Set the output as high */
	temp = REG(GPIO_BANK2_REG_SET_ADDR);
	temp |= (0x01 << 6);
	REG(GPIO_BANK2_REG_SET_ADDR) = temp;

	/* Set the GPIO direction as output */
	temp = REG(GPIO_BANK2_REG_DIR_ADDR);
	temp &= ~(0x01 << 6);
	REG(GPIO_BANK2_REG_DIR_ADDR) = temp;

	return 0;
}
#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */

/*
 * Initializes on-board ethernet controllers.
 */
int board_eth_init(bd_t *bis)
{
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
	/* Select RMII fucntion through the expander */
	if (rmii_hw_init())
		printf("RMII hardware init failed!!!\n");
#endif
	if (!davinci_emac_initialize()) {
		printf("Error: Ethernet init failed!\n");
		return -1;
	}

	return 0;
}
#endif /* CONFIG_DRIVER_TI_EMAC */
Commit	Line	Data
89b765c7 SR	1	/*
	2	* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
	3	*
	4	* Based on da830evm.c. Original Copyrights follow:
	5	*
	6	* Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
	7	* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	22	*/
	23
	24	#include <common.h>
	25	#include <i2c.h>
3d248d37 BG	26	#include <net.h>
3d248d37 BG	27	#include <netdev.h>
89b765c7	28	#include <asm/arch/hardware.h>
a3f88293	29	#include <asm/arch/emif_defs.h>
3d248d37	30	#include <asm/arch/emac_defs.h>
89b765c7	31	#include <asm/io.h>
d7f9b503 SG	32	#include <asm/arch/davinci_misc.h>
d7f9b503 SG	33	#include <asm/arch/da8xx_common.h>
89b765c7 SR	34
	35	DECLARE_GLOBAL_DATA_PTR;
	36
37adbf9b	37	#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
89b765c7 SR	38
	39	/* SPI0 pin muxer settings */
	40	static const struct pinmux_config spi1_pins[] = {
37adbf9b PP	41	{ pinmux(5), 1, 1 },
	42	{ pinmux(5), 1, 2 },
	43	{ pinmux(5), 1, 4 },
	44	{ pinmux(5), 1, 5 }
89b765c7 SR	45	};
	46
	47	/* UART pin muxer settings */
	48	static const struct pinmux_config uart_pins[] = {
37adbf9b PP	49	{ pinmux(0), 4, 6 },
	50	{ pinmux(0), 4, 7 },
	51	{ pinmux(4), 2, 4 },
	52	{ pinmux(4), 2, 5 }
89b765c7 SR	53	};
89b765c7 SR	54
3d248d37 BG	55	#ifdef CONFIG_DRIVER_TI_EMAC
3d248d37 BG	56	static const struct pinmux_config emac_pins[] = {
d2607401 SR	57	#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
	58	{ pinmux(14), 8, 2 },
	59	{ pinmux(14), 8, 3 },
	60	{ pinmux(14), 8, 4 },
	61	{ pinmux(14), 8, 5 },
	62	{ pinmux(14), 8, 6 },
	63	{ pinmux(14), 8, 7 },
	64	{ pinmux(15), 8, 1 },
	65	#else /* ! CONFIG_DRIVER_TI_EMAC_USE_RMII */
3d248d37 BG	66	{ pinmux(2), 8, 1 },
	67	{ pinmux(2), 8, 2 },
	68	{ pinmux(2), 8, 3 },
	69	{ pinmux(2), 8, 4 },
	70	{ pinmux(2), 8, 5 },
	71	{ pinmux(2), 8, 6 },
	72	{ pinmux(2), 8, 7 },
	73	{ pinmux(3), 8, 0 },
	74	{ pinmux(3), 8, 1 },
	75	{ pinmux(3), 8, 2 },
	76	{ pinmux(3), 8, 3 },
	77	{ pinmux(3), 8, 4 },
	78	{ pinmux(3), 8, 5 },
	79	{ pinmux(3), 8, 6 },
	80	{ pinmux(3), 8, 7 },
d2607401	81	#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
3d248d37 BG	82	{ pinmux(4), 8, 0 },
	83	{ pinmux(4), 8, 1 }
	84	};
3d248d37	85
89b765c7 SR	86	/* I2C pin muxer settings */
89b765c7 SR	87	static const struct pinmux_config i2c_pins[] = {
37adbf9b PP	88	{ pinmux(4), 2, 2 },
37adbf9b PP	89	{ pinmux(4), 2, 3 }
89b765c7 SR	90	};
89b765c7 SR	91
756d1fe7 BG	92	#ifdef CONFIG_NAND_DAVINCI
	93	const struct pinmux_config nand_pins[] = {
	94	{ pinmux(7), 1, 1 },
	95	{ pinmux(7), 1, 2 },
	96	{ pinmux(7), 1, 4 },
	97	{ pinmux(7), 1, 5 },
	98	{ pinmux(9), 1, 0 },
	99	{ pinmux(9), 1, 1 },
	100	{ pinmux(9), 1, 2 },
	101	{ pinmux(9), 1, 3 },
	102	{ pinmux(9), 1, 4 },
	103	{ pinmux(9), 1, 5 },
	104	{ pinmux(9), 1, 6 },
	105	{ pinmux(9), 1, 7 },
	106	{ pinmux(12), 1, 5 },
	107	{ pinmux(12), 1, 6 }
	108	};
	109	#endif
	110
d2607401 SR	111	#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
	112	#define HAS_RMII 1
	113	#else
	114	#define HAS_RMII 0
	115	#endif
	116	#endif /* CONFIG_DRIVER_TI_EMAC */
	117
89b765c7 SR	118	static const struct pinmux_resource pinmuxes[] = {
	119	#ifdef CONFIG_SPI_FLASH
	120	PINMUX_ITEM(spi1_pins),
	121	#endif
	122	PINMUX_ITEM(uart_pins),
	123	PINMUX_ITEM(i2c_pins),
756d1fe7 BG	124	#ifdef CONFIG_NAND_DAVINCI
	125	PINMUX_ITEM(nand_pins),
	126	#endif
89b765c7 SR	127	};
	128
	129	static const struct lpsc_resource lpsc[] = {
	130	{ DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
	131	{ DAVINCI_LPSC_SPI1 }, /* Serial Flash */
	132	{ DAVINCI_LPSC_EMAC }, /* image download */
	133	{ DAVINCI_LPSC_UART2 }, /* console */
	134	{ DAVINCI_LPSC_GPIO },
	135	};
	136
4f6fc15b SN	137	#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
	138	#define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
	139	#endif
	140
	141	/*
	142	* get_board_rev() - setup to pass kernel board revision information
	143	* Returns:
	144	* bit[0-3] Maximum cpu clock rate supported by onboard SoC
	145	* 0000b - 300 MHz
	146	* 0001b - 372 MHz
	147	* 0010b - 408 MHz
	148	* 0011b - 456 MHz
	149	*/
	150	u32 get_board_rev(void)
	151	{
	152	char *s;
	153	u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
	154	u32 rev = 0;
	155
	156	s = getenv("maxcpuclk");
	157	if (s)
	158	maxcpuclk = simple_strtoul(s, NULL, 10);
	159
	160	if (maxcpuclk >= 456000000)
	161	rev = 3;
	162	else if (maxcpuclk >= 408000000)
	163	rev = 2;
	164	else if (maxcpuclk >= 372000000)
	165	rev = 1;
	166
	167	return rev;
	168	}
	169
89b765c7 SR	170	int board_init(void)
	171	{
	172	#ifndef CONFIG_USE_IRQ
	173	irq_init();
	174	#endif
	175
a3f88293 BG	176
	177	#ifdef CONFIG_NAND_DAVINCI
	178	/*
	179	* NAND CS setup - cycle counts based on da850evm NAND timings in the
	180	* Linux kernel @ 25MHz EMIFA
	181	*/
	182	writel((DAVINCI_ABCR_WSETUP(0) \|
	183	DAVINCI_ABCR_WSTROBE(0) \|
	184	DAVINCI_ABCR_WHOLD(0) \|
	185	DAVINCI_ABCR_RSETUP(0) \|
	186	DAVINCI_ABCR_RSTROBE(1) \|
	187	DAVINCI_ABCR_RHOLD(0) \|
	188	DAVINCI_ABCR_TA(0) \|
	189	DAVINCI_ABCR_ASIZE_8BIT),
	190	&davinci_emif_regs->ab2cr); /* CS3 */
	191	#endif
	192
89b765c7 SR	193	/* arch number of the board */
	194	gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
	195
	196	/* address of boot parameters */
	197	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
	198
	199	/*
	200	* Power on required peripherals
	201	* ARM does not have access by default to PSC0 and PSC1
	202	* assuming here that the DSP bootloader has set the IOPU
	203	* such that PSC access is available to ARM
	204	*/
	205	if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
	206	return 1;
	207
	208	/* setup the SUSPSRC for ARM to control emulation suspend */
	209	writel(readl(&davinci_syscfg_regs->suspsrc) &
	210	~(DAVINCI_SYSCFG_SUSPSRC_EMAC \| DAVINCI_SYSCFG_SUSPSRC_I2C \|
	211	DAVINCI_SYSCFG_SUSPSRC_SPI1 \| DAVINCI_SYSCFG_SUSPSRC_TIMER0 \|
	212	DAVINCI_SYSCFG_SUSPSRC_UART2),
	213	&davinci_syscfg_regs->suspsrc);
	214
	215	/* configure pinmux settings */
	216	if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
	217	return 1;
	218
3d248d37 BG	219	#ifdef CONFIG_DRIVER_TI_EMAC
	220	if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
	221	return 1;
d2607401 SR	222
d2607401 SR	223	da850_emac_mii_mode_sel(HAS_RMII);
3d248d37 BG	224	#endif /* CONFIG_DRIVER_TI_EMAC */
3d248d37 BG	225
89b765c7 SR	226	/* enable the console UART */
	227	writel((DAVINCI_UART_PWREMU_MGMT_FREE \| DAVINCI_UART_PWREMU_MGMT_URRST \|
	228	DAVINCI_UART_PWREMU_MGMT_UTRST),
	229	&davinci_uart2_ctrl_regs->pwremu_mgmt);
	230
	231	return 0;
	232	}
3d248d37 BG	233
	234	#ifdef CONFIG_DRIVER_TI_EMAC
	235
d2607401 SR	236	#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
	237	/**
	238	* rmii_hw_init
	239	*
	240	* DA850/OMAP-L138 EVM can interface to a daughter card for
	241	* additional features. This card has an I2C GPIO Expander TCA6416
	242	* to select the required functions like camera, RMII Ethernet,
	243	* character LCD, video.
	244	*
	245	* Initialization of the expander involves configuring the
	246	* polarity and direction of the ports. P07-P05 are used here.
	247	* These ports are connected to a Mux chip which enables only one
	248	* functionality at a time.
	249	*
	250	* For RMII phy to respond, the MII MDIO clock has to be disabled
	251	* since both the PHY devices have address as zero. The MII MDIO
	252	* clock is controlled via GPIO2[6].
	253	*
	254	* This code is valid for Beta version of the hardware
	255	*/
	256	int rmii_hw_init(void)
	257	{
	258	const struct pinmux_config gpio_pins[] = {
	259	{ pinmux(6), 8, 1 }
	260	};
	261	u_int8_t buf[2];
	262	unsigned int temp;
	263	int ret;
	264
	265	/* PinMux for GPIO */
	266	if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
	267	return 1;
	268
	269	/* I2C Exapnder configuration */
	270	/* Set polarity to non-inverted */
	271	buf[0] = 0x0;
	272	buf[1] = 0x0;
	273	ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
	274	if (ret) {
	275	printf("\nExpander @ 0x%02x write FAILED!!!\n",
	276	CONFIG_SYS_I2C_EXPANDER_ADDR);
	277	return ret;
	278	}
	279
	280	/* Configure P07-P05 as outputs */
	281	buf[0] = 0x1f;
	282	buf[1] = 0xff;
	283	ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
	284	if (ret) {
	285	printf("\nExpander @ 0x%02x write FAILED!!!\n",
	286	CONFIG_SYS_I2C_EXPANDER_ADDR);
	287	}
	288
	289	/* For Ethernet RMII selection
	290	* P07(SelA)=0
	291	* P06(SelB)=1
	292	* P05(SelC)=1
	293	*/
	294	if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
	295	printf("\nExpander @ 0x%02x read FAILED!!!\n",
	296	CONFIG_SYS_I2C_EXPANDER_ADDR);
	297	}
	298
	299	buf[0] &= 0x1f;
300	buf[0] \|= (0 << 7) \| (1 << 6) \| (1 << 5);
301	if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
302	printf("\nExpander @ 0x%02x write FAILED!!!\n",
303	CONFIG_SYS_I2C_EXPANDER_ADDR);
304	}
305
306	/* Set the output as high */
307	temp = REG(GPIO_BANK2_REG_SET_ADDR);
308	temp \|= (0x01 << 6);
309	REG(GPIO_BANK2_REG_SET_ADDR) = temp;
310
311	/* Set the GPIO direction as output */
312	temp = REG(GPIO_BANK2_REG_DIR_ADDR);
313	temp &= ~(0x01 << 6);
314	REG(GPIO_BANK2_REG_DIR_ADDR) = temp;
315
316	return 0;
317	}
318	#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
319
3d248d37 BG	320	/*
	321	* Initializes on-board ethernet controllers.
	322	*/
	323	int board_eth_init(bd_t *bis)
	324	{
d2607401 SR	325	#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
	326	/* Select RMII fucntion through the expander */
	327	if (rmii_hw_init())
	328	printf("RMII hardware init failed!!!\n");
	329	#endif
3d248d37 BG	330	if (!davinci_emac_initialize()) {
	331	printf("Error: Ethernet init failed!\n");
	332	return -1;
	333	}
	334
	335	return 0;
	336	}
	337	#endif /* CONFIG_DRIVER_TI_EMAC */