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ARM DaVinci: Remove duplicate definitions of MACH_TYPE and prototype of i2c_init()
[people/ms/u-boot.git] / board / davinci / sonata / dv_board.c
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1/*
2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
3 *
4 * Parts are shamelessly stolen from various TI sources, original copyright
5 * follows:
6 * -----------------------------------------------------------------
7 *
8 * Copyright (C) 2004 Texas Instruments.
9 *
10 * ----------------------------------------------------------------------------
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * ----------------------------------------------------------------------------
25 */
26
27#include <common.h>
28#include <i2c.h>
29#include <asm/arch/hardware.h>
30#include <asm/arch/emac_defs.h>
31
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32DECLARE_GLOBAL_DATA_PTR;
33
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34extern void timer_init(void);
35extern int eth_hw_init(void);
36extern phy_t phy;
37
38
39/* Works on Always On power domain only (no PD argument) */
40void lpsc_on(unsigned int id)
41{
42 dv_reg_p mdstat, mdctl;
43
44 if (id >= DAVINCI_LPSC_GEM)
45 return; /* Don't work on DSP Power Domain */
46
47 mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
48 mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
49
50 while (REG(PSC_PTSTAT) & 0x01) {;}
51
52 if ((*mdstat & 0x1f) == 0x03)
53 return; /* Already on and enabled */
54
55 *mdctl |= 0x03;
56
57 /* Special treatment for some modules as for sprue14 p.7.4.2 */
58 if ( (id == DAVINCI_LPSC_VPSSSLV) ||
59 (id == DAVINCI_LPSC_EMAC) ||
60 (id == DAVINCI_LPSC_EMAC_WRAPPER) ||
61 (id == DAVINCI_LPSC_MDIO) ||
62 (id == DAVINCI_LPSC_USB) ||
63 (id == DAVINCI_LPSC_ATA) ||
64 (id == DAVINCI_LPSC_VLYNQ) ||
65 (id == DAVINCI_LPSC_UHPI) ||
66 (id == DAVINCI_LPSC_DDR_EMIF) ||
67 (id == DAVINCI_LPSC_AEMIF) ||
68 (id == DAVINCI_LPSC_MMC_SD) ||
69 (id == DAVINCI_LPSC_MEMSTICK) ||
70 (id == DAVINCI_LPSC_McBSP) ||
71 (id == DAVINCI_LPSC_GPIO)
72 )
53677ef1 73 *mdctl |= 0x200;
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74
75 REG(PSC_PTCMD) = 0x01;
76
77 while (REG(PSC_PTSTAT) & 0x03) {;}
78 while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */
79}
80
81void dsp_on(void)
82{
83 int i;
84
85 if (REG(PSC_PDSTAT1) & 0x1f)
86 return; /* Already on */
87
88 REG(PSC_GBLCTL) |= 0x01;
89 REG(PSC_PDCTL1) |= 0x01;
90 REG(PSC_PDCTL1) &= ~0x100;
91 REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
92 REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
93 REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
94 REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
95 REG(PSC_PTCMD) = 0x02;
96
97 for (i = 0; i < 100; i++) {
98 if (REG(PSC_EPCPR) & 0x02)
99 break;
100 }
101
102 REG(PSC_CHP_SHRTSW) = 0x01;
103 REG(PSC_PDCTL1) |= 0x100;
104 REG(PSC_EPCCR) = 0x02;
105
106 for (i = 0; i < 100; i++) {
107 if (!(REG(PSC_PTSTAT) & 0x02))
108 break;
109 }
110
111 REG(PSC_GBLCTL) &= ~0x1f;
112}
113
114
115int board_init(void)
116{
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117 /* arch number of the board */
118 gd->bd->bi_arch_number = MACH_TYPE_SONATA;
119
120 /* address of boot parameters */
121 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
122
123 /* Workaround for TMS320DM6446 errata 1.3.22 */
124 REG(PSC_SILVER_BULLET) = 0;
125
126 /* Power on required peripherals */
127 lpsc_on(DAVINCI_LPSC_EMAC);
128 lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
129 lpsc_on(DAVINCI_LPSC_MDIO);
130 lpsc_on(DAVINCI_LPSC_I2C);
131 lpsc_on(DAVINCI_LPSC_UART0);
132 lpsc_on(DAVINCI_LPSC_TIMER1);
133 lpsc_on(DAVINCI_LPSC_GPIO);
134
135 /* Powerup the DSP */
136 dsp_on();
137
138 /* Bringup UART0 out of reset */
139 REG(UART0_PWREMU_MGMT) = 0x0000e003;
140
141 /* Enable GIO3.3V cells used for EMAC */
142 REG(VDD3P3V_PWDN) = 0;
143
144 /* Enable UART0 MUX lines */
145 REG(PINMUX1) |= 1;
146
147 /* Enable EMAC and AEMIF pins */
148 REG(PINMUX0) = 0x80000c1f;
149
150 /* Enable I2C pin Mux */
151 REG(PINMUX1) |= (1 << 7);
152
153 /* Set the Bus Priority Register to appropriate value */
154 REG(VBPR) = 0x20;
155
156 timer_init();
157
158 return(0);
159}
160
161int misc_init_r (void)
162{
163 u_int8_t tmp[20], buf[10];
164 int i = 0;
165 int clk = 0;
166
167
168 clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
169
170 printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2);
171 printf ("DDR Clock : %dMHz\n", (clk / 2));
172
173 /* Set Ethernet MAC address from EEPROM */
174 if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) {
175 printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR);
176 } else {
177 tmp[0] = 0xff;
178 for (i = 0; i < 6; i++)
179 tmp[0] &= buf[i];
180
181 if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) {
b361acd6 182 sprintf((char *)&tmp[0], "%02x:%02x:%02x:%02x:%02x:%02x",
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183 buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
184 setenv("ethaddr", (char *)&tmp[0]);
185 }
186 }
187
188 if (!eth_hw_init()) {
189 printf("ethernet init failed!\n");
190 } else {
191 printf("ETH PHY : %s\n", phy.name);
192 }
193
194 return(0);
195}
196
197int dram_init(void)
198{
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199 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
200 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
201
202 return(0);
203}