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cf3c142e MK |
1 | /* |
2 | * Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net> | |
3 | * | |
4 | * (C) Copyright 2002 2003 | |
5 | * Network Audio Technologies, Inc. <www.netaudiotech.com> | |
6 | * Adam Bezanson <bezanson@netaudiotech.com> | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #include <common.h> | |
28 | #include <netdev.h> | |
29 | #include <asm/arch/ep93xx.h> | |
30 | #include <asm/io.h> | |
31 | ||
32 | DECLARE_GLOBAL_DATA_PTR; | |
33 | ||
34 | #define MAX_BANK_SIZE 0x04000000 /* 64 MB */ | |
35 | ||
36 | static ulong const bank_addr[CONFIG_NR_DRAM_BANKS] = { | |
37 | PHYS_SDRAM_1, | |
38 | #ifdef PHYS_SDRAM_2 | |
39 | PHYS_SDRAM_2, | |
40 | #endif | |
41 | #ifdef PHYS_SDRAM_3 | |
42 | PHYS_SDRAM_3, | |
43 | #endif | |
44 | #ifdef PHYS_SDRAM_4 | |
45 | PHYS_SDRAM_4 | |
46 | #endif | |
47 | }; | |
48 | ||
49 | int board_init(void) | |
50 | { | |
51 | struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE; | |
52 | ||
53 | icache_enable(); | |
54 | ||
55 | #ifdef USE_920T_MMU | |
56 | dcache_enable(); | |
57 | #endif | |
58 | ||
59 | /* | |
60 | * set UARTBAUD bit to drive UARTs with 14.7456MHz instead of | |
61 | * 14.7456/2 MHz | |
62 | */ | |
63 | uint32_t value = readl(&syscon->pwrcnt); | |
64 | value |= SYSCON_PWRCNT_UART_BAUD; | |
65 | writel(value, &syscon->pwrcnt); | |
66 | ||
39a91422 AR |
67 | /* Enable the uart in devicecfg */ |
68 | value = readl(&syscon->devicecfg); | |
69 | value |= 1<<18 /* U1EN */; | |
70 | writel(0xAA, &syscon->sysswlock); | |
71 | writel(value, &syscon->devicecfg); | |
72 | ||
cf3c142e MK |
73 | /* Machine number, as defined in linux/arch/arm/tools/mach-types */ |
74 | gd->bd->bi_arch_number = CONFIG_MACH_TYPE; | |
75 | ||
76 | /* adress of boot parameters */ | |
77 | gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; | |
78 | ||
79 | /* We have a console */ | |
80 | gd->have_console = 1; | |
81 | ||
82 | return 0; | |
83 | } | |
84 | ||
85 | int board_eth_init(bd_t *bd) | |
86 | { | |
87 | return ep93xx_eth_initialize(0, MAC_BASE); | |
88 | } | |
89 | ||
90 | int dram_init(void) | |
91 | { | |
92 | unsigned int *src, *dst; | |
93 | int i; | |
94 | ||
95 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { | |
96 | const ulong bank_size = get_ram_size((long *)bank_addr[i], | |
97 | MAX_BANK_SIZE); | |
98 | if (bank_size) { | |
99 | gd->bd->bi_dram[i].start = bank_addr[i]; | |
100 | gd->bd->bi_dram[i].size = bank_size; | |
101 | } | |
102 | } | |
103 | ||
104 | /* copy exception vectors */ | |
105 | src = (unsigned int *)_armboot_start; | |
106 | dst = (unsigned int *)PHYS_SDRAM_1; | |
107 | memcpy(dst, src, 16 * sizeof(unsigned int)); | |
108 | ||
109 | return 0; | |
110 | } |