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071d897c SR |
1 | /* |
2 | * (C) Copyright 2001-2003 | |
3 | * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | #include <asm/processor.h> | |
26 | #include <command.h> | |
071d897c SR |
27 | #include <malloc.h> |
28 | ||
29 | /* ------------------------------------------------------------------------- */ | |
30 | ||
31 | ||
32 | /* Prototypes */ | |
33 | int gunzip(void *, int, unsigned char *, int *); | |
34 | ||
35 | ||
36 | int board_pre_init (void) | |
37 | { | |
38 | /* | |
39 | * IRQ 0-15 405GP internally generated; active high; level sensitive | |
40 | * IRQ 16 405GP internally generated; active low; level sensitive | |
41 | * IRQ 17-24 RESERVED | |
42 | * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive | |
43 | * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive | |
44 | * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive | |
45 | * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive | |
46 | * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive | |
47 | * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive | |
48 | * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive | |
49 | */ | |
50 | mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ | |
51 | mtdcr(uicer, 0x00000000); /* disable all ints */ | |
52 | mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/ | |
53 | mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */ | |
54 | mtdcr(uictr, 0x10000000); /* set int trigger levels */ | |
55 | mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/ | |
56 | mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ | |
57 | ||
58 | /* | |
59 | * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us | |
60 | */ | |
61 | mtebc (epcr, 0xa8400000); | |
62 | ||
63 | return 0; | |
64 | } | |
65 | ||
66 | ||
67 | /* ------------------------------------------------------------------------- */ | |
68 | ||
69 | int misc_init_f (void) | |
70 | { | |
71 | return 0; /* dummy implementation */ | |
72 | } | |
73 | ||
74 | ||
75 | int misc_init_r (void) | |
76 | { | |
77 | #if 0 /* test-only */ | |
78 | DECLARE_GLOBAL_DATA_PTR; | |
79 | volatile unsigned short *fpga_mode = | |
80 | (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL); | |
81 | volatile unsigned char *duart0_mcr = | |
82 | (unsigned char *)((ulong)DUART0_BA + 4); | |
83 | volatile unsigned char *duart1_mcr = | |
84 | (unsigned char *)((ulong)DUART1_BA + 4); | |
85 | bd_t *bd = gd->bd; | |
86 | char * tmp; /* Temporary char pointer */ | |
87 | unsigned char *dst; | |
88 | ulong len = sizeof(fpgadata); | |
89 | int status; | |
90 | int index; | |
91 | int i; | |
92 | unsigned long cntrl0Reg; | |
93 | ||
94 | /* | |
95 | * Setup GPIO pins (CS6+CS7 as GPIO) | |
96 | */ | |
97 | cntrl0Reg = mfdcr(cntrl0); | |
98 | mtdcr(cntrl0, cntrl0Reg | 0x00300000); | |
99 | ||
100 | dst = malloc(CFG_FPGA_MAX_SIZE); | |
101 | if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) { | |
102 | printf ("GUNZIP ERROR - must RESET board to recover\n"); | |
103 | do_reset (NULL, 0, 0, NULL); | |
104 | } | |
105 | ||
106 | status = fpga_boot(dst, len); | |
107 | if (status != 0) { | |
108 | printf("\nFPGA: Booting failed "); | |
109 | switch (status) { | |
110 | case ERROR_FPGA_PRG_INIT_LOW: | |
111 | printf("(Timeout: INIT not low after asserting PROGRAM*)\n "); | |
112 | break; | |
113 | case ERROR_FPGA_PRG_INIT_HIGH: | |
114 | printf("(Timeout: INIT not high after deasserting PROGRAM*)\n "); | |
115 | break; | |
116 | case ERROR_FPGA_PRG_DONE: | |
117 | printf("(Timeout: DONE not high after programming FPGA)\n "); | |
118 | break; | |
119 | } | |
120 | ||
121 | /* display infos on fpgaimage */ | |
122 | index = 15; | |
123 | for (i=0; i<4; i++) { | |
124 | len = dst[index]; | |
125 | printf("FPGA: %s\n", &(dst[index+1])); | |
126 | index += len+3; | |
127 | } | |
128 | putc ('\n'); | |
129 | /* delayed reboot */ | |
130 | for (i=20; i>0; i--) { | |
131 | printf("Rebooting in %2d seconds \r",i); | |
132 | for (index=0;index<1000;index++) | |
133 | udelay(1000); | |
134 | } | |
135 | putc ('\n'); | |
136 | do_reset(NULL, 0, 0, NULL); | |
137 | } | |
138 | ||
139 | /* restore gpio/cs settings */ | |
140 | mtdcr(cntrl0, cntrl0Reg); | |
141 | ||
142 | puts("FPGA: "); | |
143 | ||
144 | /* display infos on fpgaimage */ | |
145 | index = 15; | |
146 | for (i=0; i<4; i++) { | |
147 | len = dst[index]; | |
148 | printf("%s ", &(dst[index+1])); | |
149 | index += len+3; | |
150 | } | |
151 | putc ('\n'); | |
152 | ||
153 | free(dst); | |
154 | ||
155 | /* | |
156 | * Reset FPGA via FPGA_DATA pin | |
157 | */ | |
158 | SET_FPGA(FPGA_PRG | FPGA_CLK); | |
159 | udelay(1000); /* wait 1ms */ | |
160 | SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA); | |
161 | udelay(1000); /* wait 1ms */ | |
162 | ||
163 | /* | |
164 | * Enable power on PS/2 interface | |
165 | */ | |
166 | *fpga_mode |= CFG_FPGA_CTRL_PS2_RESET; | |
167 | ||
168 | /* | |
169 | * Enable interrupts in exar duart mcr[3] | |
170 | */ | |
171 | *duart0_mcr = 0x08; | |
172 | *duart1_mcr = 0x08; | |
173 | #endif | |
174 | ||
175 | return (0); | |
176 | } | |
177 | ||
178 | ||
179 | /* | |
180 | * Check Board Identity: | |
181 | */ | |
182 | ||
183 | int checkboard (void) | |
184 | { | |
185 | unsigned char str[64]; | |
186 | int i = getenv_r ("serial#", str, sizeof(str)); | |
187 | ||
188 | puts ("Board: "); | |
189 | ||
190 | if (i == -1) { | |
191 | puts ("### No HW ID - assuming ABG405"); | |
192 | } else { | |
193 | puts(str); | |
194 | } | |
195 | ||
196 | putc ('\n'); | |
197 | ||
198 | return 0; | |
199 | } | |
200 | ||
201 | /* ------------------------------------------------------------------------- */ | |
202 | ||
203 | long int initdram (int board_type) | |
204 | { | |
205 | unsigned long val; | |
206 | ||
207 | mtdcr(memcfga, mem_mb0cf); | |
208 | val = mfdcr(memcfgd); | |
209 | ||
210 | #if 0 | |
211 | printf("\nmb0cf=%x\n", val); /* test-only */ | |
212 | printf("strap=%x\n", mfdcr(strap)); /* test-only */ | |
213 | #endif | |
214 | ||
215 | return (4*1024*1024 << ((val & 0x000e0000) >> 17)); | |
216 | } | |
217 | ||
218 | /* ------------------------------------------------------------------------- */ | |
219 | ||
220 | int testdram (void) | |
221 | { | |
222 | /* TODO: XXX XXX XXX */ | |
223 | printf ("test: 16 MB - ok\n"); | |
224 | ||
225 | return (0); | |
226 | } | |
227 | ||
228 | /* ------------------------------------------------------------------------- */ |