projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| c5dfe6ec PK |
1 | /* Copyright 2013 Freescale Semiconductor, Inc. |
| 2 | * | |
| 3 | * SPDX-License-Identifier: GPL-2.0+ | |
| 4 | */ | |
| 5 | ||
| 6 | #include <common.h> | |
| 7 | #include <asm/spl.h> | |
| 8 | #include <malloc.h> | |
| 9 | #include <ns16550.h> | |
| 10 | #include <nand.h> | |
| 11 | #include <i2c.h> | |
| 12 | #include "../common/qixis.h" | |
| 13 | #include "b4860qds_qixis.h" | |
| 14 | ||
| 15 | DECLARE_GLOBAL_DATA_PTR; | |
| 16 | ||
| 17 | phys_size_t get_effective_memsize(void) | |
| 18 | { | |
| 19 | return CONFIG_SYS_L3_SIZE; | |
| 20 | } | |
| 21 | ||
| 22 | unsigned long get_board_sys_clk(void) | |
| 23 | { | |
| 24 | u8 sysclk_conf = QIXIS_READ(brdcfg[1]); | |
| 25 | ||
| 26 | switch ((sysclk_conf & 0x0C) >> 2) { | |
| 27 | case QIXIS_CLK_100: | |
| 28 | return 100000000; | |
| 29 | case QIXIS_CLK_125: | |
| 30 | return 125000000; | |
| 31 | case QIXIS_CLK_133: | |
| 32 | return 133333333; | |
| 33 | } | |
| 34 | return 66666666; | |
| 35 | } | |
| 36 | ||
| 37 | unsigned long get_board_ddr_clk(void) | |
| 38 | { | |
| 39 | u8 ddrclk_conf = QIXIS_READ(brdcfg[1]); | |
| 40 | ||
| 41 | switch (ddrclk_conf & 0x03) { | |
| 42 | case QIXIS_CLK_100: | |
| 43 | return 100000000; | |
| 44 | case QIXIS_CLK_125: | |
| 45 | return 125000000; | |
| 46 | case QIXIS_CLK_133: | |
| 47 | return 133333333; | |
| 48 | } | |
| 49 | return 66666666; | |
| 50 | } | |
| 51 | ||
| 52 | void board_init_f(ulong bootflag) | |
| 53 | { | |
| 54 | u32 plat_ratio, sys_clk, uart_clk; | |
| 55 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; | |
| 56 | ||
| 57 | /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */ | |
| 58 | memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t)); | |
| 59 | ||
| 60 | /* Update GD pointer */ | |
| 61 | gd = (gd_t *)(CONFIG_SPL_GD_ADDR); | |
| 62 | ||
| 63 | /* compiler optimization barrier needed for GCC >= 3.4 */ | |
| 64 | __asm__ __volatile__("" : : : "memory"); | |
| 65 | ||
| 66 | console_init_f(); | |
| 67 | ||
| 68 | /* initialize selected port with appropriate baud rate */ | |
| 69 | sys_clk = get_board_sys_clk(); | |
| 70 | plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; | |
| 71 | uart_clk = sys_clk * plat_ratio / 2; | |
| 72 | ||
| 73 | NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, | |
| 74 | uart_clk / 16 / CONFIG_BAUDRATE); | |
| 75 | ||
| 76 | relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0); | |
| 77 | } | |
| 78 | ||
| 79 | void board_init_r(gd_t *gd, ulong dest_addr) | |
| 80 | { | |
| 81 | bd_t *bd; | |
| 82 | ||
| 83 | bd = (bd_t *)(gd + sizeof(gd_t)); | |
| 84 | memset(bd, 0, sizeof(bd_t)); | |
| 85 | gd->bd = bd; | |
| 86 | bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR; | |
| 87 | bd->bi_memsize = CONFIG_SYS_L3_SIZE; | |
| 88 | ||
| 89 | probecpu(); | |
| 90 | get_clocks(); | |
| 91 | mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, | |
| 92 | CONFIG_SPL_RELOC_MALLOC_SIZE); | |
| 93 | ||
| 94 | #ifndef CONFIG_SPL_NAND_BOOT | |
| 95 | env_init(); | |
| 96 | env_relocate(); | |
| 97 | #else | |
| 98 | /* relocate environment function pointers etc. */ | |
| 99 | nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, | |
| 100 | (uchar *)CONFIG_ENV_ADDR); | |
| 101 | gd->env_addr = (ulong)(CONFIG_ENV_ADDR); | |
| 102 | gd->env_valid = 1; | |
| 103 | #endif | |
| 104 | ||
| 105 | i2c_init_all(); | |
| 106 | ||
| 107 | puts("\n\n"); | |
| 108 | ||
| 109 | gd->ram_size = initdram(0); | |
| 110 | ||
| 111 | #ifdef CONFIG_SPL_NAND_BOOT | |
| 112 | nand_boot(); | |
| 113 | #endif | |
| 114 | } |