[thirdparty/u-boot.git] / board / freescale / common / ngpixis.h

/**
 * Copyright 2010-2011 Freescale Semiconductor
 * Author: Timur Tabi <timur@freescale.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 *
 * This file provides support for the ngPIXIS, a board-specific FPGA used on
 * some Freescale reference boards.
 */

/* ngPIXIS register set. Hopefully, this won't change too much over time.
 * Feel free to add board-specific #ifdefs where necessary.
 */
typedef struct ngpixis {
	u8 id;
	u8 arch;
	u8 scver;
	u8 csr;
	u8 rst;
	u8 serclk;
	u8 aux;
	u8 spd;
	u8 brdcfg0;
	u8 brdcfg1;	/* On some boards, this register is called 'dma' */
	u8 addr;
	u8 brdcfg2;
	u8 gpiodir;
	u8 data;
	u8 led;
	u8 tag;
	u8 vctl;
	u8 vstat;
	u8 vcfgen0;
	u8 res4;
	u8 ocmcsr;
	u8 ocmmsg;
	u8 gmdbg;
	u8 res5[2];
	u8 sclk[3];
	u8 dclk[3];
	u8 watch;
	struct {
		u8 sw;
		u8 en;
	} s[9];		/* s[0]..s[7] is SW1..SW8, and s[8] is SW11 */
} __attribute__ ((packed)) ngpixis_t;

/* Pointer to the PIXIS register set */
#define pixis ((ngpixis_t *)PIXIS_BASE)

/* The PIXIS SW register that corresponds to board switch X, where x >= 1 */
#define PIXIS_SW(x)		(pixis->s[(x) - 1].sw)

/* The PIXIS EN register that corresponds to board switch X, where x >= 1 */
#define PIXIS_EN(x)		(pixis->s[(x) - 1].en)

u8 pixis_read(unsigned int reg);
void pixis_write(unsigned int reg, u8 value);

#define PIXIS_READ(reg) pixis_read(offsetof(ngpixis_t, reg))
#define PIXIS_WRITE(reg, value) pixis_write(offsetof(ngpixis_t, reg), value)
Commit	Line	Data
5a469608	1	/**
aa8d3fb8	2	* Copyright 2010-2011 Freescale Semiconductor
5a469608 TT	3	* Author: Timur Tabi <timur@freescale.com>
5a469608 TT	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
5a469608 TT	6	*
	7	* This file provides support for the ngPIXIS, a board-specific FPGA used on
	8	* some Freescale reference boards.
	9	*/
	10
	11	/* ngPIXIS register set. Hopefully, this won't change too much over time.
	12	* Feel free to add board-specific #ifdefs where necessary.
	13	*/
	14	typedef struct ngpixis {
	15	u8 id;
	16	u8 arch;
	17	u8 scver;
	18	u8 csr;
	19	u8 rst;
e02aea61	20	u8 serclk;
5a469608 TT	21	u8 aux;
	22	u8 spd;
	23	u8 brdcfg0;
5f4d3682	24	u8 brdcfg1; /* On some boards, this register is called 'dma' */
5a469608	25	u8 addr;
e02aea61 KG	26	u8 brdcfg2;
e02aea61 KG	27	u8 gpiodir;
5a469608 TT	28	u8 data;
5a469608 TT	29	u8 led;
e02aea61	30	u8 tag;
5a469608 TT	31	u8 vctl;
	32	u8 vstat;
	33	u8 vcfgen0;
	34	u8 res4;
	35	u8 ocmcsr;
	36	u8 ocmmsg;
	37	u8 gmdbg;
	38	u8 res5[2];
	39	u8 sclk[3];
	40	u8 dclk[3];
	41	u8 watch;
	42	struct {
	43	u8 sw;
	44	u8 en;
d31e53b4	45	} s[9]; /* s[0]..s[7] is SW1..SW8, and s[8] is SW11 */
b4a60e52	46	} __attribute__ ((packed)) ngpixis_t;
5a469608 TT	47
	48	/* Pointer to the PIXIS register set */
	49	#define pixis ((ngpixis_t *)PIXIS_BASE)
	50
	51	/* The PIXIS SW register that corresponds to board switch X, where x >= 1 */
	52	#define PIXIS_SW(x) (pixis->s[(x) - 1].sw)
	53
	54	/* The PIXIS EN register that corresponds to board switch X, where x >= 1 */
	55	#define PIXIS_EN(x) (pixis->s[(x) - 1].en)
aa8d3fb8 TT	56
	57	u8 pixis_read(unsigned int reg);
	58	void pixis_write(unsigned int reg, u8 value);
	59
	60	#define PIXIS_READ(reg) pixis_read(offsetof(ngpixis_t, reg))
	61	#define PIXIS_WRITE(reg, value) pixis_write(offsetof(ngpixis_t, reg), value)