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05316f8e TL |
1 | /* |
2 | * (C) Copyright 2000-2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
198cafbf | 5 | * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc. |
05316f8e TL |
6 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
05316f8e TL |
9 | */ |
10 | ||
11 | #include <common.h> | |
12 | #include <spi.h> | |
13 | #include <asm/immap.h> | |
198cafbf | 14 | #include <asm/io.h> |
05316f8e TL |
15 | |
16 | DECLARE_GLOBAL_DATA_PTR; | |
17 | ||
18 | int checkboard(void) | |
19 | { | |
20 | /* | |
21 | * need to to: | |
22 | * Check serial flash size. if 2mb evb, else 8mb demo | |
23 | */ | |
24 | puts("Board: "); | |
25 | puts("Freescale M54451 EVB\n"); | |
26 | return 0; | |
27 | }; | |
28 | ||
f1683aa7 | 29 | int dram_init(void) |
05316f8e TL |
30 | { |
31 | u32 dramsize; | |
32 | #ifdef CONFIG_CF_SBF | |
33 | /* | |
34 | * Serial Boot: The dram is already initialized in start.S | |
35 | * only require to return DRAM size | |
36 | */ | |
6d0f6bcf | 37 | dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; |
05316f8e | 38 | #else |
198cafbf AW |
39 | sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM); |
40 | gpio_t *gpio = (gpio_t *)(MMAP_GPIO); | |
05316f8e TL |
41 | u32 i; |
42 | ||
6d0f6bcf | 43 | dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; |
05316f8e | 44 | |
198cafbf AW |
45 | if ((in_be32(&sdram->sdcfg1) == CONFIG_SYS_SDRAM_CFG1) && |
46 | (in_be32(&sdram->sdcfg2) == CONFIG_SYS_SDRAM_CFG2)) | |
05316f8e TL |
47 | return dramsize; |
48 | ||
49 | for (i = 0x13; i < 0x20; i++) { | |
50 | if (dramsize == (1 << i)) | |
51 | break; | |
52 | } | |
53 | i--; | |
54 | ||
198cafbf | 55 | out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH); |
05316f8e | 56 | |
198cafbf | 57 | out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i); |
05316f8e | 58 | |
198cafbf AW |
59 | out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1); |
60 | out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2); | |
05316f8e TL |
61 | |
62 | udelay(200); | |
63 | ||
64 | /* Issue PALL */ | |
198cafbf | 65 | out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2); |
05316f8e TL |
66 | __asm__("nop"); |
67 | ||
68 | /* Perform two refresh cycles */ | |
198cafbf | 69 | out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4); |
05316f8e | 70 | __asm__("nop"); |
198cafbf | 71 | out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4); |
05316f8e TL |
72 | __asm__("nop"); |
73 | ||
74 | /* Issue LEMR */ | |
198cafbf | 75 | out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE); |
05316f8e | 76 | __asm__("nop"); |
198cafbf | 77 | out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE); |
05316f8e TL |
78 | __asm__("nop"); |
79 | ||
198cafbf AW |
80 | out_be32(&sdram->sdcr, |
81 | (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000000); | |
05316f8e TL |
82 | |
83 | udelay(100); | |
84 | #endif | |
088454cd SG |
85 | gd->ram_size = dramsize; |
86 | ||
87 | return 0; | |
05316f8e TL |
88 | }; |
89 | ||
90 | int testdram(void) | |
91 | { | |
92 | /* TODO: XXX XXX XXX */ | |
93 | printf("DRAM test not implemented!\n"); | |
94 | ||
95 | return (0); | |
96 | } |