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db2f721f WD |
1 | /* |
2 | * (C) Copyright 2000, 2001 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com | |
6 | * Add support the Sharp chips on the mpc8260ads. | |
7 | * I started with board/ip860/flash.c and made changes I found in | |
8 | * the MTD project by David Schleef. | |
9 | * | |
1a459660 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
db2f721f WD |
11 | */ |
12 | ||
13 | #include <common.h> | |
14 | ||
15 | ||
6d0f6bcf | 16 | flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
db2f721f | 17 | |
5a1aceb0 | 18 | #if defined(CONFIG_ENV_IS_IN_FLASH) |
0e8d1586 | 19 | # ifndef CONFIG_ENV_ADDR |
6d0f6bcf | 20 | # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) |
db2f721f | 21 | # endif |
0e8d1586 JCPV |
22 | # ifndef CONFIG_ENV_SIZE |
23 | # define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE | |
db2f721f | 24 | # endif |
0e8d1586 JCPV |
25 | # ifndef CONFIG_ENV_SECT_SIZE |
26 | # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE | |
db2f721f WD |
27 | # endif |
28 | #endif | |
29 | ||
30 | /*----------------------------------------------------------------------- | |
31 | * Functions | |
32 | */ | |
33 | static ulong flash_get_size (vu_long *addr, flash_info_t *info); | |
34 | static int write_word (flash_info_t *info, ulong dest, ulong data); | |
35 | static int clear_block_lock_bit(vu_long * addr); | |
36 | ||
37 | /*----------------------------------------------------------------------- | |
38 | */ | |
39 | ||
40 | unsigned long flash_init (void) | |
41 | { | |
5d232d0e | 42 | #ifndef CONFIG_MPC8266ADS |
6d0f6bcf | 43 | volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
db2f721f WD |
44 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
45 | volatile ip860_bcsr_t *bcsr = (ip860_bcsr_t *)BCSR_BASE; | |
46 | #endif | |
47 | unsigned long size; | |
48 | int i; | |
49 | ||
50 | /* Init: enable write, | |
51 | * or we cannot even write flash commands | |
52 | */ | |
5d232d0e | 53 | #ifndef CONFIG_MPC8266ADS |
db2f721f WD |
54 | bcsr->bd_ctrl |= BD_CTRL_FLWE; |
55 | #endif | |
56 | ||
57 | ||
6d0f6bcf | 58 | for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { |
db2f721f WD |
59 | flash_info[i].flash_id = FLASH_UNKNOWN; |
60 | ||
61 | /* set the default sector offset */ | |
62 | } | |
63 | ||
64 | /* Static FLASH Bank configuration here - FIXME XXX */ | |
65 | ||
66 | size = flash_get_size((vu_long *)FLASH_BASE, &flash_info[0]); | |
67 | ||
68 | if (flash_info[0].flash_id == FLASH_UNKNOWN) { | |
69 | printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", | |
70 | size, size<<20); | |
71 | } | |
72 | ||
5d232d0e | 73 | #ifndef CONFIG_MPC8266ADS |
db2f721f | 74 | /* Remap FLASH according to real size */ |
6d0f6bcf JCPV |
75 | memctl->memc_or1 = CONFIG_SYS_OR_TIMING_FLASH | (-size & 0xFFFF8000); |
76 | memctl->memc_br1 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | | |
db2f721f WD |
77 | (memctl->memc_br1 & ~(BR_BA_MSK)); |
78 | #endif | |
79 | /* Re-do sizing to get full correct info */ | |
6d0f6bcf | 80 | size = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]); |
db2f721f WD |
81 | |
82 | flash_info[0].size = size; | |
83 | ||
6d0f6bcf | 84 | #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE |
db2f721f WD |
85 | /* monitor protection ON by default */ |
86 | flash_protect(FLAG_PROTECT_SET, | |
6d0f6bcf JCPV |
87 | CONFIG_SYS_MONITOR_BASE, |
88 | CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, | |
db2f721f WD |
89 | &flash_info[0]); |
90 | #endif | |
91 | ||
5a1aceb0 | 92 | #ifdef CONFIG_ENV_IS_IN_FLASH |
db2f721f WD |
93 | /* ENV protection ON by default */ |
94 | flash_protect(FLAG_PROTECT_SET, | |
0e8d1586 JCPV |
95 | CONFIG_ENV_ADDR, |
96 | CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1, | |
db2f721f WD |
97 | &flash_info[0]); |
98 | #endif | |
99 | return (size); | |
100 | } | |
101 | ||
102 | /*----------------------------------------------------------------------- | |
103 | */ | |
104 | void flash_print_info (flash_info_t *info) | |
105 | { | |
106 | int i; | |
107 | ||
108 | if (info->flash_id == FLASH_UNKNOWN) { | |
109 | printf ("missing or unknown FLASH type\n"); | |
110 | return; | |
111 | } | |
112 | ||
113 | switch (info->flash_id & FLASH_VENDMASK) { | |
114 | case FLASH_MAN_INTEL: printf ("Intel "); break; | |
115 | case FLASH_MAN_SHARP: printf ("Sharp "); break; | |
116 | default: printf ("Unknown Vendor "); break; | |
117 | } | |
118 | ||
119 | switch (info->flash_id & FLASH_TYPEMASK) { | |
120 | case FLASH_28F016SV: printf ("28F016SV (16 Mbit, 32 x 64k)\n"); | |
121 | break; | |
122 | case FLASH_28F160S3: printf ("28F160S3 (16 Mbit, 32 x 512K)\n"); | |
123 | break; | |
124 | case FLASH_28F320S3: printf ("28F320S3 (32 Mbit, 64 x 512K)\n"); | |
125 | break; | |
126 | case FLASH_LH28F016SCT: printf ("28F016SC (16 Mbit, 32 x 64K)\n"); | |
127 | break; | |
128 | default: printf ("Unknown Chip Type\n"); | |
129 | break; | |
130 | } | |
131 | ||
132 | printf (" Size: %ld MB in %d Sectors\n", | |
133 | info->size >> 20, info->sector_count); | |
134 | ||
135 | printf (" Sector Start Addresses:"); | |
136 | for (i=0; i<info->sector_count; ++i) { | |
137 | if ((i % 5) == 0) | |
138 | printf ("\n "); | |
139 | printf (" %08lX%s", | |
140 | info->start[i], | |
141 | info->protect[i] ? " (RO)" : " " | |
142 | ); | |
143 | } | |
144 | printf ("\n"); | |
145 | } | |
146 | ||
147 | /*----------------------------------------------------------------------- | |
148 | */ | |
149 | ||
150 | ||
151 | /*----------------------------------------------------------------------- | |
152 | */ | |
153 | ||
154 | /* | |
155 | * The following code cannot be run from FLASH! | |
156 | */ | |
157 | ||
158 | static ulong flash_get_size (vu_long *addr, flash_info_t *info) | |
159 | { | |
160 | short i; | |
161 | ulong value; | |
162 | ulong base = (ulong)addr; | |
163 | ulong sector_offset; | |
164 | ||
165 | /* Write "Intelligent Identifier" command: read Manufacturer ID */ | |
166 | *addr = 0x90909090; | |
167 | ||
168 | value = addr[0] & 0x00FF00FF; | |
169 | switch (value) { | |
170 | case MT_MANUFACT: /* SHARP, MT or => Intel */ | |
171 | case INTEL_ALT_MANU: | |
172 | info->flash_id = FLASH_MAN_INTEL; | |
173 | break; | |
174 | default: | |
175 | printf("unknown manufacturer: %x\n", (unsigned int)value); | |
176 | info->flash_id = FLASH_UNKNOWN; | |
177 | info->sector_count = 0; | |
178 | info->size = 0; | |
179 | return (0); /* no or unknown flash */ | |
180 | } | |
181 | ||
182 | value = addr[1]; /* device ID */ | |
183 | ||
184 | switch (value) { | |
185 | case (INTEL_ID_28F016S): | |
186 | info->flash_id += FLASH_28F016SV; | |
187 | info->sector_count = 32; | |
188 | info->size = 0x00400000; | |
189 | sector_offset = 0x20000; | |
190 | break; /* => 2x2 MB */ | |
191 | ||
192 | case (INTEL_ID_28F160S3): | |
193 | info->flash_id += FLASH_28F160S3; | |
194 | info->sector_count = 32; | |
195 | info->size = 0x00400000; | |
196 | sector_offset = 0x20000; | |
197 | break; /* => 2x2 MB */ | |
198 | ||
199 | case (INTEL_ID_28F320S3): | |
200 | info->flash_id += FLASH_28F320S3; | |
201 | info->sector_count = 64; | |
202 | info->size = 0x00800000; | |
203 | sector_offset = 0x20000; | |
204 | break; /* => 2x4 MB */ | |
205 | ||
206 | case SHARP_ID_28F016SCL: | |
207 | case SHARP_ID_28F016SCZ: | |
208 | info->flash_id = FLASH_MAN_SHARP | FLASH_LH28F016SCT; | |
209 | info->sector_count = 32; | |
210 | info->size = 0x00800000; | |
211 | sector_offset = 0x40000; | |
212 | break; /* => 4x2 MB */ | |
213 | ||
214 | ||
215 | default: | |
216 | info->flash_id = FLASH_UNKNOWN; | |
217 | return (0); /* => no or unknown flash */ | |
218 | ||
219 | } | |
220 | ||
221 | /* set up sector start address table */ | |
222 | for (i = 0; i < info->sector_count; i++) { | |
223 | info->start[i] = base; | |
224 | base += sector_offset; | |
225 | /* don't know how to check sector protection */ | |
226 | info->protect[i] = 0; | |
227 | } | |
228 | ||
229 | /* | |
230 | * Prevent writes to uninitialized FLASH. | |
231 | */ | |
232 | if (info->flash_id != FLASH_UNKNOWN) { | |
233 | addr = (vu_long *)info->start[0]; | |
234 | ||
235 | *addr = 0xFFFFFF; /* reset bank to read array mode */ | |
236 | } | |
237 | ||
238 | return (info->size); | |
239 | } | |
240 | ||
241 | ||
242 | /*----------------------------------------------------------------------- | |
243 | */ | |
244 | ||
245 | int flash_erase (flash_info_t *info, int s_first, int s_last) | |
246 | { | |
247 | int flag, prot, sect; | |
248 | ulong start, now, last; | |
249 | ||
250 | if ((s_first < 0) || (s_first > s_last)) { | |
251 | if (info->flash_id == FLASH_UNKNOWN) { | |
252 | printf ("- missing\n"); | |
253 | } else { | |
254 | printf ("- no sectors to erase\n"); | |
255 | } | |
256 | return 1; | |
257 | } | |
258 | ||
259 | if ( ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) | |
260 | && ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_SHARP) ) { | |
261 | printf ("Can't erase unknown flash type %08lx - aborted\n", | |
262 | info->flash_id); | |
263 | return 1; | |
264 | } | |
265 | ||
266 | prot = 0; | |
267 | for (sect=s_first; sect<=s_last; ++sect) { | |
268 | if (info->protect[sect]) { | |
269 | prot++; | |
270 | } | |
271 | } | |
272 | ||
273 | if (prot) { | |
274 | printf ("- Warning: %d protected sectors will not be erased!\n", | |
275 | prot); | |
276 | } else { | |
277 | printf ("\n"); | |
278 | } | |
279 | ||
280 | /* Make Sure Block Lock Bit is not set. */ | |
281 | if(clear_block_lock_bit((vu_long *)(info->start[s_first]))){ | |
282 | return 1; | |
283 | } | |
284 | ||
285 | ||
286 | /* Start erase on unprotected sectors */ | |
287 | for (sect = s_first; sect<=s_last; sect++) { | |
288 | if (info->protect[sect] == 0) { /* not protected */ | |
289 | vu_long *addr = (vu_long *)(info->start[sect]); | |
290 | ||
291 | last = start = get_timer (0); | |
292 | ||
293 | /* Disable interrupts which might cause a timeout here */ | |
294 | flag = disable_interrupts(); | |
295 | ||
296 | /* Reset Array */ | |
297 | *addr = 0xffffffff; | |
298 | /* Clear Status Register */ | |
299 | *addr = 0x50505050; | |
300 | /* Single Block Erase Command */ | |
301 | *addr = 0x20202020; | |
302 | /* Confirm */ | |
303 | *addr = 0xD0D0D0D0; | |
304 | ||
305 | if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) { | |
306 | /* Resume Command, as per errata update */ | |
307 | *addr = 0xD0D0D0D0; | |
308 | } | |
309 | ||
310 | /* re-enable interrupts if necessary */ | |
311 | if (flag) | |
312 | enable_interrupts(); | |
313 | ||
314 | /* wait at least 80us - let's wait 1 ms */ | |
315 | udelay (1000); | |
316 | while ((*addr & 0x80808080) != 0x80808080) { | |
317 | if(*addr & 0x20202020){ | |
318 | printf("Error in Block Erase - Lock Bit may be set!\n"); | |
319 | printf("Status Register = 0x%X\n", (uint)*addr); | |
320 | *addr = 0xFFFFFFFF; /* reset bank */ | |
321 | return 1; | |
322 | } | |
6d0f6bcf | 323 | if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
db2f721f WD |
324 | printf ("Timeout\n"); |
325 | *addr = 0xFFFFFFFF; /* reset bank */ | |
326 | return 1; | |
327 | } | |
328 | /* show that we're waiting */ | |
329 | if ((now - last) > 1000) { /* every second */ | |
330 | putc ('.'); | |
331 | last = now; | |
332 | } | |
333 | } | |
334 | ||
335 | /* reset to read mode */ | |
336 | *addr = 0xFFFFFFFF; | |
337 | } | |
338 | } | |
339 | ||
340 | printf (" done\n"); | |
341 | return 0; | |
342 | } | |
343 | ||
344 | /*----------------------------------------------------------------------- | |
345 | * Copy memory to flash, returns: | |
346 | * 0 - OK | |
347 | * 1 - write timeout | |
348 | * 2 - Flash not erased | |
349 | */ | |
350 | ||
351 | int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) | |
352 | { | |
353 | ulong cp, wp, data; | |
354 | int i, l, rc; | |
355 | ||
356 | wp = (addr & ~3); /* get lower word aligned address */ | |
357 | ||
358 | /* | |
359 | * handle unaligned start bytes | |
360 | */ | |
361 | if ((l = addr - wp) != 0) { | |
362 | data = 0; | |
363 | for (i=0, cp=wp; i<l; ++i, ++cp) { | |
364 | data = (data << 8) | (*(uchar *)cp); | |
365 | } | |
366 | for (; i<4 && cnt>0; ++i) { | |
367 | data = (data << 8) | *src++; | |
368 | --cnt; | |
369 | ++cp; | |
370 | } | |
371 | for (; cnt==0 && i<4; ++i, ++cp) { | |
372 | data = (data << 8) | (*(uchar *)cp); | |
373 | } | |
374 | ||
375 | if ((rc = write_word(info, wp, data)) != 0) { | |
376 | return (rc); | |
377 | } | |
378 | wp += 4; | |
379 | } | |
380 | ||
381 | /* | |
382 | * handle word aligned part | |
383 | */ | |
384 | while (cnt >= 4) { | |
385 | data = 0; | |
386 | for (i=0; i<4; ++i) { | |
387 | data = (data << 8) | *src++; | |
388 | } | |
389 | if ((rc = write_word(info, wp, data)) != 0) { | |
390 | return (rc); | |
391 | } | |
392 | wp += 4; | |
393 | cnt -= 4; | |
394 | } | |
395 | ||
396 | if (cnt == 0) { | |
397 | return (0); | |
398 | } | |
399 | ||
400 | /* | |
401 | * handle unaligned tail bytes | |
402 | */ | |
403 | data = 0; | |
404 | for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { | |
405 | data = (data << 8) | *src++; | |
406 | --cnt; | |
407 | } | |
408 | for (; i<4; ++i, ++cp) { | |
409 | data = (data << 8) | (*(uchar *)cp); | |
410 | } | |
411 | ||
412 | return (write_word(info, wp, data)); | |
413 | } | |
414 | ||
415 | /*----------------------------------------------------------------------- | |
416 | * Write a word to Flash, returns: | |
417 | * 0 - OK | |
418 | * 1 - write timeout | |
419 | * 2 - Flash not erased | |
420 | */ | |
421 | static int write_word (flash_info_t *info, ulong dest, ulong data) | |
422 | { | |
423 | vu_long *addr = (vu_long *)dest; | |
424 | ulong start, csr; | |
425 | int flag; | |
426 | ||
427 | /* Check if Flash is (sufficiently) erased */ | |
428 | if ((*addr & data) != data) { | |
429 | return (2); | |
430 | } | |
431 | /* Disable interrupts which might cause a timeout here */ | |
432 | flag = disable_interrupts(); | |
433 | ||
434 | /* Write Command */ | |
435 | *addr = 0x10101010; | |
436 | ||
437 | /* Write Data */ | |
438 | *addr = data; | |
439 | ||
440 | /* re-enable interrupts if necessary */ | |
441 | if (flag) | |
442 | enable_interrupts(); | |
443 | ||
444 | /* data polling for D7 */ | |
445 | start = get_timer (0); | |
446 | flag = 0; | |
447 | while (((csr = *addr) & 0x80808080) != 0x80808080) { | |
6d0f6bcf | 448 | if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { |
db2f721f WD |
449 | flag = 1; |
450 | break; | |
451 | } | |
452 | } | |
453 | if (csr & 0x40404040) { | |
454 | printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr); | |
455 | flag = 1; | |
456 | } | |
457 | ||
458 | /* Clear Status Registers Command */ | |
459 | *addr = 0x50505050; | |
460 | /* Reset to read array mode */ | |
461 | *addr = 0xFFFFFFFF; | |
462 | ||
463 | return (flag); | |
464 | } | |
465 | ||
466 | /*----------------------------------------------------------------------- | |
467 | * Clear Block Lock Bit, returns: | |
468 | * 0 - OK | |
469 | * 1 - Timeout | |
470 | */ | |
471 | ||
472 | static int clear_block_lock_bit(vu_long * addr) | |
473 | { | |
474 | ulong start, now; | |
475 | ||
476 | /* Reset Array */ | |
477 | *addr = 0xffffffff; | |
478 | /* Clear Status Register */ | |
479 | *addr = 0x50505050; | |
480 | ||
481 | *addr = 0x60606060; | |
482 | *addr = 0xd0d0d0d0; | |
483 | ||
484 | start = get_timer (0); | |
485 | while(*addr != 0x80808080){ | |
6d0f6bcf | 486 | if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
db2f721f WD |
487 | printf ("Timeout on clearing Block Lock Bit\n"); |
488 | *addr = 0xFFFFFFFF; /* reset bank */ | |
489 | return 1; | |
490 | } | |
491 | } | |
492 | return 0; | |
493 | } |