projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| a877880c | 1 | /* |
| ba8e76bd TT |
2 | * Copyright 2007-2011 Freescale Semiconductor, Inc. |
| 3 | * Authors: York Sun <yorksun@freescale.com> | |
| 4 | * Timur Tabi <timur@freescale.com> | |
| a877880c YS |
5 | * |
| 6 | * FSL DIU Framebuffer driver | |
| 7 | * | |
| 8 | * See file CREDITS for list of people who contributed to this | |
| 9 | * project. | |
| 10 | * | |
| 11 | * This program is free software; you can redistribute it and/or | |
| 12 | * modify it under the terms of the GNU General Public License as | |
| 13 | * published by the Free Software Foundation; either version 2 of | |
| 14 | * the License, or (at your option) any later version. | |
| 15 | * | |
| 16 | * This program is distributed in the hope that it will be useful, | |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 19 | * GNU General Public License for more details. | |
| 20 | * | |
| 21 | * You should have received a copy of the GNU General Public License | |
| 22 | * along with this program; if not, write to the Free Software | |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 24 | * MA 02111-1307 USA | |
| 25 | */ | |
| 26 | ||
| 27 | #include <common.h> | |
| 28 | #include <command.h> | |
| 29 | #include <asm/io.h> | |
| 9e70d137 | 30 | #include <fsl_diu_fb.h> |
| ba8e76bd TT |
31 | #include "../common/pixis.h" |
| 32 | ||
| 33 | #define PX_BRDCFG0_DLINK 0x10 | |
| 34 | #define PX_BRDCFG0_DVISEL 0x08 | |
| 070ba561 | 35 | |
| 3b80c5f5 YS |
36 | void diu_set_pixel_clock(unsigned int pixclock) |
| 37 | { | |
| 6d0f6bcf | 38 | volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
| 3b80c5f5 YS |
39 | volatile ccsr_gur_t *gur = &immap->im_gur; |
| 40 | volatile unsigned int *guts_clkdvdr = &gur->clkdvdr; | |
| 41 | unsigned long speed_ccb, temp, pixval; | |
| 42 | ||
| 43 | speed_ccb = get_bus_freq(0); | |
| 44 | temp = 1000000000/pixclock; | |
| 45 | temp *= 1000; | |
| 46 | pixval = speed_ccb / temp; | |
| 47 | debug("DIU pixval = %lu\n", pixval); | |
| 48 | ||
| 49 | /* Modify PXCLK in GUTS CLKDVDR */ | |
| 50 | debug("DIU: Current value of CLKDVDR = 0x%08x\n", *guts_clkdvdr); | |
| 51 | temp = *guts_clkdvdr & 0x2000FFFF; | |
| 52 | *guts_clkdvdr = temp; /* turn off clock */ | |
| 53 | *guts_clkdvdr = temp | 0x80000000 | ((pixval & 0x1F) << 16); | |
| 54 | debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr); | |
| 55 | } | |
| a877880c | 56 | |
| ba8e76bd | 57 | int platform_diu_init(unsigned int xres, unsigned int yres, const char *port) |
| a877880c | 58 | { |
| ba8e76bd TT |
59 | const char *name; |
| 60 | int gamma_fix = 0; | |
| 61 | u32 pixel_format = 0x88883316; | |
| 62 | u8 temp; | |
| a877880c | 63 | |
| ba8e76bd | 64 | temp = in_8(&pixis->brdcfg0); |
| a877880c | 65 | |
| ba8e76bd TT |
66 | if (strncmp(port, "dlvds", 5) == 0) { |
| 67 | /* Dual link LVDS */ | |
| a877880c | 68 | gamma_fix = 1; |
| ba8e76bd TT |
69 | temp &= ~(PX_BRDCFG0_DLINK | PX_BRDCFG0_DVISEL); |
| 70 | name = "Dual-Link LVDS"; | |
| 71 | } else if (strncmp(port, "lvds", 4) == 0) { | |
| 72 | /* Single link LVDS */ | |
| 73 | temp = (temp & ~PX_BRDCFG0_DVISEL) | PX_BRDCFG0_DLINK; | |
| 74 | name = "Single-Link LVDS"; | |
| 75 | } else { | |
| 76 | /* DVI */ | |
| 77 | if (in_8(&pixis->ver) == 1) /* Board version */ | |
| 78 | pixel_format = 0x88882317; | |
| 79 | temp |= PX_BRDCFG0_DVISEL; | |
| 80 | name = "DVI"; | |
| a877880c YS |
81 | } |
| 82 | ||
| ba8e76bd TT |
83 | printf("DIU: Switching to %s monitor @ %ux%u\n", name, xres, yres); |
| 84 | out_8(&pixis->brdcfg0, temp); | |
| 85 | ||
| 86 | return fsl_diu_init(xres, pixel_format, gamma_fix); | |
| 070ba561 | 87 | } |