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4933b91f | 1 | /* |
1b77ca8a | 2 | * Copyright 2008,2010-2011 Freescale Semiconductor, Inc. |
4933b91f BB |
3 | * |
4 | * (C) Copyright 2000 | |
5 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
4933b91f BB |
8 | */ |
9 | ||
10 | #include <common.h> | |
11 | #include <asm/fsl_law.h> | |
12 | #include <asm/mmu.h> | |
13 | ||
14 | /* | |
15 | * LAW(Local Access Window) configuration: | |
16 | * | |
17 | * 0x0000_0000 0x7fff_ffff DDR 2G | |
3111d32c | 18 | * if PCI (prepend 0xc_0000_0000 if CONFIG_PHYS_64BIT) |
46f3e385 KG |
19 | * 0x8000_0000 0x9fff_ffff PCIE1 MEM 512M |
20 | * 0xa000_0000 0xbfff_ffff PCIE2 MEM 512M | |
3111d32c | 21 | * else if RIO (prepend 0xc_0000_0000 if CONFIG_PHYS_64BIT) |
c759a01a BB |
22 | * 0x8000_0000 0x9fff_ffff RapidIO 512M |
23 | * endif | |
3111d32c | 24 | * (prepend 0xf_0000_0000 if CONFIG_PHYS_64BIT) |
46f3e385 KG |
25 | * 0xffc0_0000 0xffc0_ffff PCIE1 IO 64K |
26 | * 0xffc1_0000 0xffc1_ffff PCIE2 IO 64K | |
c759a01a BB |
27 | * 0xffe0_0000 0xffef_ffff CCSRBAR 1M |
28 | * 0xffdf_0000 0xffe0_0000 PIXIS, CF 64K | |
29 | * 0xef80_0000 0xefff_ffff FLASH (boot bank) 8M | |
4933b91f BB |
30 | * |
31 | * Notes: | |
c759a01a | 32 | * CCSRBAR doesn't need a configured Local Access Window. |
4933b91f BB |
33 | * If flash is 8M at default position (last 8M), no LAW needed. |
34 | */ | |
35 | ||
36 | struct law_entry law_table[] = { | |
37 | #if !defined(CONFIG_SPD_EEPROM) | |
6d0f6bcf | 38 | SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1), |
af5d100e | 39 | #endif |
3111d32c BB |
40 | SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC), |
41 | SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_LBC), | |
4933b91f BB |
42 | }; |
43 | ||
44 | int num_law_entries = ARRAY_SIZE(law_table); |