]> git.ipfire.org Git - people/ms/u-boot.git/blame - board/freescale/mx31pdk/mx31pdk.c
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
[people/ms/u-boot.git] / board / freescale / mx31pdk / mx31pdk.c
CommitLineData
8449f287
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1/*
2 *
3 * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
4 *
5 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26
27#include <common.h>
736fead8 28#include <netdev.h>
86271115
SB
29#include <asm/arch/clock.h>
30#include <asm/arch/imx-regs.h>
47c5455a 31#include <asm/arch/sys_proto.h>
b73850f7 32#include <watchdog.h>
c7336815 33#include <power/pmic.h>
1f83d009 34#include <fsl_pmic.h>
c7336815 35#include <errno.h>
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36
37DECLARE_GLOBAL_DATA_PTR;
38
da962b71
BT
39#ifdef CONFIG_SPL_BUILD
40void board_init_f(ulong bootflag)
41{
5c6db120 42 relocate_code(CONFIG_SPL_TEXT_BASE);
da962b71
BT
43 asm volatile("ldr pc, =nand_boot");
44}
45#endif
46
8449f287 47int dram_init(void)
ed3df72d
FE
48{
49 /* dram_init must store complete ramsize in gd->ram_size */
a55d23cc 50 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
ed3df72d
FE
51 PHYS_SDRAM_1_SIZE);
52 return 0;
53}
54
9b6442f9 55int board_early_init_f(void)
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56{
57 /* CS5: CPLD incl. network controller */
47c5455a
HR
58 static const struct mxc_weimcs cs5 = {
59 /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
60 CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 24, 0, 4, 3),
61 /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
62 CSCR_L(2, 2, 2, 5, 2, 0, 5, 2, 0, 0, 0, 1),
63 /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
64 CSCR_A(2, 2, 2, 2, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0)
65 };
66
67 mxc_setup_weimcs(5, &cs5);
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68
69 /* Setup UART1 and SPI2 pins */
70 mx31_uart1_hw_init();
71 mx31_spi2_hw_init();
72
9b6442f9
FE
73 return 0;
74}
75
76int board_init(void)
77{
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78 /* adress of boot parameters */
79 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
80
81 return 0;
82}
83
b73850f7
FE
84int board_late_init(void)
85{
1f83d009
FE
86 u32 val;
87 struct pmic *p;
c7336815 88 int ret;
1f83d009 89
c7336815
ŁM
90 ret = pmic_init(I2C_PMIC);
91 if (ret)
92 return ret;
1f83d009 93
c7336815
ŁM
94 p = pmic_get("FSL_PMIC");
95 if (!p)
96 return -ENODEV;
1f83d009
FE
97 /* Enable RTC battery */
98 pmic_reg_read(p, REG_POWER_CTL0, &val);
99 pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
100 pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
b73850f7 101#ifdef CONFIG_HW_WATCHDOG
abbab703 102 hw_watchdog_init();
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103#endif
104 return 0;
105}
106
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107int checkboard(void)
108{
e9e0790c 109 printf("Board: MX31PDK\n");
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110 return 0;
111}
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BW
112
113int board_eth_init(bd_t *bis)
114{
115 int rc = 0;
116#ifdef CONFIG_SMC911X
117 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
118#endif
119 return rc;
120}