]>
Commit | Line | Data |
---|---|---|
48c6f328 SL |
1 | /* Copyright 2014 Freescale Semiconductor, Inc. |
2 | * | |
3 | * SPDX-License-Identifier: GPL-2.0+ | |
4 | */ | |
5 | ||
6 | #include <common.h> | |
24b852a7 | 7 | #include <console.h> |
48c6f328 SL |
8 | #include <malloc.h> |
9 | #include <ns16550.h> | |
10 | #include <nand.h> | |
11 | #include <i2c.h> | |
12 | #include <mmc.h> | |
13 | #include <fsl_esdhc.h> | |
14 | #include <spi_flash.h> | |
f49b8c1b | 15 | #include "../common/sleep.h" |
ea022a37 | 16 | #include "../common/spl.h" |
48c6f328 SL |
17 | |
18 | DECLARE_GLOBAL_DATA_PTR; | |
19 | ||
20 | phys_size_t get_effective_memsize(void) | |
21 | { | |
22 | return CONFIG_SYS_L3_SIZE; | |
23 | } | |
24 | ||
25 | unsigned long get_board_sys_clk(void) | |
26 | { | |
27 | return CONFIG_SYS_CLK_FREQ; | |
28 | } | |
29 | ||
30 | unsigned long get_board_ddr_clk(void) | |
31 | { | |
32 | return CONFIG_DDR_CLK_FREQ; | |
33 | } | |
34 | ||
e04dd12b SL |
35 | #if defined(CONFIG_SPL_MMC_BOOT) |
36 | #define GPIO1_SD_SEL 0x00020000 | |
37 | int board_mmc_getcd(struct mmc *mmc) | |
38 | { | |
39 | ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); | |
40 | u32 val = in_be32(&pgpio->gpdat); | |
41 | ||
42 | /* GPIO1_14, 0: eMMC, 1: SD */ | |
43 | val &= GPIO1_SD_SEL; | |
44 | ||
45 | return val ? -1 : 1; | |
46 | } | |
47 | ||
48 | int board_mmc_getwp(struct mmc *mmc) | |
49 | { | |
50 | ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); | |
51 | u32 val = in_be32(&pgpio->gpdat); | |
52 | ||
53 | val &= GPIO1_SD_SEL; | |
54 | ||
55 | return val ? -1 : 0; | |
56 | } | |
57 | #endif | |
58 | ||
48c6f328 SL |
59 | void board_init_f(ulong bootflag) |
60 | { | |
61 | u32 plat_ratio, sys_clk, ccb_clk; | |
62 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; | |
63 | ||
64 | /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */ | |
65 | memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t)); | |
66 | ||
67 | /* Update GD pointer */ | |
68 | gd = (gd_t *)(CONFIG_SPL_GD_ADDR); | |
69 | ||
70 | console_init_f(); | |
71 | ||
f49b8c1b | 72 | #ifdef CONFIG_DEEP_SLEEP |
73 | /* disable the console if boot from deep sleep */ | |
74 | if (is_warm_boot()) | |
75 | fsl_dp_disable_console(); | |
76 | #endif | |
77 | ||
48c6f328 SL |
78 | /* initialize selected port with appropriate baud rate */ |
79 | sys_clk = get_board_sys_clk(); | |
80 | plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; | |
81 | ccb_clk = sys_clk * plat_ratio / 2; | |
82 | ||
83 | NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, | |
84 | ccb_clk / 16 / CONFIG_BAUDRATE); | |
85 | ||
86 | #if defined(CONFIG_SPL_MMC_BOOT) | |
87 | puts("\nSD boot...\n"); | |
88 | #elif defined(CONFIG_SPL_SPI_BOOT) | |
89 | puts("\nSPI boot...\n"); | |
90 | #elif defined(CONFIG_SPL_NAND_BOOT) | |
91 | puts("\nNAND boot...\n"); | |
92 | #endif | |
93 | ||
94 | relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0); | |
95 | } | |
96 | ||
97 | void board_init_r(gd_t *gd, ulong dest_addr) | |
98 | { | |
99 | bd_t *bd; | |
100 | ||
101 | bd = (bd_t *)(gd + sizeof(gd_t)); | |
102 | memset(bd, 0, sizeof(bd_t)); | |
103 | gd->bd = bd; | |
104 | bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR; | |
105 | bd->bi_memsize = CONFIG_SYS_L3_SIZE; | |
106 | ||
107 | probecpu(); | |
108 | get_clocks(); | |
109 | mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, | |
110 | CONFIG_SPL_RELOC_MALLOC_SIZE); | |
ed4708aa | 111 | gd->flags |= GD_FLG_FULL_MALLOC_INIT; |
48c6f328 SL |
112 | |
113 | #ifdef CONFIG_SPL_NAND_BOOT | |
114 | nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, | |
115 | (uchar *)CONFIG_ENV_ADDR); | |
116 | #endif | |
117 | #ifdef CONFIG_SPL_MMC_BOOT | |
118 | mmc_initialize(bd); | |
119 | mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, | |
120 | (uchar *)CONFIG_ENV_ADDR); | |
121 | #endif | |
122 | #ifdef CONFIG_SPL_SPI_BOOT | |
ea022a37 SG |
123 | fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
124 | (uchar *)CONFIG_ENV_ADDR); | |
48c6f328 SL |
125 | #endif |
126 | ||
127 | gd->env_addr = (ulong)(CONFIG_ENV_ADDR); | |
128 | gd->env_valid = 1; | |
129 | ||
130 | i2c_init_all(); | |
131 | ||
132 | gd->ram_size = initdram(0); | |
133 | ||
134 | #ifdef CONFIG_SPL_MMC_BOOT | |
135 | mmc_boot(); | |
136 | #elif defined(CONFIG_SPL_SPI_BOOT) | |
ea022a37 | 137 | fsl_spi_boot(); |
48c6f328 SL |
138 | #elif defined(CONFIG_SPL_NAND_BOOT) |
139 | nand_boot(); | |
140 | #endif | |
141 | } |