[thirdparty/u-boot.git] / board / gateworks / venice / gsc.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2021 Gateworks Corporation
 */

#include <common.h>
#include <command.h>
#include <hang.h>
#include <hexdump.h>
#include <i2c.h>
#include <linux/delay.h>
#include <dm/uclass.h>

#include "gsc.h"

DECLARE_GLOBAL_DATA_PTR;

struct venice_board_info som_info;
struct venice_board_info base_info;
char venice_model[32];
uint32_t venice_serial;

/* return a mac address from EEPROM info */
int gsc_getmac(int index, uint8_t *address)
{
	int i, j;
	u32 maclow, machigh;
	u64 mac;

	j = 0;
	if (som_info.macno) {
		maclow = som_info.mac[5];
		maclow |= som_info.mac[4] << 8;
		maclow |= som_info.mac[3] << 16;
		maclow |= som_info.mac[2] << 24;
		machigh = som_info.mac[1];
		machigh |= som_info.mac[0] << 8;
		mac = machigh;
		mac <<= 32;
		mac |= maclow;
		for (i = 0; i < som_info.macno; i++, j++) {
			if (index == j)
				goto out;
		}
	}

	maclow = base_info.mac[5];
	maclow |= base_info.mac[4] << 8;
	maclow |= base_info.mac[3] << 16;
	maclow |= base_info.mac[2] << 24;
	machigh = base_info.mac[1];
	machigh |= base_info.mac[0] << 8;
	mac = machigh;
	mac <<= 32;
	mac |= maclow;
	for (i = 0; i < base_info.macno; i++, j++) {
		if (index == j)
			goto out;
	}

	return -EINVAL;

out:
	mac += i;
	address[0] = (mac >> 40) & 0xff;
	address[1] = (mac >> 32) & 0xff;
	address[2] = (mac >> 24) & 0xff;
	address[3] = (mac >> 16) & 0xff;
	address[4] = (mac >> 8) & 0xff;
	address[5] = (mac >> 0) & 0xff;

	return 0;
}

/* System Controller registers */
enum {
	GSC_SC_CTRL0		= 0,
	GSC_SC_CTRL1		= 1,
	GSC_SC_STATUS		= 10,
	GSC_SC_FWCRC		= 12,
	GSC_SC_FWVER		= 14,
	GSC_SC_WP		= 15,
	GSC_SC_RST_CAUSE	= 16,
	GSC_SC_THERM_PROTECT	= 19,
};

/* System Controller Control1 bits */
enum {
	GSC_SC_CTRL1_WDTIME	= 4, /* 1 = 60s timeout, 0 = 30s timeout */
	GSC_SC_CTRL1_WDEN	= 5, /* 1 = enable, 0 = disable */
	GSC_SC_CTRL1_BOOT_CHK   = 6, /* 1 = enable alt boot check */
	GSC_SC_CTRL1_WDDIS	= 7, /* 1 = disable boot watchdog */
};

/* System Controller Interrupt bits */
enum {
	GSC_SC_IRQ_PB		= 0, /* Pushbutton switch */
	GSC_SC_IRQ_SECURE	= 1, /* Secure Key erase operation complete */
	GSC_SC_IRQ_EEPROM_WP	= 2, /* EEPROM write violation */
	GSC_SC_IRQ_GPIO		= 4, /* GPIO change */
	GSC_SC_IRQ_TAMPER	= 5, /* Tamper detect */
	GSC_SC_IRQ_WATCHDOG	= 6, /* Watchdog trip */
	GSC_SC_IRQ_PBLONG	= 7, /* Pushbutton long hold */
};

/* System Controller WP bits */
enum {
	GSC_SC_WP_ALL		= 0, /* Write Protect All EEPROM regions */
	GSC_SC_WP_BOARDINFO	= 1, /* Write Protect Board Info region */
};

/* System Controller Reset Cause */
enum {
	GSC_SC_RST_CAUSE_VIN		= 0,
	GSC_SC_RST_CAUSE_PB		= 1,
	GSC_SC_RST_CAUSE_WDT		= 2,
	GSC_SC_RST_CAUSE_CPU		= 3,
	GSC_SC_RST_CAUSE_TEMP_LOCAL	= 4,
	GSC_SC_RST_CAUSE_TEMP_REMOTE	= 5,
	GSC_SC_RST_CAUSE_SLEEP		= 6,
	GSC_SC_RST_CAUSE_BOOT_WDT	= 7,
	GSC_SC_RST_CAUSE_BOOT_WDT_MAN	= 8,
	GSC_SC_RST_CAUSE_SOFT_PWR	= 9,
	GSC_SC_RST_CAUSE_MAX		= 10,
};

#include <dm/device.h>
static struct udevice *gsc_get_dev(int busno, int slave)
{
	struct udevice *dev, *bus;
	int ret;

	ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus);
	if (ret) {
		printf("GSC     : failed I2C%d probe: %d\n", busno, ret);
		return NULL;
	}
	ret = dm_i2c_probe(bus, slave, 0, &dev);
	if (ret)
		return NULL;

	return dev;
}

static int gsc_read_eeprom(int bus, int slave, int alen, struct venice_board_info *info)
{
	int i;
	int chksum;
	unsigned char *buf = (unsigned char *)info;
	struct udevice *dev;
	int ret;

	/* probe device */
	dev = gsc_get_dev(bus, slave);
	if (!dev) {
		if (slave == GSC_EEPROM_ADDR)
			puts("ERROR: Failed to probe EEPROM\n");
		return -ENODEV;
	}

	/* read eeprom config section */
	memset(info, 0, sizeof(*info));
	ret = i2c_set_chip_offset_len(dev, alen);
	if (ret) {
		puts("EEPROM: Failed to set alen\n");
		return ret;
	}
	ret = dm_i2c_read(dev, 0x00, buf, sizeof(*info));
	if (ret) {
		if (slave == GSC_EEPROM_ADDR)
			printf("EEPROM: Failed to read EEPROM\n");
		return ret;
	}

	/* validate checksum */
	for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
		chksum += buf[i];
	if ((info->chksum[0] != chksum >> 8) ||
	    (info->chksum[1] != (chksum & 0xff))) {
		printf("EEPROM: I2C%d@0x%02x: Invalid Checksum\n", bus, slave);
		print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
		memset(info, 0, sizeof(*info));
		return -EINVAL;
	}

	/* sanity check valid model */
	if (info->model[0] != 'G' || info->model[1] != 'W') {
		printf("EEPROM: I2C%d@0x%02x: Invalid Model in EEPROM\n", bus, slave);
		print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
		memset(info, 0, sizeof(*info));
		return -EINVAL;
	}

	return 0;
}

static const char *gsc_get_rst_cause(struct udevice *dev)
{
	static char str[64];
	static const char * const names[] = {
		"VIN",
		"PB",
		"WDT",
		"CPU",
		"TEMP_L",
		"TEMP_R",
		"SLEEP",
		"BOOT_WDT1",
		"BOOT_WDT2",
		"SOFT_PWR",
	};
	unsigned char reg;

	/* reset cause */
	str[0] = 0;
	if (!dm_i2c_read(dev, GSC_SC_RST_CAUSE, &reg, 1)) {
		if (reg < ARRAY_SIZE(names))
			sprintf(str, "%s", names[reg]);
		else
			sprintf(str, "0x%02x", reg);
	}

	/* thermal protection */
	if (!dm_i2c_read(dev, GSC_SC_THERM_PROTECT, &reg, 1)) {
		strcat(str, " Thermal Protection ");
		if (reg & BIT(0))
			strcat(str, "Enabled");
		else
			strcat(str, "Disabled");
	}

	return str;
}

/* display hardware monitor ADC channels */
int gsc_hwmon(void)
{
	const void *fdt = gd->fdt_blob;
	struct udevice *dev;
	int node, reg, mode, len, val, offset;
	const char *label;
	u8 buf[2];
	int ret;

	node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc");
	if (node <= 0)
		return node;

	/* probe device */
	dev = gsc_get_dev(GSC_BUSNO, GSC_HWMON_ADDR);
	if (!dev) {
		puts("ERROR: Failed to probe GSC HWMON\n");
		return -ENODEV;
	}

	/* iterate over hwmon nodes */
	node = fdt_first_subnode(fdt, node);
	while (node > 0) {
		reg = fdtdec_get_int(fdt, node, "reg", -1);
		mode = fdtdec_get_int(fdt, node, "gw,mode", -1);
		offset = fdtdec_get_int(fdt, node, "gw,voltage-offset-microvolt", 0);
		label = fdt_stringlist_get(fdt, node, "label", 0, NULL);

		if ((reg == -1) || (mode == -1) || !label)
			printf("invalid dt:%s\n", fdt_get_name(fdt, node, NULL));

		memset(buf, 0, sizeof(buf));
		ret = dm_i2c_read(dev, reg, buf, sizeof(buf));
		if (ret) {
			printf("i2c error: %d\n", ret);
			continue;
		}
		val = buf[0] | buf[1] << 8;
		if (val >= 0) {
			const u32 *div;
			int r[2];

			switch (mode) {
			case 0: /* temperature (C*10) */
				if (val > 0x8000)
					val -= 0xffff;
				printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10));
				break;
			case 1: /* prescaled voltage */
				if (val != 0xffff)
					printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
				break;
			case 2: /* scaled based on ref volt and resolution */
				val *= 2500;
				val /= 1 << 12;

				/* apply pre-scaler voltage divider */
				div  = fdt_getprop(fdt, node, "gw,voltage-divider-ohms", &len);
				if (div && (len == sizeof(uint32_t) * 2)) {
					r[0] = fdt32_to_cpu(div[0]);
					r[1] = fdt32_to_cpu(div[1]);
					if (r[0] && r[1]) {
						val *= (r[0] + r[1]);
						val /= r[1];
					}
				}

				/* adjust by offset */
				val += (offset / 1000);

				printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
				break;
			}
		}
		node = fdt_next_subnode(fdt, node);
	}

	return 0;
}

/* determine BOM revision from model */
int get_bom_rev(const char *str)
{
	int  rev_bom = 0;
	int i;

	for (i = strlen(str) - 1; i > 0; i--) {
		if (str[i] == '-')
			break;
		if (str[i] >= '1' && str[i] <= '9') {
			rev_bom = str[i] - '0';
			break;
		}
	}
	return rev_bom;
}

/* determine PCB revision from model */
char get_pcb_rev(const char *str)
{
	char rev_pcb = 'A';
	int i;

	for (i = strlen(str) - 1; i > 0; i--) {
		if (str[i] == '-')
			break;
		if (str[i] >= 'A') {
			rev_pcb = str[i];
			break;
		}
	}
	return rev_pcb;
}

/*
 * get dt name based on model and detail level:
 *
 * For boards that are a combination of a SoM plus a Baseboard:
 *   Venice SoM part numbers are GW70xx where xx is:
 *    7000-7019: same PCB with som dt of '0x'
 *    7020-7039: same PCB with som dt of '2x'
 *    7040-7059: same PCB with som dt of '4x'
 *    7060-7079: same PCB with som dt of '6x'
 *    7080-7099: same PCB with som dt of '8x'
 *   Venice Baseboard part numbers are GW7xxx where xxx is:
 *    7100-7199: same PCB with base dt of '71xx'
 *    7200-7299: same PCB with base dt of '72xx'
 *    7300-7399: same PCB with base dt of '73xx'
 *    7400-7499: same PCB with base dt of '74xx'
 *    7500-7599: same PCB with base dt of '75xx'
 *    7600-7699: same PCB with base dt of '76xx'
 *    7700-7799: same PCB with base dt of '77xx'
 *    7800-7899: same PCB with base dt of '78xx'
 *   DT name is comprised of:
 *    gw<base dt>-<som dt>-[base-pcb-rev][base-bom-rev][som-pcb-rev][som-bom-rev]
 *
 * For board models from 7900-7999 each PCB is unique with its own dt:
 *   DT name is comprised:
 *    gw<model>-[pcb-rev][bom-rev]
 *
 */
#define snprintfcat(dest, sz, fmt, ...) \
	snprintf((dest) + strlen(dest), (sz) - strlen(dest), fmt, ##__VA_ARGS__)
const char *gsc_get_dtb_name(int level, char *buf, int sz)
{
#ifdef CONFIG_IMX8MM
	const char *pre = "imx8mm-venice-gw";
#else
	const char *pre = "imx8mn-venice-gw";
#endif
	int model, rev_pcb, rev_bom;

	model = ((som_info.model[2] - '0') * 1000)
		+ ((som_info.model[3] - '0') * 100)
		+ ((som_info.model[4] - '0') * 10)
		+ (som_info.model[5] - '0');
	rev_pcb = tolower(get_pcb_rev(som_info.model));
	rev_bom = get_bom_rev(som_info.model);

	/* som + baseboard*/
	if (base_info.model[0]) {
		/* baseboard id: 7100-7199->71; 7200-7299->72; etc */
		int base = ((base_info.model[2] - '0') * 10) + (base_info.model[3] - '0');
		/* som id: 7000-7019->1; 7020-7039->2; etc */
		int som = ((model % 100) / 20) * 2;
		int rev_base_pcb = tolower(get_pcb_rev(base_info.model));
		int rev_base_bom = get_bom_rev(base_info.model);

		snprintf(buf, sz, "%s%2dxx-%dx", pre, base, som);
		switch (level) {
		case 0: /* full model (ie gw73xx-0x-a1a1) */
			if (rev_base_bom)
				snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
			else
				snprintfcat(buf, sz, "-%c", rev_base_pcb);
			if (rev_bom)
				snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
			else
				snprintfcat(buf, sz, "%c", rev_pcb);
			break;
		case 1: /* don't care about SoM revision */
			if (rev_base_bom)
				snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
			else
				snprintfcat(buf, sz, "-%c", rev_base_pcb);
			snprintfcat(buf, sz, "xx");
			break;
		case 2: /* don't care about baseboard revision */
			snprintfcat(buf, sz, "-xx");
			if (rev_bom)
				snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
			else
				snprintfcat(buf, sz, "%c", rev_pcb);
			break;
		case 3: /* don't care about SoM/baseboard revision */
			break;
		default:
			return NULL;
		}
	} else {
		snprintf(buf, sz, "%s%04d", pre, model);
		switch (level) {
		case 0: /* full model wth PCB and BOM revision first (ie gw7901-a1) */
			if (rev_bom)
				snprintfcat(buf, sz, "-%c%d", rev_pcb, rev_bom);
			else
				snprintfcat(buf, sz, "-%c", rev_pcb);
			break;
		case 1: /* don't care about BOM revision */
			snprintfcat(buf, sz, "-%c", rev_pcb);
			break;
		case 2: /* don't care about PCB or BOM revision */
			break;
		default:
			return NULL;
		}
	}

	return buf;
}

static int gsc_read(void)
{
	char rev_pcb;
	int rev_bom;
	int ret;

	ret = gsc_read_eeprom(GSC_BUSNO, GSC_EEPROM_ADDR, 1, &som_info);
	if (ret) {
		memset(&som_info, 0, sizeof(som_info));
		return ret;
	}

	/* read optional baseboard EEPROM */
	gsc_read_eeprom(BASEBOARD_EEPROM_BUSNO, BASEBOARD_EEPROM_ADDR,
			2, &base_info);

	/* create model strings */
	if (base_info.model[0]) {
		sprintf(venice_model, "GW%c%c%c%c-%c%c-",
			som_info.model[2], /* family */
			base_info.model[3], /* baseboard */
			base_info.model[4], base_info.model[5], /* subload of baseboard */
			som_info.model[4], som_info.model[5]); /* last 2digits of SOM */

		/* baseboard revision */
		rev_pcb = get_pcb_rev(base_info.model);
		rev_bom = get_bom_rev(base_info.model);
		if (rev_bom)
			sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
		else
			sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
		/* som revision */
		rev_pcb = get_pcb_rev(som_info.model);
		rev_bom = get_bom_rev(som_info.model);
		if (rev_bom)
			sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
		else
			sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
	} else {
		strcpy(venice_model, som_info.model);
	}
	venice_serial = som_info.serial;

	return 0;
}

static int gsc_info(int verbose)
{
	struct udevice *dev;
	unsigned char buf[16];

	printf("Model   : %s\n", venice_model);
	printf("Serial  : %d\n", som_info.serial);
	printf("MFGDate : %02x-%02x-%02x%02x\n",
	       som_info.mfgdate[0], som_info.mfgdate[1],
	       som_info.mfgdate[2], som_info.mfgdate[3]);
	if (base_info.model[0] && verbose > 1) {
		printf("SOM     : %s %d %02x-%02x-%02x%02x\n",
		       som_info.model, som_info.serial,
		       som_info.mfgdate[0], som_info.mfgdate[1],
		       som_info.mfgdate[2], som_info.mfgdate[3]);
		printf("BASE    : %s %d %02x-%02x-%02x%02x\n",
		       base_info.model, base_info.serial,
		       base_info.mfgdate[0], base_info.mfgdate[1],
		       base_info.mfgdate[2], base_info.mfgdate[3]);
	}

	/* Display RTC */
	puts("RTC     : ");
	dev = gsc_get_dev(GSC_BUSNO, GSC_RTC_ADDR);
	if (!dev) {
		puts("Failed to probe GSC RTC\n");
	} else {
		dm_i2c_read(dev, 0, buf, 6);
		printf("%d\n", buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24);
	}

	/* Display hwmon */
	gsc_hwmon();

	return 0;
}

int gsc_init(int quiet)
{
	unsigned char buf[16];
	struct udevice *dev;
	int ret;

	/*
	 * On a board with a missing/depleted backup battery for GSC, the
	 * board may be ready to probe the GSC before its firmware is
	 * running.  We will wait here indefinately for the GSC/EEPROM.
	 */
#ifdef CONFIG_IMX8MN
	// TODO:
	//   IMX8MN boots quicker than IMX8MM and exposes issue
	//   where because GSC I2C state machine isn't running and its
	//   SCL/SDA are driven low spams i2c errors
	//
	//   Put a loop here that somehow waits for I2C CLK/DAT to be high
	mdelay(40);
#endif
	while (1) {
		/* probe device */
		dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
		if (dev)
			break;
		mdelay(1);
	}

	ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
	if (ret) {
		puts("ERROR: Failed reading GSC\n");
		return ret;
	}
	gsc_read();

	/* banner */
	if (!quiet) {
		printf("GSC     : v%d 0x%04x", buf[GSC_SC_FWVER],
		       buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC + 1] << 8);
		printf(" RST:%s", gsc_get_rst_cause(dev));
		printf("\n");
		gsc_info(1);
	}

	if (ret)
		hang();

	return (16 << som_info.sdram_size);
}

const char *gsc_get_model(void)
{
	return venice_model;
}

uint32_t gsc_get_serial(void)
{
	return venice_serial;
}

#if !(IS_ENABLED(CONFIG_SPL_BUILD))
static int gsc_sleep(unsigned long secs)
{
	unsigned char reg;
	struct udevice *dev;
	int ret;

	/* probe device */
	dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
	if (!dev)
		return -ENODEV;

	printf("GSC Sleeping for %ld seconds\n", secs);
	reg = (secs >> 24) & 0xff;
	ret = dm_i2c_write(dev, 9, &reg, 1);
	if (ret)
		goto err;
	reg = (secs >> 16) & 0xff;
	ret = dm_i2c_write(dev, 8, &reg, 1);
	if (ret)
		goto err;
	reg = (secs >> 8) & 0xff;
	ret = dm_i2c_write(dev, 7, &reg, 1);
	if (ret)
		goto err;
	reg = secs & 0xff;
	ret = dm_i2c_write(dev, 6, &reg, 1);
	if (ret)
		goto err;
	ret = dm_i2c_read(dev, GSC_SC_CTRL1, &reg, 1);
	if (ret)
		goto err;
	reg |= (1 << 2);
	ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
	if (ret)
		goto err;
	reg &= ~(1 << 2);
	reg |= 0x3;
	ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
	if (ret)
		goto err;

	return 0;

err:
	printf("i2c error\n");
	return ret;
}

static int gsc_boot_wd_disable(void)
{
	u8 reg;
	struct udevice *dev;
	int ret;

	/* probe device */
	dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
	if (!dev)
		return -ENODEV;

	ret = dm_i2c_read(dev, GSC_SC_CTRL1, &reg, 1);
	if (ret)
		goto err;
	reg |= (1 << GSC_SC_CTRL1_WDDIS);
	reg &= ~(1 << GSC_SC_CTRL1_BOOT_CHK);
	ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
	if (ret)
		goto err;
	puts("GSC     : boot watchdog disabled\n");

	return 0;

err:
	printf("i2c error");
	return ret;
}

static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
{
	if (argc < 2)
		return gsc_info(2);

	if (strcasecmp(argv[1], "sleep") == 0) {
		if (argc < 3)
			return CMD_RET_USAGE;
		if (!gsc_sleep(dectoul(argv[2], NULL)))
			return CMD_RET_SUCCESS;
	} else if (strcasecmp(argv[1], "hwmon") == 0) {
		if (!gsc_hwmon())
			return CMD_RET_SUCCESS;
	} else if (strcasecmp(argv[1], "wd-disable") == 0) {
		if (!gsc_boot_wd_disable())
			return CMD_RET_SUCCESS;
	}

	return CMD_RET_USAGE;
}

U_BOOT_CMD(gsc, 4, 1, do_gsc, "Gateworks System Controller",
	   "[sleep <secs>]|[hwmon]|[wd-disable]\n");
#endif
Commit	Line	Data
03bf8436 TH	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* Copyright 2021 Gateworks Corporation
	4	*/
	5
	6	#include <common.h>
	7	#include <command.h>
	8	#include <hang.h>
	9	#include <hexdump.h>
	10	#include <i2c.h>
	11	#include <linux/delay.h>
	12	#include <dm/uclass.h>
	13
	14	#include "gsc.h"
	15
	16	DECLARE_GLOBAL_DATA_PTR;
	17
	18	struct venice_board_info som_info;
	19	struct venice_board_info base_info;
	20	char venice_model[32];
57d27aa9	21	uint32_t venice_serial;
03bf8436 TH	22
	23	/* return a mac address from EEPROM info */
	24	int gsc_getmac(int index, uint8_t *address)
	25	{
	26	int i, j;
	27	u32 maclow, machigh;
	28	u64 mac;
	29
	30	j = 0;
	31	if (som_info.macno) {
	32	maclow = som_info.mac[5];
	33	maclow \|= som_info.mac[4] << 8;
	34	maclow \|= som_info.mac[3] << 16;
	35	maclow \|= som_info.mac[2] << 24;
	36	machigh = som_info.mac[1];
	37	machigh \|= som_info.mac[0] << 8;
	38	mac = machigh;
	39	mac <<= 32;
	40	mac \|= maclow;
	41	for (i = 0; i < som_info.macno; i++, j++) {
	42	if (index == j)
	43	goto out;
	44	}
	45	}
	46
	47	maclow = base_info.mac[5];
	48	maclow \|= base_info.mac[4] << 8;
	49	maclow \|= base_info.mac[3] << 16;
	50	maclow \|= base_info.mac[2] << 24;
	51	machigh = base_info.mac[1];
	52	machigh \|= base_info.mac[0] << 8;
	53	mac = machigh;
	54	mac <<= 32;
	55	mac \|= maclow;
	56	for (i = 0; i < base_info.macno; i++, j++) {
	57	if (index == j)
	58	goto out;
	59	}
	60
	61	return -EINVAL;
	62
	63	out:
	64	mac += i;
	65	address[0] = (mac >> 40) & 0xff;
	66	address[1] = (mac >> 32) & 0xff;
	67	address[2] = (mac >> 24) & 0xff;
	68	address[3] = (mac >> 16) & 0xff;
	69	address[4] = (mac >> 8) & 0xff;
	70	address[5] = (mac >> 0) & 0xff;
	71
	72	return 0;
	73	}
	74
	75	/* System Controller registers */
	76	enum {
	77	GSC_SC_CTRL0 = 0,
	78	GSC_SC_CTRL1 = 1,
	79	GSC_SC_STATUS = 10,
	80	GSC_SC_FWCRC = 12,
	81	GSC_SC_FWVER = 14,
	82	GSC_SC_WP = 15,
	83	GSC_SC_RST_CAUSE = 16,
	84	GSC_SC_THERM_PROTECT = 19,
	85	};
86
87	/* System Controller Control1 bits */
88	enum {
89	GSC_SC_CTRL1_WDTIME = 4, /* 1 = 60s timeout, 0 = 30s timeout */
90	GSC_SC_CTRL1_WDEN = 5, /* 1 = enable, 0 = disable */
91	GSC_SC_CTRL1_BOOT_CHK = 6, /* 1 = enable alt boot check */
92	GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable boot watchdog */
93	};
94
95	/* System Controller Interrupt bits */
96	enum {
97	GSC_SC_IRQ_PB = 0, /* Pushbutton switch */
98	GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */
99	GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */
100	GSC_SC_IRQ_GPIO = 4, /* GPIO change */
101	GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */
102	GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */
103	GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */
104	};
105
106	/* System Controller WP bits */
107	enum {
108	GSC_SC_WP_ALL = 0, /* Write Protect All EEPROM regions */
109	GSC_SC_WP_BOARDINFO = 1, /* Write Protect Board Info region */
110	};
111
112	/* System Controller Reset Cause */
113	enum {
114	GSC_SC_RST_CAUSE_VIN = 0,
115	GSC_SC_RST_CAUSE_PB = 1,
116	GSC_SC_RST_CAUSE_WDT = 2,
117	GSC_SC_RST_CAUSE_CPU = 3,
118	GSC_SC_RST_CAUSE_TEMP_LOCAL = 4,
119	GSC_SC_RST_CAUSE_TEMP_REMOTE = 5,
120	GSC_SC_RST_CAUSE_SLEEP = 6,
121	GSC_SC_RST_CAUSE_BOOT_WDT = 7,
122	GSC_SC_RST_CAUSE_BOOT_WDT_MAN = 8,
123	GSC_SC_RST_CAUSE_SOFT_PWR = 9,
124	GSC_SC_RST_CAUSE_MAX = 10,
125	};
126
67c6d036	127	#include <dm/device.h>
03bf8436 TH	128	static struct udevice *gsc_get_dev(int busno, int slave)
03bf8436 TH	129	{
bb32c2a6	130	struct udevice dev, bus;
03bf8436 TH	131	int ret;
03bf8436 TH	132
67c6d036	133	ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus);
03bf8436	134	if (ret) {
bb32c2a6	135	printf("GSC : failed I2C%d probe: %d\n", busno, ret);
03bf8436 TH	136	return NULL;
03bf8436 TH	137	}
bb32c2a6 TH	138	ret = dm_i2c_probe(bus, slave, 0, &dev);
bb32c2a6 TH	139	if (ret)
03bf8436	140	return NULL;
03bf8436 TH	141
	142	return dev;
	143	}
	144
	145	static int gsc_read_eeprom(int bus, int slave, int alen, struct venice_board_info *info)
	146	{
	147	int i;
	148	int chksum;
	149	unsigned char buf = (unsigned char )info;
	150	struct udevice *dev;
	151	int ret;
	152
	153	/* probe device */
	154	dev = gsc_get_dev(bus, slave);
	155	if (!dev) {
	156	if (slave == GSC_EEPROM_ADDR)
	157	puts("ERROR: Failed to probe EEPROM\n");
	158	return -ENODEV;
	159	}
	160
	161	/* read eeprom config section */
	162	memset(info, 0, sizeof(*info));
	163	ret = i2c_set_chip_offset_len(dev, alen);
	164	if (ret) {
	165	puts("EEPROM: Failed to set alen\n");
	166	return ret;
	167	}
	168	ret = dm_i2c_read(dev, 0x00, buf, sizeof(*info));
	169	if (ret) {
	170	if (slave == GSC_EEPROM_ADDR)
	171	printf("EEPROM: Failed to read EEPROM\n");
	172	return ret;
	173	}
	174
	175	/* validate checksum */
	176	for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
	177	chksum += buf[i];
	178	if ((info->chksum[0] != chksum >> 8) \|\|
	179	(info->chksum[1] != (chksum & 0xff))) {
c4e56566	180	printf("EEPROM: I2C%d@0x%02x: Invalid Checksum\n", bus, slave);
03bf8436 TH	181	print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
	182	memset(info, 0, sizeof(*info));
	183	return -EINVAL;
	184	}
	185
	186	/* sanity check valid model */
	187	if (info->model[0] != 'G' \|\| info->model[1] != 'W') {
	188	printf("EEPROM: I2C%d@0x%02x: Invalid Model in EEPROM\n", bus, slave);
	189	print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
	190	memset(info, 0, sizeof(*info));
	191	return -EINVAL;
	192	}
	193
	194	return 0;
	195	}
	196
	197	static const char gsc_get_rst_cause(struct udevice dev)
	198	{
	199	static char str[64];
	200	static const char * const names[] = {
	201	"VIN",
	202	"PB",
	203	"WDT",
	204	"CPU",
	205	"TEMP_L",
	206	"TEMP_R",
	207	"SLEEP",
	208	"BOOT_WDT1",
	209	"BOOT_WDT2",
	210	"SOFT_PWR",
	211	};
	212	unsigned char reg;
	213
	214	/* reset cause */
	215	str[0] = 0;
	216	if (!dm_i2c_read(dev, GSC_SC_RST_CAUSE, &reg, 1)) {
	217	if (reg < ARRAY_SIZE(names))
	218	sprintf(str, "%s", names[reg]);
	219	else
	220	sprintf(str, "0x%02x", reg);
	221	}
	222
	223	/* thermal protection */
	224	if (!dm_i2c_read(dev, GSC_SC_THERM_PROTECT, &reg, 1)) {
d107235a TH	225	strcat(str, " Thermal Protection ");
	226	if (reg & BIT(0))
	227	strcat(str, "Enabled");
	228	else
	229	strcat(str, "Disabled");
03bf8436 TH	230	}
	231
	232	return str;
	233	}
	234
	235	/* display hardware monitor ADC channels */
	236	int gsc_hwmon(void)
	237	{
	238	const void *fdt = gd->fdt_blob;
	239	struct udevice *dev;
	240	int node, reg, mode, len, val, offset;
	241	const char *label;
	242	u8 buf[2];
	243	int ret;
	244
	245	node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc");
	246	if (node <= 0)
	247	return node;
	248
	249	/* probe device */
67c6d036	250	dev = gsc_get_dev(GSC_BUSNO, GSC_HWMON_ADDR);
03bf8436 TH	251	if (!dev) {
	252	puts("ERROR: Failed to probe GSC HWMON\n");
	253	return -ENODEV;
	254	}
	255
	256	/* iterate over hwmon nodes */
	257	node = fdt_first_subnode(fdt, node);
	258	while (node > 0) {
	259	reg = fdtdec_get_int(fdt, node, "reg", -1);
	260	mode = fdtdec_get_int(fdt, node, "gw,mode", -1);
	261	offset = fdtdec_get_int(fdt, node, "gw,voltage-offset-microvolt", 0);
	262	label = fdt_stringlist_get(fdt, node, "label", 0, NULL);
	263
	264	if ((reg == -1) \|\| (mode == -1) \|\| !label)
	265	printf("invalid dt:%s\n", fdt_get_name(fdt, node, NULL));
	266
	267	memset(buf, 0, sizeof(buf));
	268	ret = dm_i2c_read(dev, reg, buf, sizeof(buf));
	269	if (ret) {
	270	printf("i2c error: %d\n", ret);
	271	continue;
	272	}
	273	val = buf[0] \| buf[1] << 8;
	274	if (val >= 0) {
	275	const u32 *div;
	276	int r[2];
	277
	278	switch (mode) {
	279	case 0: /* temperature (C10) /
	280	if (val > 0x8000)
	281	val -= 0xffff;
	282	printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10));
	283	break;
	284	case 1: /* prescaled voltage */
	285	if (val != 0xffff)
	286	printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
	287	break;
	288	case 2: /* scaled based on ref volt and resolution */
	289	val *= 2500;
	290	val /= 1 << 12;
	291
	292	/* apply pre-scaler voltage divider */
	293	div = fdt_getprop(fdt, node, "gw,voltage-divider-ohms", &len);
	294	if (div && (len == sizeof(uint32_t) * 2)) {
	295	r[0] = fdt32_to_cpu(div[0]);
	296	r[1] = fdt32_to_cpu(div[1]);
	297	if (r[0] && r[1]) {
	298	val *= (r[0] + r[1]);
	299	val /= r[1];
	300	}
	301	}
	302
	303	/* adjust by offset */
658eb1ab	304	val += (offset / 1000);
03bf8436 TH	305
	306	printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
	307	break;
	308	}
	309	}
	310	node = fdt_next_subnode(fdt, node);
	311	}
	312
	313	return 0;
	314	}
	315
	316	/* determine BOM revision from model */
	317	int get_bom_rev(const char *str)
	318	{
	319	int rev_bom = 0;
	320	int i;
	321
	322	for (i = strlen(str) - 1; i > 0; i--) {
	323	if (str[i] == '-')
	324	break;
	325	if (str[i] >= '1' && str[i] <= '9') {
	326	rev_bom = str[i] - '0';
	327	break;
	328	}
	329	}
	330	return rev_bom;
	331	}
	332
	333	/* determine PCB revision from model */
	334	char get_pcb_rev(const char *str)
	335	{
	336	char rev_pcb = 'A';
	337	int i;
	338
	339	for (i = strlen(str) - 1; i > 0; i--) {
	340	if (str[i] == '-')
	341	break;
	342	if (str[i] >= 'A') {
	343	rev_pcb = str[i];
	344	break;
	345	}
	346	}
	347	return rev_pcb;
	348	}
	349
	350	/*
	351	* get dt name based on model and detail level:
	352	*
	353	* For boards that are a combination of a SoM plus a Baseboard:
	354	* Venice SoM part numbers are GW70xx where xx is:
	355	* 7000-7019: same PCB with som dt of '0x'
	356	* 7020-7039: same PCB with som dt of '2x'
	357	* 7040-7059: same PCB with som dt of '4x'
	358	* 7060-7079: same PCB with som dt of '6x'
	359	* 7080-7099: same PCB with som dt of '8x'
	360	* Venice Baseboard part numbers are GW7xxx where xxx is:
	361	* 7100-7199: same PCB with base dt of '71xx'
	362	* 7200-7299: same PCB with base dt of '72xx'
	363	* 7300-7399: same PCB with base dt of '73xx'
	364	* 7400-7499: same PCB with base dt of '74xx'
	365	* 7500-7599: same PCB with base dt of '75xx'
	366	* 7600-7699: same PCB with base dt of '76xx'
	367	* 7700-7799: same PCB with base dt of '77xx'
	368	* 7800-7899: same PCB with base dt of '78xx'
369	* DT name is comprised of:
370	* gw<base dt>-<som dt>-[base-pcb-rev][base-bom-rev][som-pcb-rev][som-bom-rev]
371	*
372	* For board models from 7900-7999 each PCB is unique with its own dt:
373	* DT name is comprised:
374	* gw<model>-[pcb-rev][bom-rev]
375	*
376	*/
377	#define snprintfcat(dest, sz, fmt, ...) \
378	snprintf((dest) + strlen(dest), (sz) - strlen(dest), fmt, ##__VA_ARGS__)
379	const char gsc_get_dtb_name(int level, char buf, int sz)
380	{
2cb156e1	381	#ifdef CONFIG_IMX8MM
03bf8436	382	const char *pre = "imx8mm-venice-gw";
2cb156e1 TH	383	#else
	384	const char *pre = "imx8mn-venice-gw";
	385	#endif
03bf8436 TH	386	int model, rev_pcb, rev_bom;
	387
	388	model = ((som_info.model[2] - '0') * 1000)
	389	+ ((som_info.model[3] - '0') * 100)
	390	+ ((som_info.model[4] - '0') * 10)
	391	+ (som_info.model[5] - '0');
	392	rev_pcb = tolower(get_pcb_rev(som_info.model));
	393	rev_bom = get_bom_rev(som_info.model);
	394
	395	/* som + baseboard*/
	396	if (base_info.model[0]) {
	397	/* baseboard id: 7100-7199->71; 7200-7299->72; etc */
	398	int base = ((base_info.model[2] - '0') * 10) + (base_info.model[3] - '0');
	399	/* som id: 7000-7019->1; 7020-7039->2; etc */
	400	int som = ((model % 100) / 20) * 2;
	401	int rev_base_pcb = tolower(get_pcb_rev(base_info.model));
	402	int rev_base_bom = get_bom_rev(base_info.model);
	403
	404	snprintf(buf, sz, "%s%2dxx-%dx", pre, base, som);
	405	switch (level) {
	406	case 0: /* full model (ie gw73xx-0x-a1a1) */
	407	if (rev_base_bom)
	408	snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
	409	else
	410	snprintfcat(buf, sz, "-%c", rev_base_pcb);
	411	if (rev_bom)
	412	snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
	413	else
	414	snprintfcat(buf, sz, "%c", rev_pcb);
	415	break;
	416	case 1: /* don't care about SoM revision */
	417	if (rev_base_bom)
	418	snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
	419	else
	420	snprintfcat(buf, sz, "-%c", rev_base_pcb);
	421	snprintfcat(buf, sz, "xx");
	422	break;
	423	case 2: /* don't care about baseboard revision */
	424	snprintfcat(buf, sz, "-xx");
	425	if (rev_bom)
	426	snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
	427	else
	428	snprintfcat(buf, sz, "%c", rev_pcb);
	429	break;
	430	case 3: /* don't care about SoM/baseboard revision */
	431	break;
	432	default:
	433	return NULL;
	434	}
	435	} else {
	436	snprintf(buf, sz, "%s%04d", pre, model);
	437	switch (level) {
	438	case 0: /* full model wth PCB and BOM revision first (ie gw7901-a1) */
	439	if (rev_bom)
	440	snprintfcat(buf, sz, "-%c%d", rev_pcb, rev_bom);
	441	else
	442	snprintfcat(buf, sz, "-%c", rev_pcb);
	443	break;
	444	case 1: /* don't care about BOM revision */
	445	snprintfcat(buf, sz, "-%c", rev_pcb);
	446	break;
	447	case 2: /* don't care about PCB or BOM revision */
	448	break;
	449	default:
450	return NULL;
451	}
452	}
453
454	return buf;
455	}
456
457	static int gsc_read(void)
458	{
57d27aa9 TH	459	char rev_pcb;
57d27aa9 TH	460	int rev_bom;
03bf8436 TH	461	int ret;
03bf8436 TH	462
67c6d036	463	ret = gsc_read_eeprom(GSC_BUSNO, GSC_EEPROM_ADDR, 1, &som_info);
03bf8436 TH	464	if (ret) {
	465	memset(&som_info, 0, sizeof(som_info));
	466	return ret;
	467	}
	468
	469	/* read optional baseboard EEPROM */
57d27aa9 TH	470	gsc_read_eeprom(BASEBOARD_EEPROM_BUSNO, BASEBOARD_EEPROM_ADDR,
57d27aa9 TH	471	2, &base_info);
03bf8436	472
57d27aa9 TH	473	/* create model strings */
57d27aa9 TH	474	if (base_info.model[0]) {
03bf8436 TH	475	sprintf(venice_model, "GW%c%c%c%c-%c%c-",
	476	som_info.model[2], /* family */
	477	base_info.model[3], /* baseboard */
	478	base_info.model[4], base_info.model[5], /* subload of baseboard */
	479	som_info.model[4], som_info.model[5]); /* last 2digits of SOM */
	480
	481	/* baseboard revision */
	482	rev_pcb = get_pcb_rev(base_info.model);
	483	rev_bom = get_bom_rev(base_info.model);
	484	if (rev_bom)
	485	sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
	486	else
	487	sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
	488	/* som revision */
	489	rev_pcb = get_pcb_rev(som_info.model);
	490	rev_bom = get_bom_rev(som_info.model);
	491	if (rev_bom)
	492	sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
	493	else
	494	sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
57d27aa9 TH	495	} else {
	496	strcpy(venice_model, som_info.model);
	497	}
	498	venice_serial = som_info.serial;
03bf8436	499
57d27aa9 TH	500	return 0;
	501	}
	502
	503	static int gsc_info(int verbose)
	504	{
	505	struct udevice *dev;
	506	unsigned char buf[16];
	507
	508	printf("Model : %s\n", venice_model);
	509	printf("Serial : %d\n", som_info.serial);
	510	printf("MFGDate : %02x-%02x-%02x%02x\n",
	511	som_info.mfgdate[0], som_info.mfgdate[1],
	512	som_info.mfgdate[2], som_info.mfgdate[3]);
	513	if (base_info.model[0] && verbose > 1) {
	514	printf("SOM : %s %d %02x-%02x-%02x%02x\n",
	515	som_info.model, som_info.serial,
03bf8436 TH	516	som_info.mfgdate[0], som_info.mfgdate[1],
03bf8436 TH	517	som_info.mfgdate[2], som_info.mfgdate[3]);
57d27aa9 TH	518	printf("BASE : %s %d %02x-%02x-%02x%02x\n",
	519	base_info.model, base_info.serial,
	520	base_info.mfgdate[0], base_info.mfgdate[1],
	521	base_info.mfgdate[2], base_info.mfgdate[3]);
03bf8436 TH	522	}
	523
	524	/* Display RTC */
	525	puts("RTC : ");
67c6d036	526	dev = gsc_get_dev(GSC_BUSNO, GSC_RTC_ADDR);
03bf8436 TH	527	if (!dev) {
	528	puts("Failed to probe GSC RTC\n");
	529	} else {
	530	dm_i2c_read(dev, 0, buf, 6);
	531	printf("%d\n", buf[0] \| buf[1] << 8 \| buf[2] << 16 \| buf[3] << 24);
	532	}
	533
9e4b38a1 TH	534	/* Display hwmon */
	535	gsc_hwmon();
	536
03bf8436 TH	537	return 0;
	538	}
	539
	540	int gsc_init(int quiet)
	541	{
	542	unsigned char buf[16];
	543	struct udevice *dev;
	544	int ret;
	545
	546	/*
	547	* On a board with a missing/depleted backup battery for GSC, the
	548	* board may be ready to probe the GSC before its firmware is
	549	* running. We will wait here indefinately for the GSC/EEPROM.
	550	*/
2cb156e1 TH	551	#ifdef CONFIG_IMX8MN
	552	// TODO:
	553	// IMX8MN boots quicker than IMX8MM and exposes issue
	554	// where because GSC I2C state machine isn't running and its
	555	// SCL/SDA are driven low spams i2c errors
	556	//
	557	// Put a loop here that somehow waits for I2C CLK/DAT to be high
	558	mdelay(40);
	559	#endif
03bf8436 TH	560	while (1) {
03bf8436 TH	561	/* probe device */
67c6d036	562	dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
03bf8436 TH	563	if (dev)
	564	break;
	565	mdelay(1);
	566	}
	567
	568	ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
	569	if (ret) {
	570	puts("ERROR: Failed reading GSC\n");
	571	return ret;
	572	}
	573	gsc_read();
	574
	575	/* banner */
	576	if (!quiet) {
	577	printf("GSC : v%d 0x%04x", buf[GSC_SC_FWVER],
	578	buf[GSC_SC_FWCRC] \| buf[GSC_SC_FWCRC + 1] << 8);
	579	printf(" RST:%s", gsc_get_rst_cause(dev));
	580	printf("\n");
	581	gsc_info(1);
	582	}
	583
	584	if (ret)
	585	hang();
	586
a1c71104	587	return (16 << som_info.sdram_size);
03bf8436 TH	588	}
	589
	590	const char *gsc_get_model(void)
	591	{
	592	return venice_model;
	593	}
	594
57d27aa9 TH	595	uint32_t gsc_get_serial(void)
	596	{
	597	return venice_serial;
	598	}
	599
03bf8436 TH	600	#if !(IS_ENABLED(CONFIG_SPL_BUILD))
	601	static int gsc_sleep(unsigned long secs)
	602	{
	603	unsigned char reg;
	604	struct udevice *dev;
	605	int ret;
	606
	607	/* probe device */
67c6d036	608	dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
03bf8436 TH	609	if (!dev)
	610	return -ENODEV;
	611
	612	printf("GSC Sleeping for %ld seconds\n", secs);
	613	reg = (secs >> 24) & 0xff;
	614	ret = dm_i2c_write(dev, 9, &reg, 1);
	615	if (ret)
	616	goto err;
	617	reg = (secs >> 16) & 0xff;
	618	ret = dm_i2c_write(dev, 8, &reg, 1);
	619	if (ret)
	620	goto err;
	621	reg = (secs >> 8) & 0xff;
	622	ret = dm_i2c_write(dev, 7, &reg, 1);
	623	if (ret)
	624	goto err;
	625	reg = secs & 0xff;
	626	ret = dm_i2c_write(dev, 6, &reg, 1);
	627	if (ret)
	628	goto err;
	629	ret = dm_i2c_read(dev, GSC_SC_CTRL1, &reg, 1);
	630	if (ret)
	631	goto err;
	632	reg \|= (1 << 2);
	633	ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
	634	if (ret)
	635	goto err;
	636	reg &= ~(1 << 2);
	637	reg \|= 0x3;
	638	ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
	639	if (ret)
	640	goto err;
	641
	642	return 0;
	643
	644	err:
	645	printf("i2c error\n");
	646	return ret;
	647	}
	648
	649	static int gsc_boot_wd_disable(void)
	650	{
	651	u8 reg;
	652	struct udevice *dev;
	653	int ret;
	654
	655	/* probe device */
67c6d036	656	dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
03bf8436 TH	657	if (!dev)
	658	return -ENODEV;
	659
	660	ret = dm_i2c_read(dev, GSC_SC_CTRL1, &reg, 1);
	661	if (ret)
	662	goto err;
	663	reg \|= (1 << GSC_SC_CTRL1_WDDIS);
	664	reg &= ~(1 << GSC_SC_CTRL1_BOOT_CHK);
	665	ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
	666	if (ret)
	667	goto err;
	668	puts("GSC : boot watchdog disabled\n");
	669
	670	return 0;
	671
	672	err:
	673	printf("i2c error");
	674	return ret;
	675	}
	676
	677	static int do_gsc(struct cmd_tbl cmdtp, int flag, int argc, char const argv[])
	678	{
	679	if (argc < 2)
	680	return gsc_info(2);
	681
	682	if (strcasecmp(argv[1], "sleep") == 0) {
	683	if (argc < 3)
	684	return CMD_RET_USAGE;
0b1284eb	685	if (!gsc_sleep(dectoul(argv[2], NULL)))
03bf8436 TH	686	return CMD_RET_SUCCESS;
	687	} else if (strcasecmp(argv[1], "hwmon") == 0) {
	688	if (!gsc_hwmon())
	689	return CMD_RET_SUCCESS;
	690	} else if (strcasecmp(argv[1], "wd-disable") == 0) {
	691	if (!gsc_boot_wd_disable())
	692	return CMD_RET_SUCCESS;
	693	}
	694
	695	return CMD_RET_USAGE;
	696	}
	697
	698	U_BOOT_CMD(gsc, 4, 1, do_gsc, "Gateworks System Controller",
	699	"[sleep <secs>]\|[hwmon]\|[wd-disable]\n");
	700	#endif