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Commit | Line | Data |
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37fc0ed2 RH |
1 | /* |
2 | * Copyright 2010-2011 Calxeda, Inc. | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
37fc0ed2 RH |
5 | */ |
6 | ||
7 | #include <common.h> | |
8 | #include <ahci.h> | |
bd0d90ef | 9 | #include <netdev.h> |
37fc0ed2 RH |
10 | #include <scsi.h> |
11 | ||
1ace4022 | 12 | #include <linux/sizes.h> |
877012df | 13 | #include <asm/io.h> |
37fc0ed2 | 14 | |
76c3999d RH |
15 | #define HB_AHCI_BASE 0xffe08000 |
16 | ||
083ffd65 | 17 | #define HB_SCU_A9_PWR_STATUS 0xfff10008 |
0c34e69f | 18 | #define HB_SREG_A9_PWR_REQ 0xfff3cf00 |
4a3ea216 | 19 | #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04 |
76c3999d | 20 | #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20 |
f8973325 | 21 | #define HB_SREG_A15_PWR_CTRL 0xfff3c200 |
76c3999d | 22 | |
0c34e69f RH |
23 | #define HB_PWR_SUSPEND 0 |
24 | #define HB_PWR_SOFT_RESET 1 | |
25 | #define HB_PWR_HARD_RESET 2 | |
26 | #define HB_PWR_SHUTDOWN 3 | |
27 | ||
76c3999d RH |
28 | #define PWRDOM_STAT_SATA 0x80000000 |
29 | #define PWRDOM_STAT_PCI 0x40000000 | |
30 | #define PWRDOM_STAT_EMMC 0x20000000 | |
31 | ||
083ffd65 RH |
32 | #define HB_SCU_A9_PWR_NORMAL 0 |
33 | #define HB_SCU_A9_PWR_DORMANT 2 | |
34 | #define HB_SCU_A9_PWR_OFF 3 | |
35 | ||
37fc0ed2 RH |
36 | DECLARE_GLOBAL_DATA_PTR; |
37 | ||
ef51c416 ML |
38 | void cphy_disable_overrides(void); |
39 | ||
37fc0ed2 RH |
40 | /* |
41 | * Miscellaneous platform dependent initialisations | |
42 | */ | |
43 | int board_init(void) | |
44 | { | |
45 | icache_enable(); | |
46 | ||
47 | return 0; | |
48 | } | |
49 | ||
9a420986 RH |
50 | /* We know all the init functions have been run now */ |
51 | int board_eth_init(bd_t *bis) | |
52 | { | |
53 | int rc = 0; | |
54 | ||
55 | #ifdef CONFIG_CALXEDA_XGMAC | |
56 | rc += calxedaxgmac_initialize(0, 0xfff50000); | |
57 | rc += calxedaxgmac_initialize(1, 0xfff51000); | |
58 | #endif | |
59 | return rc; | |
60 | } | |
61 | ||
b9463226 IC |
62 | #ifdef CONFIG_SCSI_AHCI_PLAT |
63 | void scsi_init(void) | |
37fc0ed2 | 64 | { |
76c3999d | 65 | u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); |
4a3ea216 | 66 | |
ef51c416 | 67 | cphy_disable_overrides(); |
76c3999d | 68 | if (reg & PWRDOM_STAT_SATA) { |
9efaca3e | 69 | ahci_init((void __iomem *)HB_AHCI_BASE); |
76c3999d RH |
70 | scsi_scan(1); |
71 | } | |
b9463226 IC |
72 | } |
73 | #endif | |
74 | ||
75 | #ifdef CONFIG_MISC_INIT_R | |
76 | int misc_init_r(void) | |
77 | { | |
78 | char envbuffer[16]; | |
79 | u32 boot_choice; | |
4a3ea216 RH |
80 | |
81 | boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff; | |
82 | sprintf(envbuffer, "bootcmd%d", boot_choice); | |
83 | if (getenv(envbuffer)) { | |
84 | sprintf(envbuffer, "run bootcmd%d", boot_choice); | |
85 | setenv("bootcmd", envbuffer); | |
86 | } else | |
87 | setenv("bootcmd", ""); | |
88 | ||
37fc0ed2 RH |
89 | return 0; |
90 | } | |
95395023 | 91 | #endif |
37fc0ed2 RH |
92 | |
93 | int dram_init(void) | |
94 | { | |
95 | gd->ram_size = SZ_512M; | |
96 | return 0; | |
97 | } | |
98 | ||
76c3999d | 99 | #if defined(CONFIG_OF_BOARD_SETUP) |
e895a4b0 | 100 | int ft_board_setup(void *fdt, bd_t *bd) |
76c3999d RH |
101 | { |
102 | static const char disabled[] = "disabled"; | |
103 | u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); | |
104 | ||
105 | if (!(reg & PWRDOM_STAT_SATA)) | |
106 | do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status", | |
107 | disabled, sizeof(disabled), 1); | |
108 | ||
109 | if (!(reg & PWRDOM_STAT_EMMC)) | |
110 | do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status", | |
111 | disabled, sizeof(disabled), 1); | |
e895a4b0 SG |
112 | |
113 | return 0; | |
76c3999d RH |
114 | } |
115 | #endif | |
116 | ||
f8973325 ML |
117 | static int is_highbank(void) |
118 | { | |
119 | uint32_t midr; | |
120 | ||
121 | asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr)); | |
122 | ||
123 | return (midr & 0xfff0) == 0xc090; | |
124 | } | |
125 | ||
37fc0ed2 RH |
126 | void reset_cpu(ulong addr) |
127 | { | |
0c34e69f | 128 | writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ); |
f8973325 ML |
129 | if (is_highbank()) |
130 | writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS); | |
131 | else | |
132 | writel(0x1, HB_SREG_A15_PWR_CTRL); | |
5bedf884 RH |
133 | |
134 | wfi(); | |
37fc0ed2 | 135 | } |
ef51c416 ML |
136 | |
137 | /* | |
138 | * turn off the override before transferring control to Linux, since Linux | |
139 | * may not support spread spectrum. | |
140 | */ | |
141 | void arch_preboot_os(void) | |
142 | { | |
143 | cphy_disable_overrides(); | |
144 | } |