]>
Commit | Line | Data |
---|---|---|
37fc0ed2 RH |
1 | /* |
2 | * Copyright 2010-2011 Calxeda, Inc. | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
37fc0ed2 RH |
5 | */ |
6 | ||
7 | #include <common.h> | |
8 | #include <ahci.h> | |
bd0d90ef | 9 | #include <netdev.h> |
37fc0ed2 RH |
10 | #include <scsi.h> |
11 | ||
1ace4022 | 12 | #include <linux/sizes.h> |
877012df | 13 | #include <asm/io.h> |
37fc0ed2 | 14 | |
76c3999d RH |
15 | #define HB_AHCI_BASE 0xffe08000 |
16 | ||
0c34e69f | 17 | #define HB_SREG_A9_PWR_REQ 0xfff3cf00 |
4a3ea216 | 18 | #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04 |
76c3999d RH |
19 | #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20 |
20 | ||
0c34e69f RH |
21 | #define HB_PWR_SUSPEND 0 |
22 | #define HB_PWR_SOFT_RESET 1 | |
23 | #define HB_PWR_HARD_RESET 2 | |
24 | #define HB_PWR_SHUTDOWN 3 | |
25 | ||
76c3999d RH |
26 | #define PWRDOM_STAT_SATA 0x80000000 |
27 | #define PWRDOM_STAT_PCI 0x40000000 | |
28 | #define PWRDOM_STAT_EMMC 0x20000000 | |
29 | ||
37fc0ed2 RH |
30 | DECLARE_GLOBAL_DATA_PTR; |
31 | ||
32 | /* | |
33 | * Miscellaneous platform dependent initialisations | |
34 | */ | |
35 | int board_init(void) | |
36 | { | |
37 | icache_enable(); | |
38 | ||
39 | return 0; | |
40 | } | |
41 | ||
9a420986 RH |
42 | /* We know all the init functions have been run now */ |
43 | int board_eth_init(bd_t *bis) | |
44 | { | |
45 | int rc = 0; | |
46 | ||
47 | #ifdef CONFIG_CALXEDA_XGMAC | |
48 | rc += calxedaxgmac_initialize(0, 0xfff50000); | |
49 | rc += calxedaxgmac_initialize(1, 0xfff51000); | |
50 | #endif | |
51 | return rc; | |
52 | } | |
53 | ||
b9463226 IC |
54 | #ifdef CONFIG_SCSI_AHCI_PLAT |
55 | void scsi_init(void) | |
37fc0ed2 | 56 | { |
76c3999d | 57 | u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); |
4a3ea216 | 58 | |
76c3999d RH |
59 | if (reg & PWRDOM_STAT_SATA) { |
60 | ahci_init(HB_AHCI_BASE); | |
61 | scsi_scan(1); | |
62 | } | |
b9463226 IC |
63 | } |
64 | #endif | |
65 | ||
66 | #ifdef CONFIG_MISC_INIT_R | |
67 | int misc_init_r(void) | |
68 | { | |
69 | char envbuffer[16]; | |
70 | u32 boot_choice; | |
4a3ea216 RH |
71 | |
72 | boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff; | |
73 | sprintf(envbuffer, "bootcmd%d", boot_choice); | |
74 | if (getenv(envbuffer)) { | |
75 | sprintf(envbuffer, "run bootcmd%d", boot_choice); | |
76 | setenv("bootcmd", envbuffer); | |
77 | } else | |
78 | setenv("bootcmd", ""); | |
79 | ||
37fc0ed2 RH |
80 | return 0; |
81 | } | |
95395023 | 82 | #endif |
37fc0ed2 RH |
83 | |
84 | int dram_init(void) | |
85 | { | |
86 | gd->ram_size = SZ_512M; | |
87 | return 0; | |
88 | } | |
89 | ||
90 | void dram_init_banksize(void) | |
91 | { | |
92 | gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; | |
93 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; | |
94 | } | |
95 | ||
76c3999d | 96 | #if defined(CONFIG_OF_BOARD_SETUP) |
e895a4b0 | 97 | int ft_board_setup(void *fdt, bd_t *bd) |
76c3999d RH |
98 | { |
99 | static const char disabled[] = "disabled"; | |
100 | u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); | |
101 | ||
102 | if (!(reg & PWRDOM_STAT_SATA)) | |
103 | do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status", | |
104 | disabled, sizeof(disabled), 1); | |
105 | ||
106 | if (!(reg & PWRDOM_STAT_EMMC)) | |
107 | do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status", | |
108 | disabled, sizeof(disabled), 1); | |
e895a4b0 SG |
109 | |
110 | return 0; | |
76c3999d RH |
111 | } |
112 | #endif | |
113 | ||
37fc0ed2 RH |
114 | void reset_cpu(ulong addr) |
115 | { | |
0c34e69f | 116 | writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ); |
5bedf884 RH |
117 | |
118 | wfi(); | |
37fc0ed2 | 119 | } |