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Commit | Line | Data |
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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
37fc0ed2 RH |
2 | /* |
3 | * Copyright 2010-2011 Calxeda, Inc. | |
37fc0ed2 RH |
4 | */ |
5 | ||
6 | #include <common.h> | |
7 | #include <ahci.h> | |
9edefc27 | 8 | #include <cpu_func.h> |
9fb625ce | 9 | #include <env.h> |
4d72caa5 | 10 | #include <fdt_support.h> |
90526e9f | 11 | #include <net.h> |
bd0d90ef | 12 | #include <netdev.h> |
37fc0ed2 RH |
13 | #include <scsi.h> |
14 | ||
1ace4022 | 15 | #include <linux/sizes.h> |
877012df | 16 | #include <asm/io.h> |
37fc0ed2 | 17 | |
76c3999d RH |
18 | #define HB_AHCI_BASE 0xffe08000 |
19 | ||
083ffd65 | 20 | #define HB_SCU_A9_PWR_STATUS 0xfff10008 |
0c34e69f | 21 | #define HB_SREG_A9_PWR_REQ 0xfff3cf00 |
4a3ea216 | 22 | #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04 |
76c3999d | 23 | #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20 |
f8973325 | 24 | #define HB_SREG_A15_PWR_CTRL 0xfff3c200 |
76c3999d | 25 | |
0c34e69f RH |
26 | #define HB_PWR_SUSPEND 0 |
27 | #define HB_PWR_SOFT_RESET 1 | |
28 | #define HB_PWR_HARD_RESET 2 | |
29 | #define HB_PWR_SHUTDOWN 3 | |
30 | ||
76c3999d RH |
31 | #define PWRDOM_STAT_SATA 0x80000000 |
32 | #define PWRDOM_STAT_PCI 0x40000000 | |
33 | #define PWRDOM_STAT_EMMC 0x20000000 | |
34 | ||
083ffd65 RH |
35 | #define HB_SCU_A9_PWR_NORMAL 0 |
36 | #define HB_SCU_A9_PWR_DORMANT 2 | |
37 | #define HB_SCU_A9_PWR_OFF 3 | |
38 | ||
37fc0ed2 RH |
39 | DECLARE_GLOBAL_DATA_PTR; |
40 | ||
ef51c416 ML |
41 | void cphy_disable_overrides(void); |
42 | ||
37fc0ed2 RH |
43 | /* |
44 | * Miscellaneous platform dependent initialisations | |
45 | */ | |
46 | int board_init(void) | |
47 | { | |
48 | icache_enable(); | |
49 | ||
50 | return 0; | |
51 | } | |
52 | ||
9a420986 RH |
53 | /* We know all the init functions have been run now */ |
54 | int board_eth_init(bd_t *bis) | |
55 | { | |
56 | int rc = 0; | |
57 | ||
58 | #ifdef CONFIG_CALXEDA_XGMAC | |
59 | rc += calxedaxgmac_initialize(0, 0xfff50000); | |
60 | rc += calxedaxgmac_initialize(1, 0xfff51000); | |
61 | #endif | |
62 | return rc; | |
63 | } | |
64 | ||
b9463226 IC |
65 | #ifdef CONFIG_SCSI_AHCI_PLAT |
66 | void scsi_init(void) | |
37fc0ed2 | 67 | { |
76c3999d | 68 | u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); |
4a3ea216 | 69 | |
ef51c416 | 70 | cphy_disable_overrides(); |
76c3999d | 71 | if (reg & PWRDOM_STAT_SATA) { |
9efaca3e | 72 | ahci_init((void __iomem *)HB_AHCI_BASE); |
8eab1a58 | 73 | scsi_scan(true); |
76c3999d | 74 | } |
b9463226 IC |
75 | } |
76 | #endif | |
77 | ||
78 | #ifdef CONFIG_MISC_INIT_R | |
79 | int misc_init_r(void) | |
80 | { | |
81 | char envbuffer[16]; | |
82 | u32 boot_choice; | |
4a3ea216 RH |
83 | |
84 | boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff; | |
85 | sprintf(envbuffer, "bootcmd%d", boot_choice); | |
00caae6d | 86 | if (env_get(envbuffer)) { |
4a3ea216 | 87 | sprintf(envbuffer, "run bootcmd%d", boot_choice); |
382bee57 | 88 | env_set("bootcmd", envbuffer); |
4a3ea216 | 89 | } else |
382bee57 | 90 | env_set("bootcmd", ""); |
4a3ea216 | 91 | |
37fc0ed2 RH |
92 | return 0; |
93 | } | |
95395023 | 94 | #endif |
37fc0ed2 RH |
95 | |
96 | int dram_init(void) | |
97 | { | |
98 | gd->ram_size = SZ_512M; | |
99 | return 0; | |
100 | } | |
101 | ||
76c3999d | 102 | #if defined(CONFIG_OF_BOARD_SETUP) |
e895a4b0 | 103 | int ft_board_setup(void *fdt, bd_t *bd) |
76c3999d RH |
104 | { |
105 | static const char disabled[] = "disabled"; | |
106 | u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); | |
107 | ||
108 | if (!(reg & PWRDOM_STAT_SATA)) | |
109 | do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status", | |
110 | disabled, sizeof(disabled), 1); | |
111 | ||
112 | if (!(reg & PWRDOM_STAT_EMMC)) | |
113 | do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status", | |
114 | disabled, sizeof(disabled), 1); | |
e895a4b0 SG |
115 | |
116 | return 0; | |
76c3999d RH |
117 | } |
118 | #endif | |
119 | ||
f8973325 ML |
120 | static int is_highbank(void) |
121 | { | |
122 | uint32_t midr; | |
123 | ||
124 | asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr)); | |
125 | ||
126 | return (midr & 0xfff0) == 0xc090; | |
127 | } | |
128 | ||
37fc0ed2 RH |
129 | void reset_cpu(ulong addr) |
130 | { | |
0c34e69f | 131 | writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ); |
f8973325 ML |
132 | if (is_highbank()) |
133 | writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS); | |
134 | else | |
135 | writel(0x1, HB_SREG_A15_PWR_CTRL); | |
5bedf884 RH |
136 | |
137 | wfi(); | |
37fc0ed2 | 138 | } |
ef51c416 ML |
139 | |
140 | /* | |
141 | * turn off the override before transferring control to Linux, since Linux | |
142 | * may not support spread spectrum. | |
143 | */ | |
144 | void arch_preboot_os(void) | |
145 | { | |
146 | cphy_disable_overrides(); | |
147 | } |