]>
Commit | Line | Data |
---|---|---|
2dab301c | 1 | /* |
6dd652fa WD |
2 | * (C) Copyright 2000 |
3 | * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au> | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
2dab301c | 7 | * |
6dd652fa WD |
8 | * This program is free software; you can redistribute it and/or |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
2dab301c WD |
22 | */ |
23 | ||
6dd652fa | 24 | /*************** DEFINES for Intel StrataFlash FLASH chip ********************/ |
2dab301c WD |
25 | |
26 | /* Commands */ | |
6dd652fa WD |
27 | #define ISF_CMD_RST 0xFF /* reset flash */ |
28 | #define ISF_CMD_RD_ID 0x90 /* read the id and lock bits */ | |
29 | #define ISF_CMD_RD_QUERY 0x98 /* read device capabilities */ | |
30 | #define ISF_CMD_RD_STAT 0x70 /* read the status register */ | |
31 | #define ISF_CMD_CLR_STAT 0x50 /* clear the staus register */ | |
32 | #define ISF_CMD_WR_BUF 0xE8 /* clear the staus register */ | |
33 | #define ISF_CMD_PROG 0x40 /* program word command */ | |
34 | #define ISF_CMD_ERASE1 0x20 /* 1st word for block erase */ | |
35 | #define ISF_CMD_ERASE2 0xD0 /* 2nd word for block erase */ | |
36 | #define ISF_CMD_ERASE_SUSP 0xB0 /* suspend block erase */ | |
37 | #define ISF_CMD_LOCK 0x60 /* 1st word for all lock cmds */ | |
38 | #define ISF_CMD_SET_LOCK_BLK 0x01 /* 2nd wrd set block lock bit */ | |
39 | #define ISF_CMD_SET_LOCK_MSTR 0xF1 /* 2nd wrd set master lck bit */ | |
40 | #define ISF_CMD_CLR_LOCK_BLK 0xD0 /* 2nd wrd clear blk lck bit */ | |
2dab301c WD |
41 | |
42 | /* status register bits */ | |
6dd652fa WD |
43 | #define ISF_STAT_DPS 0x02 /* Device Protect Status */ |
44 | #define ISF_STAT_VPPS 0x08 /* VPP Status */ | |
45 | #define ISF_STAT_PSLBS 0x10 /* Program+Set Lock Bit Stat */ | |
46 | #define ISF_STAT_ECLBS 0x20 /* Erase+Clr Lock Bit Stat */ | |
47 | #define ISF_STAT_ESS 0x40 /* Erase Suspend Status */ | |
48 | #define ISF_STAT_RDY 0x80 /* WSM Mach Status, 1=rdy */ | |
49 | ||
50 | #define ISF_STAT_ERR (ISF_STAT_VPPS | ISF_STAT_DPS | \ | |
51 | ISF_STAT_ECLBS | ISF_STAT_PSLBS) | |
52 | ||
53 | /* register addresses, valid only following an ISF_CMD_RD_ID command */ | |
54 | #define ISF_REG_MAN_CODE 0x00 /* manufacturer code */ | |
55 | #define ISF_REG_DEV_CODE 0x01 /* device code */ | |
56 | #define ISF_REG_BLK_LCK 0x02 /* block lock configuration */ | |
57 | #define ISF_REG_MST_LCK 0x03 /* master lock configuration */ | |
2dab301c WD |
58 | |
59 | /********************** DEFINES for Hymod Flash ******************************/ | |
60 | ||
61 | /* | |
6dd652fa WD |
62 | * this code requires that the flash on any Hymod board appear as a bank |
63 | * of two (identical) 16bit Intel StrataFlash chips with 64Kword erase | |
64 | * sectors (or blocks), running in x16 bit mode and connected side-by-side | |
65 | * to make a 32-bit wide bus. | |
2dab301c WD |
66 | */ |
67 | ||
6dd652fa WD |
68 | typedef unsigned long bank_word_t; |
69 | typedef bank_word_t bank_blk_t[64 * 1024]; | |
70 | ||
71 | #define BANK_FILL_WORD(b) (((bank_word_t)(b) << 16) | (bank_word_t)(b)) | |
72 | ||
73 | #ifdef EXAMPLE | |
2dab301c | 74 | |
6dd652fa | 75 | /* theoretically the following examples should also work */ |
2dab301c | 76 | |
6dd652fa WD |
77 | /* one flash chip in x8 mode with 128Kword sectors and 8bit bus */ |
78 | typedef unsigned char bank_word_t; | |
79 | typedef bank_word_t bank_blk_t[128 * 1024]; | |
80 | #define BANK_FILL_WORD(b) ((bank_word_t)(b)) | |
2dab301c | 81 | |
6dd652fa WD |
82 | /* four flash chips in x16 mode with 32Kword sectors and 64bit bus */ |
83 | typedef unsigned long long bank_word_t; | |
84 | typedef bank_word_t bank_blk_t[32 * 1024]; | |
85 | #define BANK_FILL_WORD(b) ( \ | |
86 | ((bank_word_t)(b) << 48) \ | |
87 | ((bank_word_t)(b) << 32) \ | |
88 | ((bank_word_t)(b) << 16) \ | |
89 | ((bank_word_t)(b) << 0) \ | |
90 | ) | |
91 | ||
92 | #endif /* EXAMPLE */ | |
93 | ||
94 | /* the sizes of these two types should probably be the same */ | |
592c5cab | 95 | typedef bank_word_t *bank_addr_t; |
6dd652fa | 96 | typedef unsigned long bank_size_t; |
2dab301c WD |
97 | |
98 | /* align bank addresses and sizes to bank word boundaries */ | |
99 | #define BANK_ADDR_WORD_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \ | |
6dd652fa WD |
100 | & ~(sizeof (bank_word_t) - 1))) |
101 | #define BANK_SIZE_WORD_ALIGN(s) (((bank_size_t)(s) + sizeof (bank_word_t) - 1) \ | |
102 | & ~(sizeof (bank_word_t) - 1)) | |
2dab301c WD |
103 | |
104 | /* align bank addresses and sizes to bank block boundaries */ | |
105 | #define BANK_ADDR_BLK_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \ | |
6dd652fa WD |
106 | & ~(sizeof (bank_blk_t) - 1))) |
107 | #define BANK_SIZE_BLK_ALIGN(s) (((bank_size_t)(s) + sizeof (bank_blk_t) - 1) \ | |
108 | & ~(sizeof (bank_blk_t) - 1)) | |
2dab301c WD |
109 | |
110 | /* add an offset to a bank address */ | |
6dd652fa WD |
111 | #define BANK_ADDR_OFFSET(a, o) ((bank_addr_t)((bank_size_t)(a) + \ |
112 | (bank_size_t)(o))) | |
2dab301c WD |
113 | |
114 | /* adjust a bank address to start of next word, block or bank */ | |
115 | #define BANK_ADDR_NEXT_WORD(a) BANK_ADDR_OFFSET(BANK_ADDR_WORD_ALIGN(a), \ | |
6dd652fa | 116 | sizeof (bank_word_t)) |
2dab301c | 117 | #define BANK_ADDR_NEXT_BLK(a) BANK_ADDR_OFFSET(BANK_ADDR_BLK_ALIGN(a), \ |
6dd652fa | 118 | sizeof (bank_blk_t)) |
2dab301c | 119 | |
6dd652fa WD |
120 | /* get bank address of register r given a bank base address a and block num b */ |
121 | #define BANK_ADDR_REG(a, b, r) BANK_ADDR_OFFSET(BANK_ADDR_OFFSET((a), \ | |
122 | (bank_size_t)(b) * sizeof (bank_blk_t)), \ | |
123 | (bank_size_t)(r) * sizeof (bank_word_t)) | |
2dab301c | 124 | |
6dd652fa | 125 | /* make a bank word value for each StrataFlash value */ |
2dab301c WD |
126 | |
127 | /* Commands */ | |
6dd652fa WD |
128 | #define BANK_CMD_RST BANK_FILL_WORD(ISF_CMD_RST) |
129 | #define BANK_CMD_RD_ID BANK_FILL_WORD(ISF_CMD_RD_ID) | |
130 | #define BANK_CMD_RD_STAT BANK_FILL_WORD(ISF_CMD_RD_STAT) | |
131 | #define BANK_CMD_CLR_STAT BANK_FILL_WORD(ISF_CMD_CLR_STAT) | |
132 | #define BANK_CMD_ERASE1 BANK_FILL_WORD(ISF_CMD_ERASE1) | |
133 | #define BANK_CMD_ERASE2 BANK_FILL_WORD(ISF_CMD_ERASE2) | |
134 | #define BANK_CMD_PROG BANK_FILL_WORD(ISF_CMD_PROG) | |
135 | #define BANK_CMD_LOCK BANK_FILL_WORD(ISF_CMD_LOCK) | |
136 | #define BANK_CMD_SET_LOCK_BLK BANK_FILL_WORD(ISF_CMD_SET_LOCK_BLK) | |
137 | #define BANK_CMD_SET_LOCK_MSTR BANK_FILL_WORD(ISF_CMD_SET_LOCK_MSTR) | |
138 | #define BANK_CMD_CLR_LOCK_BLK BANK_FILL_WORD(ISF_CMD_CLR_LOCK_BLK) | |
2dab301c WD |
139 | |
140 | /* status register bits */ | |
6dd652fa WD |
141 | #define BANK_STAT_DPS BANK_FILL_WORD(ISF_STAT_DPS) |
142 | #define BANK_STAT_PSS BANK_FILL_WORD(ISF_STAT_PSS) | |
143 | #define BANK_STAT_VPPS BANK_FILL_WORD(ISF_STAT_VPPS) | |
144 | #define BANK_STAT_PSLBS BANK_FILL_WORD(ISF_STAT_PSLBS) | |
145 | #define BANK_STAT_ECLBS BANK_FILL_WORD(ISF_STAT_ECLBS) | |
146 | #define BANK_STAT_ESS BANK_FILL_WORD(ISF_STAT_ESS) | |
147 | #define BANK_STAT_RDY BANK_FILL_WORD(ISF_STAT_RDY) | |
148 | ||
149 | #define BANK_STAT_ERR BANK_FILL_WORD(ISF_STAT_ERR) | |
150 | ||
151 | /* make a bank register address for each StrataFlash register address */ | |
152 | ||
153 | #define BANK_REG_MAN_CODE(a) BANK_ADDR_REG((a), 0, ISF_REG_MAN_CODE) | |
154 | #define BANK_REG_DEV_CODE(a) BANK_ADDR_REG((a), 0, ISF_REG_DEV_CODE) | |
155 | #define BANK_REG_BLK_LCK(a, b) BANK_ADDR_REG((a), (b), ISF_REG_BLK_LCK) | |
156 | #define BANK_REG_MST_LCK(a) BANK_ADDR_REG((a), 0, ISF_REG_MST_LCK) |