[thirdparty/u-boot.git] / board / imgtec / boston / ddr.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2016 Imagination Technologies
 */

#include <common.h>

#include <asm/io.h>

#include "boston-regs.h"

DECLARE_GLOBAL_DATA_PTR;

int dram_init(void)
{
	u32 ddrconf0 = __raw_readl((uint32_t *)BOSTON_PLAT_DDRCONF0);

	gd->ram_size = (phys_size_t)(ddrconf0 & BOSTON_PLAT_DDRCONF0_SIZE) <<
			30;

	return 0;
}

ulong board_get_usable_ram_top(ulong total_size)
{
	DECLARE_GLOBAL_DATA_PTR;

	if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) {
		/* 2GB wrapped around to 0 */
		return CKSEG0ADDR(256 << 20);
	}

	return min_t(unsigned long, gd->ram_top, CKSEG0ADDR(256 << 20));
}
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0
ad8783cb PB	2	/*
ad8783cb PB	3	* Copyright (C) 2016 Imagination Technologies
ad8783cb PB	4	*/
	5
	6	#include <common.h>
	7
	8	#include <asm/io.h>
	9
	10	#include "boston-regs.h"
	11
088454cd SG	12	DECLARE_GLOBAL_DATA_PTR;
088454cd SG	13
f1683aa7	14	int dram_init(void)
ad8783cb PB	15	{
	16	u32 ddrconf0 = __raw_readl((uint32_t *)BOSTON_PLAT_DDRCONF0);
	17
088454cd SG	18	gd->ram_size = (phys_size_t)(ddrconf0 & BOSTON_PLAT_DDRCONF0_SIZE) <<
	19	30;
	20
	21	return 0;
ad8783cb PB	22	}
	23
	24	ulong board_get_usable_ram_top(ulong total_size)
	25	{
	26	DECLARE_GLOBAL_DATA_PTR;
	27
	28	if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) {
	29	/* 2GB wrapped around to 0 */
	30	return CKSEG0ADDR(256 << 20);
	31	}
	32
	33	return min_t(unsigned long, gd->ram_top, CKSEG0ADDR(256 << 20));
	34	}