]>
Commit | Line | Data |
---|---|---|
2d5b561e | 1 | /* |
ba94a1bb WD |
2 | * (C) Copyright 2006 |
3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. | |
4 | * | |
2d5b561e WD |
5 | * (C) Copyright 2002 |
6 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net | |
7 | * | |
8 | * (C) Copyright 2002 | |
9 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
10 | * Marius Groeger <mgroeger@sysgo.de> | |
11 | * | |
12 | * See file CREDITS for list of people who contributed to this | |
13 | * project. | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU General Public License as | |
17 | * published by the Free Software Foundation; either version 2 of | |
18 | * the License, or (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, write to the Free Software | |
27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
28 | * MA 02111-1307 USA | |
29 | */ | |
30 | ||
2d5b561e | 31 | #include <common.h> |
ba94a1bb WD |
32 | #include <command.h> |
33 | #include <malloc.h> | |
10efa024 | 34 | #include <netdev.h> |
ba94a1bb | 35 | #include <asm/arch/ixp425.h> |
2d5b561e | 36 | |
d87080b7 | 37 | DECLARE_GLOBAL_DATA_PTR; |
2d5b561e WD |
38 | |
39 | /* | |
40 | * Miscelaneous platform dependent initialisations | |
41 | */ | |
289f932c | 42 | int board_init (void) |
2d5b561e | 43 | { |
2d5b561e | 44 | /* arch number of IXDP */ |
731215eb | 45 | gd->bd->bi_arch_number = MACH_TYPE_IXDP425; |
2d5b561e WD |
46 | |
47 | /* adress of boot parameters */ | |
48 | gd->bd->bi_boot_params = 0x00000100; | |
49 | ||
ba94a1bb WD |
50 | #ifdef CONFIG_IXDPG425 |
51 | /* arch number of IXDP */ | |
52 | gd->bd->bi_arch_number = MACH_TYPE_IXDPG425; | |
53 | ||
54 | /* | |
55 | * Get realtek RTL8305 switch and SLIC out of reset | |
56 | */ | |
6d0f6bcf JCPV |
57 | GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SWITCH_RESET_N); |
58 | GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SWITCH_RESET_N); | |
59 | GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SLIC_RESET_N); | |
60 | GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SLIC_RESET_N); | |
ba94a1bb WD |
61 | |
62 | /* | |
63 | * Setup GPIO's for PCI INTA & INTB | |
64 | */ | |
6d0f6bcf JCPV |
65 | GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA_N); |
66 | GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA_N); | |
67 | GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB_N); | |
68 | GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB_N); | |
ba94a1bb WD |
69 | |
70 | /* | |
71 | * Setup GPIO's for 33MHz clock output | |
72 | */ | |
73 | *IXP425_GPIO_GPCLKR = 0x01FF01FF; | |
6d0f6bcf JCPV |
74 | GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK); |
75 | GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK); | |
ba94a1bb WD |
76 | #endif |
77 | ||
2d5b561e WD |
78 | return 0; |
79 | } | |
80 | ||
ba94a1bb WD |
81 | /* |
82 | * Check Board Identity | |
83 | */ | |
84 | int checkboard(void) | |
85 | { | |
f0c0b3a9 WD |
86 | char buf[64]; |
87 | int i = getenv_f("serial#", buf, sizeof(buf)); | |
ba94a1bb WD |
88 | |
89 | #ifdef CONFIG_IXDPG425 | |
90 | puts("Board: IXDPG425 - Intel Network Gateway Reference Platform"); | |
91 | #else | |
92 | puts("Board: IXDP425 - Intel Development Platform"); | |
93 | #endif | |
94 | ||
f0c0b3a9 | 95 | if (i > 0) { |
ba94a1bb | 96 | puts(", serial# "); |
f0c0b3a9 | 97 | puts(buf); |
ba94a1bb WD |
98 | } |
99 | putc('\n'); | |
100 | ||
101 | return (0); | |
102 | } | |
289f932c WD |
103 | |
104 | int dram_init (void) | |
2d5b561e | 105 | { |
2d5b561e WD |
106 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
107 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; | |
108 | ||
109 | return (0); | |
110 | } | |
289f932c | 111 | |
c508a4ce | 112 | #if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI) |
a1191902 | 113 | extern struct pci_controller hose; |
3706ba1a | 114 | extern void pci_ixp_init(struct pci_controller * hose); |
289f932c | 115 | |
a1191902 WD |
116 | void pci_init_board(void) |
117 | { | |
289f932c WD |
118 | extern void pci_ixp_init (struct pci_controller *hose); |
119 | ||
a1191902 | 120 | pci_ixp_init(&hose); |
a1191902 | 121 | } |
ba94a1bb | 122 | #endif |
10efa024 BW |
123 | |
124 | int board_eth_init(bd_t *bis) | |
125 | { | |
126 | return pci_eth_init(bis); | |
127 | } |