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1/*
2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
4 *
5 * Based on imx27lite.c:
6 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
7 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
8 * And:
9 * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 *
26 */
27#include <common.h>
28#include <asm/io.h>
29#include <asm/arch/imx-regs.h>
30#include <asm/arch/imx25-pinmux.h>
c2205f4d 31#include <asm/gpio.h>
e6d9b978 32#include <asm/arch/sys_proto.h>
6895d451 33
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34DECLARE_GLOBAL_DATA_PTR;
35
36#ifdef CONFIG_FEC_MXC
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37#define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7)
38#define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)
6e2fbdea 39
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40void tx25_fec_init(void)
41{
42 struct iomuxc_mux_ctl *muxctl;
43 struct iomuxc_pad_ctl *padctl;
6895d451 44 u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
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45 u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode;
46
47 debug("tx25_fec_init\n");
48 /*
49 * fec pin init is generic
50 */
51 mx25_fec_init_pins();
52
53 /*
54 * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins.
55 *
56 * FEC_RESET_B: gpio4[7] is ALT 5 mode of pin D13
57 * FEC_ENABLE_B: gpio4[9] is ALT 5 mode of pin D11
58 */
59 muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
60 padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
61
62 writel(gpio_mux_mode, &muxctl->pad_d13);
63 writel(gpio_mux_mode, &muxctl->pad_d11);
64
65 writel(0x0, &padctl->pad_d13);
66 writel(0x0, &padctl->pad_d11);
67
68 /* drop PHY power and assert reset (low) */
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69 gpio_direction_output(GPIO_FEC_RESET_B, 0);
70 gpio_direction_output(GPIO_FEC_ENABLE_B, 0);
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71
72 mdelay(5);
73
74 debug("resetting phy\n");
75
76 /* turn on PHY power leaving reset asserted */
09891238 77 gpio_set_value(GPIO_FEC_ENABLE_B, 1);
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78
79 mdelay(10);
80
81 /*
82 * Setup some strapping pins that are latched by the PHY
83 * as reset goes high.
84 *
85 * Set PHY mode to 111
86 * mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5
87 * mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5
88 * mode2 is tied high so nothing to do
89 *
90 * Turn on RMII mode
91 * RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode
92 */
93 /*
94 * save three current mux modes and set each to gpio mode
95 */
96 saved_rdata0_mode = readl(&muxctl->pad_fec_rdata0);
97 saved_rdata1_mode = readl(&muxctl->pad_fec_rdata1);
98 saved_rx_dv_mode = readl(&muxctl->pad_fec_rx_dv);
99
100 writel(gpio_mux_mode, &muxctl->pad_fec_rdata0);
101 writel(gpio_mux_mode, &muxctl->pad_fec_rdata1);
102 writel(gpio_mux_mode, &muxctl->pad_fec_rx_dv);
103
104 /*
105 * set each to 1 and make each an output
106 */
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107 gpio_direction_output(IMX_GPIO_NR(3, 10), 1);
108 gpio_direction_output(IMX_GPIO_NR(3, 11), 1);
109 gpio_direction_output(IMX_GPIO_NR(3, 12), 1);
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110
111 mdelay(22); /* this value came from RedBoot */
112
113 /*
114 * deassert PHY reset
115 */
09891238 116 gpio_set_value(GPIO_FEC_RESET_B, 1);
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117
118 mdelay(5);
119
120 /*
121 * set FEC pins back
122 */
123 writel(saved_rdata0_mode, &muxctl->pad_fec_rdata0);
124 writel(saved_rdata1_mode, &muxctl->pad_fec_rdata1);
125 writel(saved_rx_dv_mode, &muxctl->pad_fec_rx_dv);
126}
127#else
128#define tx25_fec_init()
129#endif
130
131int board_init()
132{
133#ifdef CONFIG_MXC_UART
9aa720b1 134 mx25_uart1_init_pins();
6895d451 135#endif
87db58dc 136 /* board id for linux */
87db58dc 137 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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138 return 0;
139}
140
141int board_late_init(void)
142{
143 tx25_fec_init();
144 return 0;
145}
146
77f11a99 147int dram_init(void)
6895d451 148{
ab86f72c 149 /* dram_init must store complete ramsize in gd->ram_size */
a55d23cc 150 gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
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151 PHYS_SDRAM_1_SIZE);
152 return 0;
153}
6895d451 154
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155void dram_init_banksize(void)
156{
6895d451 157 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
a55d23cc 158 gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1,
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159 PHYS_SDRAM_1_SIZE);
160#if CONFIG_NR_DRAM_BANKS > 1
161 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
a55d23cc 162 gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2,
6895d451 163 PHYS_SDRAM_2_SIZE);
ab86f72c 164#else
6895d451 165
ab86f72c 166#endif
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167}
168
169int checkboard(void)
170{
171 printf("KARO TX25\n");
172 return 0;
173}