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FPGA: Add missing prototype
[people/ms/u-boot.git] / board / lart / lowlevel_init.S
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1/*
2 * Memory Setup stuff - taken from blob memsetup.S
3 *
4 * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
5 * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26
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27#include <config.h>
28#include <version.h>
29
30
31/* some parameters for the board */
32
33MEM_BASE: .long 0xa0000000
34MEM_START: .long 0xc0000000
35
36#define MDCNFG 0x00
37#define MDCAS0 0x04
38#define MDCAS1 0x08
39#define MDCAS2 0x0c
40#define MSC0 0x10
41#define MSC1 0x14
42#define MECR 0x18
43
44mdcas0: .long 0xc71c703f
45mdcas1: .long 0xffc71c71
46mdcas2: .long 0xffffffff
47/* mdcnfg: .long 0x0bb2bcbf */
48mdcnfg: .long 0x0334b22f @ alt
49/* mcs0: .long 0xfff8fff8 */
50msc0: .long 0xad8c4888 @ alt
51mecr: .long 0x00060006
52/* mecr: .long 0x994a994a @ alt */
53
54/* setting up the memory */
55
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56.globl lowlevel_init
57lowlevel_init:
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58 ldr r0, MEM_BASE
59
60 /* Setup the flash memory */
61 ldr r1, msc0
62 str r1, [r0, #MSC0]
63
64 /* Set up the DRAM */
65
66 /* MDCAS0 */
67 ldr r1, mdcas0
68 str r1, [r0, #MDCAS0]
69
70 /* MDCAS1 */
71 ldr r1, mdcas1
72 str r1, [r0, #MDCAS1]
73
74 /* MDCAS2 */
75 ldr r1, mdcas2
76 str r1, [r0, #MDCAS2]
77
78 /* MDCNFG */
79 ldr r1, mdcnfg
80 str r1, [r0, #MDCNFG]
81
82 /* Set up PCMCIA space */
83 ldr r1, mecr
84 str r1, [r0, #MECR]
85
86 /* Load something to activate bank */
87 ldr r1, MEM_START
88
89.rept 8
90 ldr r0, [r1]
91.endr
92
93 /* everything is fine now */
94 mov pc, lr