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7379f45a DB |
1 | /* |
2 | * (C) Copyright 2004-2008 | |
3 | * Texas Instruments, <www.ti.com> | |
4 | * | |
5 | * Author : | |
6 | * Nishanth Menon <nm@ti.com> | |
7 | * | |
8 | * Derived from Beagle Board and 3430 SDP code by | |
9 | * Sunil Kumar <sunilsaini05@gmail.com> | |
10 | * Shashi Ranjan <shashiranjanmca05@gmail.com> | |
11 | * Richard Woodruff <r-woodruff2@ti.com> | |
12 | * Syed Mohammed Khasim <khasim@ti.com> | |
13 | * | |
14 | * | |
1a459660 | 15 | * SPDX-License-Identifier: GPL-2.0+ |
7379f45a DB |
16 | */ |
17 | #include <common.h> | |
1ab70f6f | 18 | #include <netdev.h> |
cd782635 | 19 | #include <twl4030.h> |
7379f45a | 20 | #include <asm/io.h> |
d6906cb8 | 21 | #include <asm/arch/mmc_host_def.h> |
7379f45a DB |
22 | #include <asm/arch/mux.h> |
23 | #include <asm/arch/sys_proto.h> | |
24 | #include <asm/mach-types.h> | |
25 | #include "zoom1.h" | |
26 | ||
29565326 JR |
27 | DECLARE_GLOBAL_DATA_PTR; |
28 | ||
58911517 | 29 | /* |
7379f45a DB |
30 | * Routine: board_init |
31 | * Description: Early hardware init. | |
58911517 | 32 | */ |
7379f45a DB |
33 | int board_init(void) |
34 | { | |
7379f45a DB |
35 | gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ |
36 | /* board id for Linux */ | |
37 | gd->bd->bi_arch_number = MACH_TYPE_OMAP_LDP; | |
38 | /* boot param addr */ | |
39 | gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); | |
40 | ||
41 | return 0; | |
42 | } | |
43 | ||
58911517 | 44 | /* |
7379f45a DB |
45 | * Routine: misc_init_r |
46 | * Description: Configure zoom board specific configurations | |
58911517 | 47 | */ |
7379f45a DB |
48 | int misc_init_r(void) |
49 | { | |
2c155130 | 50 | twl4030_power_init(); |
ead39d7a | 51 | twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); |
e6a6a704 | 52 | dieid_num_r(); |
cd782635 TR |
53 | |
54 | /* | |
55 | * Board Reset | |
56 | * The board is reset by holding the red button on the | |
57 | * top right front face for eight seconds. | |
58 | */ | |
59 | twl4030_power_reset_init(); | |
60 | ||
7379f45a DB |
61 | return 0; |
62 | } | |
63 | ||
58911517 | 64 | /* |
7379f45a DB |
65 | * Routine: set_muxconf_regs |
66 | * Description: Setting up the configuration Mux registers specific to the | |
67 | * hardware. Many pins need to be moved from protect to primary | |
68 | * mode. | |
58911517 | 69 | */ |
7379f45a DB |
70 | void set_muxconf_regs(void) |
71 | { | |
72 | /* platform specific muxes */ | |
73 | MUX_ZOOM1_MDK(); | |
74 | } | |
1ab70f6f | 75 | |
d6906cb8 TR |
76 | #ifdef CONFIG_GENERIC_MMC |
77 | int board_mmc_init(bd_t *bis) | |
78 | { | |
e3913f56 | 79 | return omap_mmc_init(0, 0, 0, -1, -1); |
d6906cb8 TR |
80 | } |
81 | #endif | |
82 | ||
1ab70f6f BW |
83 | #ifdef CONFIG_CMD_NET |
84 | int board_eth_init(bd_t *bis) | |
85 | { | |
86 | int rc = 0; | |
87 | #ifdef CONFIG_LAN91C96 | |
88 | rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE); | |
89 | #endif | |
90 | return rc; | |
91 | } | |
92 | #endif |