[people/ms/u-boot.git] / board / lwmon / flash.c

/*
 * (C) Copyright 2001
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/* #define DEBUG */

#include <common.h>
#include <mpc8xx.h>

#if defined(CONFIG_ENV_IS_IN_FLASH)
# ifndef  CONFIG_ENV_ADDR
#  define CONFIG_ENV_ADDR	(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
# endif
# ifndef  CONFIG_ENV_SIZE
#  define CONFIG_ENV_SIZE	CONFIG_ENV_SECT_SIZE
# endif
# ifndef  CONFIG_ENV_SECT_SIZE
#  define CONFIG_ENV_SECT_SIZE  CONFIG_ENV_SIZE
# endif
#endif

/*---------------------------------------------------------------------*/

flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips	*/

/*-----------------------------------------------------------------------
 * Functions
 */
static ulong flash_get_size (vu_long *addr, flash_info_t *info);
static int write_data (flash_info_t *info, ulong dest, ulong data);
#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
static int write_data_buf (flash_info_t * info, ulong dest, uchar * cp, int len);
#endif
static void flash_get_offsets (ulong base, flash_info_t *info);

/*-----------------------------------------------------------------------
 */

unsigned long flash_init (void)
{
	volatile immap_t     *immap  = (immap_t *)CONFIG_SYS_IMMR;
	volatile memctl8xx_t *memctl = &immap->im_memctl;
	unsigned long size_b0, size_b1;
	int i;

	/* Init: no FLASHes known */
	for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
		flash_info[i].flash_id = FLASH_UNKNOWN;
	}

	/* Static FLASH Bank configuration here - FIXME XXX */

	debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);

	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);

	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
		printf ("## Unknown FLASH on Bank 0: "
			"ID 0x%lx, Size = 0x%08lx = %ld MB\n",
			flash_info[0].flash_id,
			size_b0, size_b0<<20);
	}

	debug ("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE1_PRELIM);

	size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);

	debug ("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);

	if (size_b1 > size_b0) {
		printf ("## ERROR: "
			"Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
			size_b1, size_b1<<20,
			size_b0, size_b0<<20
		);
		flash_info[0].flash_id	= FLASH_UNKNOWN;
		flash_info[1].flash_id	= FLASH_UNKNOWN;
		flash_info[0].sector_count	= -1;
		flash_info[1].sector_count	= -1;
		flash_info[0].size		= 0;
		flash_info[1].size		= 0;
		return (0);
	}

	debug  ("## Before remap: "
		"BR0: 0x%08x    OR0: 0x%08x    "
		"BR1: 0x%08x    OR1: 0x%08x\n",
		memctl->memc_br0, memctl->memc_or0,
		memctl->memc_br1, memctl->memc_or1);

	/* Remap FLASH according to real size */
	memctl->memc_or0 = (-size_b0 & 0xFFFF8000) | CONFIG_SYS_OR_TIMING_FLASH |
				OR_CSNT_SAM | OR_ACS_DIV1;
	memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_PS_32 | BR_V;

	debug ("## BR0: 0x%08x    OR0: 0x%08x\n",
		memctl->memc_br0, memctl->memc_or0);

	/* Re-do sizing to get full correct info */
	size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);

	flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);

	flash_info[0].size = size_b0;

#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
	/* monitor protection ON by default */
	flash_protect(FLAG_PROTECT_SET,
		      CONFIG_SYS_MONITOR_BASE,
		      CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
		      &flash_info[0]);
#endif

#ifdef	CONFIG_ENV_IS_IN_FLASH
	/* ENV protection ON by default */
	flash_protect(FLAG_PROTECT_SET,
		      CONFIG_ENV_ADDR,
		      CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
		      &flash_info[0]);
#endif

	if (size_b1) {
		memctl->memc_or1 = (-size_b1 & 0xFFFF8000) | CONFIG_SYS_OR_TIMING_FLASH |
					OR_CSNT_SAM | OR_ACS_DIV1;
		memctl->memc_br1 = ((CONFIG_SYS_FLASH_BASE + size_b0) & BR_BA_MSK) |
					BR_PS_32 | BR_V;

		debug ("## BR1: 0x%08x    OR1: 0x%08x\n",
			memctl->memc_br1, memctl->memc_or1);

		/* Re-do sizing to get full correct info */
		size_b1 = flash_get_size((vu_long *)(CONFIG_SYS_FLASH_BASE + size_b0),
					  &flash_info[1]);

		flash_info[1].size = size_b1;

		flash_get_offsets (CONFIG_SYS_FLASH_BASE + size_b0, &flash_info[1]);

#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
		/* monitor protection ON by default */
		flash_protect(FLAG_PROTECT_SET,
			      CONFIG_SYS_MONITOR_BASE,
			      CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
			      &flash_info[1]);
#endif

#ifdef	CONFIG_ENV_IS_IN_FLASH
		/* ENV protection ON by default */
		flash_protect(FLAG_PROTECT_SET,
			      CONFIG_ENV_ADDR,
			      CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
			      &flash_info[1]);
#endif
	} else {
		memctl->memc_br1 = 0;		/* invalidate bank */
		memctl->memc_or1 = 0;		/* invalidate bank */

		debug ("## DISABLE BR1: 0x%08x    OR1: 0x%08x\n",
			memctl->memc_br1, memctl->memc_or1);

		flash_info[1].flash_id = FLASH_UNKNOWN;
		flash_info[1].sector_count = -1;
		flash_info[1].size = 0;
	}

	debug ("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);

	return (size_b0 + size_b1);
}

/*-----------------------------------------------------------------------
 */
static void flash_get_offsets (ulong base, flash_info_t *info)
{
	int i;

	if (info->flash_id == FLASH_UNKNOWN) {
		return;
	}

	switch (info->flash_id & FLASH_VENDMASK) {
	case FLASH_MAN_INTEL:
	    for (i = 0; i < info->sector_count; i++) {
		info->start[i] = base;
		base += 0x00020000 * 2;		/* 128k * 2 chips per bank */
	    }
	    return;

	default:
	    printf ("Don't know sector ofsets for flash type 0x%lx\n",
		info->flash_id);
	    return;
	}
}

/*-----------------------------------------------------------------------
 */
void flash_print_info  (flash_info_t *info)
{
	int i;

	if (info->flash_id == FLASH_UNKNOWN) {
		printf ("missing or unknown FLASH type\n");
		return;
	}

	switch (info->flash_id & FLASH_VENDMASK) {
	case FLASH_MAN_AMD:	printf ("AMD ");		break;
	case FLASH_MAN_FUJ:	printf ("Fujitsu ");		break;
	case FLASH_MAN_SST:	printf ("SST ");		break;
	case FLASH_MAN_STM:	printf ("STM ");		break;
	case FLASH_MAN_INTEL:	printf ("Intel ");		break;
	case FLASH_MAN_MT:	printf ("MT ");			break;
	default:		printf ("Unknown Vendor ");	break;
	}

	switch (info->flash_id & FLASH_TYPEMASK) {
	case FLASH_28F320J3A:	printf ("28F320J3A (32Mbit = 128K x 32)\n");
				break;
	case FLASH_28F640J3A:	printf ("28F640J3A (64Mbit = 128K x 64)\n");
				break;
	case FLASH_28F128J3A:	printf ("28F128J3A (128Mbit = 128K x 128)\n");
				break;
	default:		printf ("Unknown Chip Type\n");
				break;
	}

	if (info->size >= (1 << 20)) {
		i = 20;
	} else {
		i = 10;
	}
	printf ("  Size: %ld %cB in %d Sectors\n",
		info->size >> i,
		(i == 20) ? 'M' : 'k',
		info->sector_count);

	printf ("  Sector Start Addresses:");
	for (i=0; i<info->sector_count; ++i) {
		if ((i % 5) == 0)
			printf ("\n   ");
		printf (" %08lX%s",
			info->start[i],
			info->protect[i] ? " (RO)" : "     "
		);
	}
	printf ("\n");
	return;
}

/*-----------------------------------------------------------------------
 */


/*-----------------------------------------------------------------------
 */

/*
 * The following code cannot be run from FLASH!
 */

static ulong flash_get_size (vu_long *addr, flash_info_t *info)
{
	ulong value;

	/* Read Manufacturer ID */
	addr[0] = 0x00900090;
	value = addr[0];

	debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);

	switch (value) {
	case AMD_MANUFACT:
		info->flash_id = FLASH_MAN_AMD;
		break;
	case FUJ_MANUFACT:
		info->flash_id = FLASH_MAN_FUJ;
		break;
	case SST_MANUFACT:
		info->flash_id = FLASH_MAN_SST;
		break;
	case STM_MANUFACT:
		info->flash_id = FLASH_MAN_STM;
		break;
	case INTEL_MANUFACT:
		info->flash_id = FLASH_MAN_INTEL;
		break;
	default:
		info->flash_id = FLASH_UNKNOWN;
		info->sector_count = 0;
		info->size = 0;
		addr[0] = 0x00FF00FF;		/* restore read mode */
		return (0);			/* no or unknown flash	*/
	}

	value = addr[1];			/* device ID		*/

	debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);

	switch (value) {
	case INTEL_ID_28F320J3A:
		info->flash_id += FLASH_28F320J3A;
		info->sector_count = 32;
		info->size = 0x00400000 * 2;
		break;				/* =>  8 MB		*/

	case INTEL_ID_28F640J3A:
		info->flash_id += FLASH_28F640J3A;
		info->sector_count = 64;
		info->size = 0x00800000 * 2;
		break;				/* => 16 MB		*/

	case INTEL_ID_28F128J3A:
		info->flash_id += FLASH_28F128J3A;
		info->sector_count = 128;
		info->size = 0x01000000 * 2;
		break;				/* => 32 MB		*/

	default:
		info->flash_id = FLASH_UNKNOWN;
		addr[0] = 0x00FF00FF;		/* restore read mode */
		return (0);			/* => no or unknown flash */

	}

	if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
		printf ("** ERROR: sector count %d > max (%d) **\n",
			info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
		info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
	}

	addr[0] = 0x00FF00FF;		/* restore read mode */

	return (info->size);
}


/*-----------------------------------------------------------------------
 */

int	flash_erase (flash_info_t *info, int s_first, int s_last)
{
	int flag, prot, sect;
	ulong start, now, last;

	debug ("flash_erase: first: %d last: %d\n", s_first, s_last);

	if ((s_first < 0) || (s_first > s_last)) {
		if (info->flash_id == FLASH_UNKNOWN) {
			printf ("- missing\n");
		} else {
			printf ("- no sectors to erase\n");
		}
		return 1;
	}

	if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
		printf ("Can erase only Intel flash types - aborted\n");
		return 1;
	}

	prot = 0;
	for (sect=s_first; sect<=s_last; ++sect) {
		if (info->protect[sect]) {
			prot++;
		}
	}

	if (prot) {
		printf ("- Warning: %d protected sectors will not be erased!\n",
			prot);
	} else {
		printf ("\n");
	}

	start = get_timer (0);
	last  = start;
	/* Start erase on unprotected sectors */
	for (sect = s_first; sect<=s_last; sect++) {
		if (info->protect[sect] == 0) {	/* not protected */
			vu_long *addr = (vu_long *)(info->start[sect]);
			unsigned long status;

			/* Disable interrupts which might cause a timeout here */
			flag = disable_interrupts();

			*addr = 0x00600060;	/* clear lock bit setup */
			*addr = 0x00D000D0;	/* clear lock bit confirm */

			udelay (1000);
			/* This takes awfully long - up to 50 ms and more */
			while (((status = *addr) & 0x00800080) != 0x00800080) {
				if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
					printf ("Timeout\n");
					*addr = 0x00FF00FF; /* reset to read mode */
					return 1;
				}

				/* show that we're waiting */
				if ((now - last) > 1000) {	/* every second */
					putc ('.');
					last = now;
				}
				udelay (1000);	/* to trigger the watchdog */
			}

			*addr = 0x00500050;	/* clear status register */
			*addr = 0x00200020;	/* erase setup */
			*addr = 0x00D000D0;	/* erase confirm */

			/* re-enable interrupts if necessary */
			if (flag)
				enable_interrupts();

			/* wait at least 80us - let's wait 1 ms */
			udelay (1000);

			while (((status = *addr) & 0x00800080) != 0x00800080) {
				if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
					printf ("Timeout\n");
					*addr = 0x00B000B0; /* suspend erase	  */
					*addr = 0x00FF00FF; /* reset to read mode */
					return 1;
				}

				/* show that we're waiting */
				if ((now - last) > 1000) {	/* every second */
					putc ('.');
					last = now;
				}
				udelay (1000);	/* to trigger the watchdog */
			}

			*addr = 0x00FF00FF;	/* reset to read mode */
		}
	}
	printf (" done\n");
	return 0;
}

/*-----------------------------------------------------------------------
 * Copy memory to flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 * 4 - Flash not identified
 */

#define	FLASH_WIDTH	4	/* flash bus width in bytes */

int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
	ulong cp, wp, data;
	int i, l, rc;

	if (info->flash_id == FLASH_UNKNOWN) {
		return 4;
	}

	wp = (addr & ~(FLASH_WIDTH-1));	/* get lower FLASH_WIDTH aligned address */

	/*
	 * handle unaligned start bytes
	 */
	if ((l = addr - wp) != 0) {
		data = 0;
		for (i=0, cp=wp; i<l; ++i, ++cp) {
			data = (data << 8) | (*(uchar *)cp);
		}
		for (; i<FLASH_WIDTH && cnt>0; ++i) {
			data = (data << 8) | *src++;
			--cnt;
			++cp;
		}
		for (; cnt==0 && i<FLASH_WIDTH; ++i, ++cp) {
			data = (data << 8) | (*(uchar *)cp);
		}

		if ((rc = write_data(info, wp, data)) != 0) {
			return (rc);
		}
		wp += FLASH_WIDTH;
	}

	/*
	 * handle FLASH_WIDTH aligned part
	 */
#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
	while(cnt >= FLASH_WIDTH) {
		i = CONFIG_SYS_FLASH_BUFFER_SIZE > cnt ?
		    (cnt & ~(FLASH_WIDTH - 1)) : CONFIG_SYS_FLASH_BUFFER_SIZE;
		if((rc = write_data_buf(info, wp, src,i)) != 0)
			return rc;
		wp += i;
		src += i;
		cnt -=i;
	}
#else
	while (cnt >= FLASH_WIDTH) {
		data = 0;
		for (i=0; i<FLASH_WIDTH; ++i) {
			data = (data << 8) | *src++;
		}
		if ((rc = write_data(info, wp, data)) != 0) {
			return (rc);
		}
		wp  += FLASH_WIDTH;
		cnt -= FLASH_WIDTH;
	}
#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */

	if (cnt == 0) {
		return (0);
	}

	/*
	 * handle unaligned tail bytes
	 */
	data = 0;
	for (i=0, cp=wp; i<FLASH_WIDTH && cnt>0; ++i, ++cp) {
		data = (data << 8) | *src++;
		--cnt;
	}
	for (; i<FLASH_WIDTH; ++i, ++cp) {
		data = (data << 8) | (*(uchar *)cp);
	}

	return (write_data(info, wp, data));
}

/*-----------------------------------------------------------------------
 * Check flash status, returns:
 * 0 - OK
 * 1 - timeout
 */
static int flash_status_check(vu_long *addr, ulong tout, char * prompt)
{
	ulong status;
	ulong start;

	/* Wait for command completion */
	start = get_timer (0);
	while(((status = *addr) & 0x00800080) != 0x00800080) {
		if (get_timer(start) > tout) {
			printf("Flash %s timeout at address %p\n", prompt, addr);
			*addr = 0x00FF00FF;	/* restore read mode */
			return (1);
		}
	}
	return 0;
}

/*-----------------------------------------------------------------------
 * Write a word to Flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 */
static int write_data (flash_info_t *info, ulong dest, ulong data)
{
	vu_long *addr = (vu_long *)dest;
	int flag;

	/* Check if Flash is (sufficiently) erased */
	if ((*addr & data) != data) {
		return (2);
	}
	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts();

	*addr = 0x00400040;		/* write setup */
	*addr = data;

	/* re-enable interrupts if necessary */
	if (flag)
		enable_interrupts();

	if (flash_status_check(addr, CONFIG_SYS_FLASH_WRITE_TOUT, "write") != 0) {
		return (1);
	}

	*addr = 0x00FF00FF;	/* restore read mode */

	return (0);
}

#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
/*-----------------------------------------------------------------------
 * Write a buffer to Flash, returns:
 * 0 - OK
 * 1 - write timeout
 */
static int write_data_buf(flash_info_t * info, ulong dest, uchar * cp, int len)
{
	vu_long *addr = (vu_long *)dest;
	int sector;
	int cnt;
	int retcode;
	vu_long * src = (vu_long *)cp;
	vu_long * dst = (vu_long *)dest;

	/* find sector */
	for(sector = info->sector_count - 1; sector >= 0; sector--) {
		if(dest >= info->start[sector])
			break;
	}

	*addr = 0x00500050;		/* clear status */
	*addr = 0x00e800e8;		/* write buffer */

	if((retcode = flash_status_check(addr, CONFIG_SYS_FLASH_BUFFER_WRITE_TOUT,
					 "write to buffer")) == 0) {
		cnt = len / FLASH_WIDTH;
		*addr = (cnt-1) | ((cnt-1) << 16);
		while(cnt-- > 0) {
			*dst++ = *src++;
		}
		*addr = 0x00d000d0;		/* write buffer confirm */
		retcode = flash_status_check(addr, CONFIG_SYS_FLASH_BUFFER_WRITE_TOUT,
						 "buffer write");
	}
	*addr = 0x00FF00FF;	/* restore read mode */
	*addr = 0x00500050;	/* clear status */
	return retcode;
}
#endif /* CONFIG_SYS_USE_FLASH_BUFFER_WRITE */

/*-----------------------------------------------------------------------
 */
Commit	Line	Data
a17d0ff4 WD	1	/*
	2	* (C) Copyright 2001
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
a17d0ff4 WD	6	*/
	7
	8	/* #define DEBUG */
	9
	10	#include <common.h>
	11	#include <mpc8xx.h>
	12
5a1aceb0	13	#if defined(CONFIG_ENV_IS_IN_FLASH)
0e8d1586	14	# ifndef CONFIG_ENV_ADDR
6d0f6bcf	15	# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
a17d0ff4	16	# endif
0e8d1586 JCPV	17	# ifndef CONFIG_ENV_SIZE
0e8d1586 JCPV	18	# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
a17d0ff4	19	# endif
0e8d1586 JCPV	20	# ifndef CONFIG_ENV_SECT_SIZE
0e8d1586 JCPV	21	# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
a17d0ff4 WD	22	# endif
	23	#endif
	24
	25	/---------------------------------------------------------------------/
	26
6d0f6bcf	27	flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
a17d0ff4 WD	28
	29	/*-----------------------------------------------------------------------
	30	* Functions
	31	*/
	32	static ulong flash_get_size (vu_long addr, flash_info_t info);
	33	static int write_data (flash_info_t *info, ulong dest, ulong data);
6d0f6bcf	34	#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
c837dcb1 WD	35	static int write_data_buf (flash_info_t * info, ulong dest, uchar * cp, int len);
c837dcb1 WD	36	#endif
a17d0ff4 WD	37	static void flash_get_offsets (ulong base, flash_info_t *info);
	38
	39	/*-----------------------------------------------------------------------
	40	*/
	41
	42	unsigned long flash_init (void)
	43	{
6d0f6bcf	44	volatile immap_t immap = (immap_t )CONFIG_SYS_IMMR;
a17d0ff4 WD	45	volatile memctl8xx_t *memctl = &immap->im_memctl;
	46	unsigned long size_b0, size_b1;
	47	int i;
	48
	49	/* Init: no FLASHes known */
6d0f6bcf	50	for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
a17d0ff4 WD	51	flash_info[i].flash_id = FLASH_UNKNOWN;
	52	}
	53
	54	/* Static FLASH Bank configuration here - FIXME XXX */
	55
	56	debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
	57
	58	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
	59
	60	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
	61	printf ("## Unknown FLASH on Bank 0: "
	62	"ID 0x%lx, Size = 0x%08lx = %ld MB\n",
	63	flash_info[0].flash_id,
	64	size_b0, size_b0<<20);
	65	}
	66
	67	debug ("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE1_PRELIM);
	68
	69	size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
	70
	71	debug ("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
	72
	73	if (size_b1 > size_b0) {
	74	printf ("## ERROR: "
	75	"Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
	76	size_b1, size_b1<<20,
	77	size_b0, size_b0<<20
	78	);
	79	flash_info[0].flash_id = FLASH_UNKNOWN;
	80	flash_info[1].flash_id = FLASH_UNKNOWN;
	81	flash_info[0].sector_count = -1;
	82	flash_info[1].sector_count = -1;
	83	flash_info[0].size = 0;
	84	flash_info[1].size = 0;
	85	return (0);
	86	}
	87
	88	debug ("## Before remap: "
	89	"BR0: 0x%08x OR0: 0x%08x "
	90	"BR1: 0x%08x OR1: 0x%08x\n",
	91	memctl->memc_br0, memctl->memc_or0,
	92	memctl->memc_br1, memctl->memc_or1);
	93
	94	/* Remap FLASH according to real size */
6d0f6bcf	95	memctl->memc_or0 = (-size_b0 & 0xFFFF8000) \| CONFIG_SYS_OR_TIMING_FLASH \|
a17d0ff4	96	OR_CSNT_SAM \| OR_ACS_DIV1;
6d0f6bcf	97	memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) \| BR_PS_32 \| BR_V;
a17d0ff4 WD	98
	99	debug ("## BR0: 0x%08x OR0: 0x%08x\n",
	100	memctl->memc_br0, memctl->memc_or0);
	101
	102	/* Re-do sizing to get full correct info */
6d0f6bcf	103	size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
a17d0ff4	104
6d0f6bcf	105	flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
a17d0ff4 WD	106
	107	flash_info[0].size = size_b0;
	108
6d0f6bcf	109	#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
a17d0ff4 WD	110	/* monitor protection ON by default */
a17d0ff4 WD	111	flash_protect(FLAG_PROTECT_SET,
6d0f6bcf JCPV	112	CONFIG_SYS_MONITOR_BASE,
6d0f6bcf JCPV	113	CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
a17d0ff4 WD	114	&flash_info[0]);
	115	#endif
	116
5a1aceb0	117	#ifdef CONFIG_ENV_IS_IN_FLASH
a17d0ff4 WD	118	/* ENV protection ON by default */
a17d0ff4 WD	119	flash_protect(FLAG_PROTECT_SET,
0e8d1586 JCPV	120	CONFIG_ENV_ADDR,
0e8d1586 JCPV	121	CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
a17d0ff4 WD	122	&flash_info[0]);
	123	#endif
	124
	125	if (size_b1) {
6d0f6bcf	126	memctl->memc_or1 = (-size_b1 & 0xFFFF8000) \| CONFIG_SYS_OR_TIMING_FLASH \|
a17d0ff4	127	OR_CSNT_SAM \| OR_ACS_DIV1;
6d0f6bcf	128	memctl->memc_br1 = ((CONFIG_SYS_FLASH_BASE + size_b0) & BR_BA_MSK) \|
a17d0ff4 WD	129	BR_PS_32 \| BR_V;
	130
	131	debug ("## BR1: 0x%08x OR1: 0x%08x\n",
	132	memctl->memc_br1, memctl->memc_or1);
	133
	134	/* Re-do sizing to get full correct info */
6d0f6bcf	135	size_b1 = flash_get_size((vu_long *)(CONFIG_SYS_FLASH_BASE + size_b0),
a17d0ff4 WD	136	&flash_info[1]);
	137
	138	flash_info[1].size = size_b1;
	139
6d0f6bcf	140	flash_get_offsets (CONFIG_SYS_FLASH_BASE + size_b0, &flash_info[1]);
a17d0ff4	141
6d0f6bcf	142	#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
a17d0ff4 WD	143	/* monitor protection ON by default */
a17d0ff4 WD	144	flash_protect(FLAG_PROTECT_SET,
6d0f6bcf JCPV	145	CONFIG_SYS_MONITOR_BASE,
6d0f6bcf JCPV	146	CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
a17d0ff4 WD	147	&flash_info[1]);
	148	#endif
	149
5a1aceb0	150	#ifdef CONFIG_ENV_IS_IN_FLASH
a17d0ff4 WD	151	/* ENV protection ON by default */
a17d0ff4 WD	152	flash_protect(FLAG_PROTECT_SET,
0e8d1586 JCPV	153	CONFIG_ENV_ADDR,
0e8d1586 JCPV	154	CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
a17d0ff4 WD	155	&flash_info[1]);
	156	#endif
	157	} else {
	158	memctl->memc_br1 = 0; /* invalidate bank */
	159	memctl->memc_or1 = 0; /* invalidate bank */
	160
	161	debug ("## DISABLE BR1: 0x%08x OR1: 0x%08x\n",
	162	memctl->memc_br1, memctl->memc_or1);
	163
	164	flash_info[1].flash_id = FLASH_UNKNOWN;
	165	flash_info[1].sector_count = -1;
	166	flash_info[1].size = 0;
	167	}
	168
	169	debug ("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
	170
	171	return (size_b0 + size_b1);
	172	}
	173
	174	/*-----------------------------------------------------------------------
	175	*/
	176	static void flash_get_offsets (ulong base, flash_info_t *info)
	177	{
	178	int i;
	179
	180	if (info->flash_id == FLASH_UNKNOWN) {
	181	return;
	182	}
	183
	184	switch (info->flash_id & FLASH_VENDMASK) {
	185	case FLASH_MAN_INTEL:
	186	for (i = 0; i < info->sector_count; i++) {
	187	info->start[i] = base;
	188	base += 0x00020000 * 2; /* 128k * 2 chips per bank */
	189	}
	190	return;
	191
	192	default:
	193	printf ("Don't know sector ofsets for flash type 0x%lx\n",
	194	info->flash_id);
	195	return;
	196	}
	197	}
	198
	199	/*-----------------------------------------------------------------------
	200	*/
	201	void flash_print_info (flash_info_t *info)
	202	{
	203	int i;
	204
	205	if (info->flash_id == FLASH_UNKNOWN) {
	206	printf ("missing or unknown FLASH type\n");
	207	return;
	208	}
	209
	210	switch (info->flash_id & FLASH_VENDMASK) {
	211	case FLASH_MAN_AMD: printf ("AMD "); break;
	212	case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
	213	case FLASH_MAN_SST: printf ("SST "); break;
	214	case FLASH_MAN_STM: printf ("STM "); break;
	215	case FLASH_MAN_INTEL: printf ("Intel "); break;
	216	case FLASH_MAN_MT: printf ("MT "); break;
	217	default: printf ("Unknown Vendor "); break;
	218	}
219
220	switch (info->flash_id & FLASH_TYPEMASK) {
221	case FLASH_28F320J3A: printf ("28F320J3A (32Mbit = 128K x 32)\n");
222	break;
223	case FLASH_28F640J3A: printf ("28F640J3A (64Mbit = 128K x 64)\n");
224	break;
225	case FLASH_28F128J3A: printf ("28F128J3A (128Mbit = 128K x 128)\n");
226	break;
227	default: printf ("Unknown Chip Type\n");
228	break;
229	}
230
231	if (info->size >= (1 << 20)) {
232	i = 20;
233	} else {
234	i = 10;
235	}
236	printf (" Size: %ld %cB in %d Sectors\n",
237	info->size >> i,
238	(i == 20) ? 'M' : 'k',
239	info->sector_count);
240
241	printf (" Sector Start Addresses:");
242	for (i=0; i<info->sector_count; ++i) {
243	if ((i % 5) == 0)
244	printf ("\n ");
245	printf (" %08lX%s",
246	info->start[i],
247	info->protect[i] ? " (RO)" : " "
248	);
249	}
250	printf ("\n");
251	return;
252	}
253
254	/*-----------------------------------------------------------------------
255	*/
256
257
258	/*-----------------------------------------------------------------------
259	*/
260
261	/*
262	* The following code cannot be run from FLASH!
263	*/
264
265	static ulong flash_get_size (vu_long addr, flash_info_t info)
266	{
267	ulong value;
268
269	/* Read Manufacturer ID */
270	addr[0] = 0x00900090;
271	value = addr[0];
272
273	debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
274
275	switch (value) {
276	case AMD_MANUFACT:
277	info->flash_id = FLASH_MAN_AMD;
278	break;
279	case FUJ_MANUFACT:
280	info->flash_id = FLASH_MAN_FUJ;
281	break;
282	case SST_MANUFACT:
283	info->flash_id = FLASH_MAN_SST;
284	break;
285	case STM_MANUFACT:
286	info->flash_id = FLASH_MAN_STM;
287	break;
288	case INTEL_MANUFACT:
289	info->flash_id = FLASH_MAN_INTEL;
290	break;
291	default:
292	info->flash_id = FLASH_UNKNOWN;
293	info->sector_count = 0;
294	info->size = 0;
295	addr[0] = 0x00FF00FF; /* restore read mode */
296	return (0); /* no or unknown flash */
297	}
298
299	value = addr[1]; /* device ID */
300
301	debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
302
303	switch (value) {
304	case INTEL_ID_28F320J3A:
305	info->flash_id += FLASH_28F320J3A;
306	info->sector_count = 32;
307	info->size = 0x00400000 * 2;
308	break; /* => 8 MB */
309
310	case INTEL_ID_28F640J3A:
311	info->flash_id += FLASH_28F640J3A;
312	info->sector_count = 64;
313	info->size = 0x00800000 * 2;
314	break; /* => 16 MB */
315
316	case INTEL_ID_28F128J3A:
317	info->flash_id += FLASH_28F128J3A;
318	info->sector_count = 128;
319	info->size = 0x01000000 * 2;
320	break; /* => 32 MB */
321
322	default:
323	info->flash_id = FLASH_UNKNOWN;
324	addr[0] = 0x00FF00FF; /* restore read mode */
325	return (0); /* => no or unknown flash */
326
327	}
328
6d0f6bcf	329	if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
a17d0ff4	330	printf (" ERROR: sector count %d > max (%d) \n",
6d0f6bcf JCPV	331	info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
6d0f6bcf JCPV	332	info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
a17d0ff4 WD	333	}
	334
	335	addr[0] = 0x00FF00FF; /* restore read mode */
	336
	337	return (info->size);
	338	}
	339
	340
	341	/*-----------------------------------------------------------------------
	342	*/
	343
	344	int flash_erase (flash_info_t *info, int s_first, int s_last)
	345	{
	346	int flag, prot, sect;
	347	ulong start, now, last;
	348
	349	debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
	350
	351	if ((s_first < 0) \|\| (s_first > s_last)) {
	352	if (info->flash_id == FLASH_UNKNOWN) {
	353	printf ("- missing\n");
	354	} else {
	355	printf ("- no sectors to erase\n");
	356	}
	357	return 1;
	358	}
	359
	360	if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
	361	printf ("Can erase only Intel flash types - aborted\n");
	362	return 1;
	363	}
	364
	365	prot = 0;
	366	for (sect=s_first; sect<=s_last; ++sect) {
	367	if (info->protect[sect]) {
	368	prot++;
	369	}
	370	}
	371
	372	if (prot) {
	373	printf ("- Warning: %d protected sectors will not be erased!\n",
	374	prot);
	375	} else {
	376	printf ("\n");
	377	}
	378
	379	start = get_timer (0);
	380	last = start;
	381	/* Start erase on unprotected sectors */
	382	for (sect = s_first; sect<=s_last; sect++) {
	383	if (info->protect[sect] == 0) { /* not protected */
	384	vu_long addr = (vu_long )(info->start[sect]);
	385	unsigned long status;
	386
	387	/* Disable interrupts which might cause a timeout here */
	388	flag = disable_interrupts();
	389
31a64923 WD	390	addr = 0x00600060; / clear lock bit setup */
	391	addr = 0x00D000D0; / clear lock bit confirm */
	392
	393	udelay (1000);
	394	/* This takes awfully long - up to 50 ms and more */
	395	while (((status = *addr) & 0x00800080) != 0x00800080) {
6d0f6bcf	396	if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
31a64923 WD	397	printf ("Timeout\n");
	398	addr = 0x00FF00FF; / reset to read mode */
	399	return 1;
	400	}
	401
	402	/* show that we're waiting */
	403	if ((now - last) > 1000) { /* every second */
	404	putc ('.');
	405	last = now;
	406	}
	407	udelay (1000); /* to trigger the watchdog */
	408	}
	409
a17d0ff4 WD	410	addr = 0x00500050; / clear status register */
	411	addr = 0x00200020; / erase setup */
	412	addr = 0x00D000D0; / erase confirm */
	413
	414	/* re-enable interrupts if necessary */
	415	if (flag)
	416	enable_interrupts();
	417
	418	/* wait at least 80us - let's wait 1 ms */
	419	udelay (1000);
	420
	421	while (((status = *addr) & 0x00800080) != 0x00800080) {
6d0f6bcf	422	if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
a17d0ff4 WD	423	printf ("Timeout\n");
	424	addr = 0x00B000B0; / suspend erase */
	425	addr = 0x00FF00FF; / reset to read mode */
	426	return 1;
	427	}
	428
	429	/* show that we're waiting */
	430	if ((now - last) > 1000) { /* every second */
	431	putc ('.');
	432	last = now;
	433	}
31a64923	434	udelay (1000); /* to trigger the watchdog */
a17d0ff4 WD	435	}
	436
	437	addr = 0x00FF00FF; / reset to read mode */
	438	}
	439	}
	440	printf (" done\n");
	441	return 0;
	442	}
	443
	444	/*-----------------------------------------------------------------------
	445	* Copy memory to flash, returns:
	446	* 0 - OK
	447	* 1 - write timeout
	448	* 2 - Flash not erased
	449	* 4 - Flash not identified
	450	*/
	451
	452	#define FLASH_WIDTH 4 /* flash bus width in bytes */
	453
	454	int write_buff (flash_info_t info, uchar src, ulong addr, ulong cnt)
	455	{
	456	ulong cp, wp, data;
	457	int i, l, rc;
	458
	459	if (info->flash_id == FLASH_UNKNOWN) {
	460	return 4;
	461	}
	462
	463	wp = (addr & ~(FLASH_WIDTH-1)); /* get lower FLASH_WIDTH aligned address */
	464
	465	/*
	466	* handle unaligned start bytes
	467	*/
	468	if ((l = addr - wp) != 0) {
	469	data = 0;
	470	for (i=0, cp=wp; i<l; ++i, ++cp) {
	471	data = (data << 8) \| ((uchar )cp);
	472	}
	473	for (; i<FLASH_WIDTH && cnt>0; ++i) {
	474	data = (data << 8) \| *src++;
	475	--cnt;
	476	++cp;
	477	}
	478	for (; cnt==0 && i<FLASH_WIDTH; ++i, ++cp) {
	479	data = (data << 8) \| ((uchar )cp);
	480	}
	481
	482	if ((rc = write_data(info, wp, data)) != 0) {
	483	return (rc);
	484	}
	485	wp += FLASH_WIDTH;
	486	}
	487
	488	/*
	489	* handle FLASH_WIDTH aligned part
	490	*/
6d0f6bcf	491	#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
c837dcb1	492	while(cnt >= FLASH_WIDTH) {
6d0f6bcf JCPV	493	i = CONFIG_SYS_FLASH_BUFFER_SIZE > cnt ?
6d0f6bcf JCPV	494	(cnt & ~(FLASH_WIDTH - 1)) : CONFIG_SYS_FLASH_BUFFER_SIZE;
c837dcb1 WD	495	if((rc = write_data_buf(info, wp, src,i)) != 0)
	496	return rc;
	497	wp += i;
	498	src += i;
	499	cnt -=i;
	500	}
	501	#else
a17d0ff4 WD	502	while (cnt >= FLASH_WIDTH) {
	503	data = 0;
	504	for (i=0; i<FLASH_WIDTH; ++i) {
	505	data = (data << 8) \| *src++;
	506	}
	507	if ((rc = write_data(info, wp, data)) != 0) {
	508	return (rc);
	509	}
	510	wp += FLASH_WIDTH;
	511	cnt -= FLASH_WIDTH;
	512	}
6d0f6bcf	513	#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
a17d0ff4 WD	514
	515	if (cnt == 0) {
	516	return (0);
	517	}
	518
	519	/*
	520	* handle unaligned tail bytes
	521	*/
	522	data = 0;
	523	for (i=0, cp=wp; i<FLASH_WIDTH && cnt>0; ++i, ++cp) {
	524	data = (data << 8) \| *src++;
	525	--cnt;
	526	}
	527	for (; i<FLASH_WIDTH; ++i, ++cp) {
	528	data = (data << 8) \| ((uchar )cp);
	529	}
	530
	531	return (write_data(info, wp, data));
	532	}
	533
c837dcb1 WD	534	/*-----------------------------------------------------------------------
	535	* Check flash status, returns:
	536	* 0 - OK
	537	* 1 - timeout
	538	*/
	539	static int flash_status_check(vu_long addr, ulong tout, char prompt)
	540	{
	541	ulong status;
	542	ulong start;
	543
	544	/* Wait for command completion */
	545	start = get_timer (0);
	546	while(((status = *addr) & 0x00800080) != 0x00800080) {
	547	if (get_timer(start) > tout) {
	548	printf("Flash %s timeout at address %p\n", prompt, addr);
	549	addr = 0x00FF00FF; / restore read mode */
	550	return (1);
	551	}
	552	}
	553	return 0;
	554	}
	555
a17d0ff4 WD	556	/*-----------------------------------------------------------------------
	557	* Write a word to Flash, returns:
	558	* 0 - OK
	559	* 1 - write timeout
	560	* 2 - Flash not erased
	561	*/
	562	static int write_data (flash_info_t *info, ulong dest, ulong data)
	563	{
	564	vu_long addr = (vu_long )dest;
a17d0ff4 WD	565	int flag;
	566
	567	/* Check if Flash is (sufficiently) erased */
	568	if ((*addr & data) != data) {
	569	return (2);
	570	}
	571	/* Disable interrupts which might cause a timeout here */
	572	flag = disable_interrupts();
	573
	574	addr = 0x00400040; / write setup */
	575	*addr = data;
	576
	577	/* re-enable interrupts if necessary */
	578	if (flag)
	579	enable_interrupts();
	580
6d0f6bcf	581	if (flash_status_check(addr, CONFIG_SYS_FLASH_WRITE_TOUT, "write") != 0) {
c837dcb1	582	return (1);
a17d0ff4 WD	583	}
	584
	585	addr = 0x00FF00FF; / restore read mode */
	586
	587	return (0);
	588	}
	589
6d0f6bcf	590	#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
c837dcb1 WD	591	/*-----------------------------------------------------------------------
	592	* Write a buffer to Flash, returns:
	593	* 0 - OK
	594	* 1 - write timeout
	595	*/
	596	static int write_data_buf(flash_info_t * info, ulong dest, uchar * cp, int len)
	597	{
	598	vu_long addr = (vu_long )dest;
	599	int sector;
	600	int cnt;
	601	int retcode;
	602	vu_long * src = (vu_long *)cp;
	603	vu_long * dst = (vu_long *)dest;
	604
	605	/* find sector */
	606	for(sector = info->sector_count - 1; sector >= 0; sector--) {
	607	if(dest >= info->start[sector])
	608	break;
	609	}
	610
	611	addr = 0x00500050; / clear status */
	612	addr = 0x00e800e8; / write buffer */
	613
6d0f6bcf	614	if((retcode = flash_status_check(addr, CONFIG_SYS_FLASH_BUFFER_WRITE_TOUT,
c837dcb1 WD	615	"write to buffer")) == 0) {
	616	cnt = len / FLASH_WIDTH;
	617	*addr = (cnt-1) \| ((cnt-1) << 16);
	618	while(cnt-- > 0) {
	619	dst++ = src++;
	620	}
	621	addr = 0x00d000d0; / write buffer confirm */
6d0f6bcf	622	retcode = flash_status_check(addr, CONFIG_SYS_FLASH_BUFFER_WRITE_TOUT,
c837dcb1 WD	623	"buffer write");
	624	}
	625	addr = 0x00FF00FF; / restore read mode */
	626	addr = 0x00500050; / clear status */
	627	return retcode;
	628	}
6d0f6bcf	629	#endif /* CONFIG_SYS_USE_FLASH_BUFFER_WRITE */
c837dcb1	630
a17d0ff4 WD	631	/*-----------------------------------------------------------------------
a17d0ff4 WD	632	*/