projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 7fb3e7a2 AS |
1 | /* |
| 2 | * Copyright (C) 2011 Matrix Vision GmbH | |
| 3 | * Andre Schwarz <andre.schwarz@matrix-vision.de> | |
| 4 | * | |
| 1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 7fb3e7a2 AS |
6 | */ |
| 7 | ||
| 8 | #ifndef __MERGERBOX_H__ | |
| 9 | #define __MERGERBOX_H__ | |
| 10 | ||
| 11 | #define MV_GPIO | |
| 12 | ||
| 13 | /* | |
| 14 | * GPIO Bank 1 | |
| 15 | */ | |
| 16 | #define TFT_SPI_EN (0x80000000>>0) | |
| 17 | #define FPGA_CONFIG (0x80000000>>1) | |
| 18 | #define FPGA_STATUS (0x80000000>>2) | |
| 19 | #define FPGA_CONF_DONE (0x80000000>>3) | |
| 20 | #define FPGA_DIN (0x80000000>>4) | |
| 21 | #define FPGA_CCLK (0x80000000>>5) | |
| 22 | #define MAN_RST (0x80000000>>6) | |
| 23 | #define FPGA_SYS_RST (0x80000000>>7) | |
| 24 | #define WD_WDI (0x80000000>>8) | |
| 25 | #define TFT_RST (0x80000000>>9) | |
| 26 | #define HISCON_GPIO1 (0x80000000>>10) | |
| 27 | #define HISCON_GPIO2 (0x80000000>>11) | |
| 28 | #define B2B_GPIO2 (0x80000000>>12) | |
| 29 | #define CCU_GPIN (0x80000000>>13) | |
| 30 | #define CCU_GPOUT (0x80000000>>14) | |
| 31 | #define TFT_GPIO0 (0x80000000>>15) | |
| 32 | #define TFT_GPIO1 (0x80000000>>16) | |
| 33 | #define TFT_GPIO2 (0x80000000>>17) | |
| 34 | #define TFT_GPIO3 (0x80000000>>18) | |
| 35 | #define B2B_GPIO0 (0x80000000>>19) | |
| 36 | #define B2B_GPIO1 (0x80000000>>20) | |
| 37 | #define TFT_SPI_CPLD_CS (0x80000000>>21) | |
| 38 | #define TFT_SPI_CS (0x80000000>>22) | |
| 39 | #define CCU_PWR_EN (0x80000000>>23) | |
| 40 | #define B2B_GPIO3 (0x80000000>>24) | |
| 41 | #define CCU_PWR_STAT (0x80000000>>25) | |
| 42 | ||
| 43 | #define MV_GPIO1_DAT (FPGA_CONFIG|CCU_PWR_EN|TFT_SPI_CPLD_CS) | |
| 44 | #define MV_GPIO1_OUT (TFT_SPI_EN|FPGA_CONFIG|FPGA_DIN|FPGA_CCLK|CCU_PWR_EN| \ | |
| 45 | TFT_SPI_CPLD_CS) | |
| 46 | #define MV_GPIO1_ODE (FPGA_CONFIG|MAN_RST) | |
| 47 | ||
| 48 | /* | |
| 49 | * GPIO Bank 2 | |
| 50 | */ | |
| 51 | #define SPI_FLASH_WP (0x80000000>>10) | |
| 52 | #define SYS_EEPROM_WP (0x80000000>>11) | |
| 53 | #define SPI_FLASH_CS (0x80000000>>22) | |
| 54 | ||
| 55 | #define MV_GPIO2_DAT (SYS_EEPROM_WP|SPI_FLASH_CS) | |
| 56 | #define MV_GPIO2_OUT (SPI_FLASH_WP|SYS_EEPROM_WP|SPI_FLASH_CS) | |
| 57 | #define MV_GPIO2_ODE 0 | |
| 58 | ||
| 59 | void mergerbox_tft_dim(u16 value); | |
| 60 | ||
| 61 | #endif |