[people/ms/u-boot.git] / board / motionpro / motionpro.c

/*
 * (C) Copyright 2003-2007
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * modified for Promess PRO - by Andy Joseph, andy@promessdev.com
 * modified for Promess PRO-Motion - by Robert McCullough, rob@promessdev.com
 * modified by Chris M. Tumas 6/20/06 Change CAS latency to 2 from 3
 * Also changed the refresh for 100Mhz operation
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <mpc5xxx.h>

#if defined(CONFIG_OF_FLAT_TREE)
#include <ft_build.h>
#endif

#if defined(CONFIG_STATUS_LED)
#include <status_led.h>
#endif /* CONFIG_STATUS_LED */

/* Kollmorgen DPR initialization data */
struct init_elem {
	unsigned long addr;
	unsigned len;
	char *data;
	} init_seq[] = {
		{0x500003F2, 2, "\x86\x00"},		/* HW parameter */
		{0x500003F0, 2, "\x00\x00"},
		{0x500003EC, 4, "\x00\x80\xc1\x52"},	/* Magic word */
	};

/*
 * Initialize Kollmorgen DPR
 */
static void kollmorgen_init(void)
{
	unsigned i, j;
	vu_char *p;

	for (i = 0; i < sizeof(init_seq) / sizeof(struct init_elem); ++i) {
		p = (vu_char *)init_seq[i].addr;
		for (j = 0; j < init_seq[i].len; ++j)
			*(p + j) = *(init_seq[i].data + j);
	}

	printf("DPR:   Kollmorgen DPR initialized\n");
}


/*
 * Early board initalization.
 */
int board_early_init_r(void)
{
	/* Now, when we are in RAM, disable Boot Chipselect and enable CS0 */
	*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25);
	*(vu_long *)MPC5XXX_ADDECR |= (1 << 16);

	/* Initialize Kollmorgen DPR */
	kollmorgen_init();

	return 0;
}


#ifndef CFG_RAMBOOT
/*
 * Helper function to initialize SDRAM controller.
 */
static void sdram_start (int hi_addr)
{
	long hi_addr_bit = hi_addr ? 0x01000000 : 0;

	/* unlock mode register */
	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 |
						hi_addr_bit;

	/* precharge all banks */
	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 |
						hi_addr_bit;

	/* auto refresh */
	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
						hi_addr_bit;

	/* auto refresh, second time */
	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
						hi_addr_bit;

	/* set mode register */
	*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;

	/* normal operation */
	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
}
#endif /* !CFG_RAMBOOT */


/*
 * Initalize SDRAM - configure SDRAM controller, detect memory size.
 */
long int initdram (int board_type)
{
	ulong dramsize = 0;
#ifndef CFG_RAMBOOT
	ulong test1, test2;

	/* configure SDRAM start/end for detection */
	*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */

	/* setup config registers */
	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;

	sdram_start(0);
	test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
	sdram_start(1);
	test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
	if (test1 > test2) {
		sdram_start(0);
		dramsize = test1;
	} else {
		dramsize = test2;
	}

	/* memory smaller than 1MB is impossible */
	if (dramsize < (1 << 20))
		dramsize = 0;

	/* set SDRAM CS0 size according to the amount of RAM found */
	if (dramsize > 0)
		*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
			__builtin_ffs(dramsize >> 20) - 1;
        else
		*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */

	/* let SDRAM CS1 start right after CS0 and disable it */
	*(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize;

#else /* !CFG_RAMBOOT */
	/* retrieve size of memory connected to SDRAM CS0 */
	dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
	if (dramsize >= 0x13)
		dramsize = (1 << (dramsize - 0x13)) << 20;
	else
		dramsize = 0;
#endif /* CFG_RAMBOOT */

	/* return total ram size */
	return dramsize;
}


int checkboard (void)
{
	uchar rev = *(vu_char *)CPLD_REV_REGISTER;
	printf("Board: Promess Motion-PRO board (CPLD rev. 0x%02x)\n", rev);
	return 0;
}


#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
	ft_cpu_setup(blob, bd);
}
#endif /* defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) */


#if defined(CONFIG_STATUS_LED)
void __led_init (led_id_t regaddr, int state)
{
	*((vu_long *) regaddr) |= ENABLE_GPIO_OUT;

	if (state == STATUS_LED_ON)
		*((vu_long *) regaddr) |= LED_ON;
	else
		*((vu_long *) regaddr) &= ~LED_ON;
}

void __led_set (led_id_t regaddr, int state)
{
	if (state == STATUS_LED_ON)
		*((vu_long *) regaddr) |= LED_ON;
	else
		*((vu_long *) regaddr) &= ~LED_ON;
}

void __led_toggle (led_id_t regaddr)
{
	*((vu_long *) regaddr) ^= LED_ON;
}
#endif /* CONFIG_STATUS_LED */
Commit	Line	Data
53d4a498 BS	1	/*
	2	* (C) Copyright 2003-2007
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
	5	* modified for Promess PRO - by Andy Joseph, andy@promessdev.com
	6	* modified for Promess PRO-Motion - by Robert McCullough, rob@promessdev.com
	7	* modified by Chris M. Tumas 6/20/06 Change CAS latency to 2 from 3
	8	* Also changed the refresh for 100Mhz operation
	9	*
	10	* See file CREDITS for list of people who contributed to this
	11	* project.
	12	*
	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License as
	15	* published by the Free Software Foundation; either version 2 of
	16	* the License, or (at your option) any later version.
	17	*
	18	* This program is distributed in the hope that it will be useful,
	19	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	20	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	21	* GNU General Public License for more details.
	22	*
	23	* You should have received a copy of the GNU General Public License
	24	* along with this program; if not, write to the Free Software
	25	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	26	* MA 02111-1307 USA
	27	*/
	28
	29	#include <common.h>
	30	#include <mpc5xxx.h>
	31
1f1369c3 BS	32	#if defined(CONFIG_OF_FLAT_TREE)
	33	#include <ft_build.h>
	34	#endif
53d4a498	35
a11c0b85 BS	36	#if defined(CONFIG_STATUS_LED)
	37	#include <status_led.h>
	38	#endif /* CONFIG_STATUS_LED */
	39
53d4a498 BS	40	/* Kollmorgen DPR initialization data */
	41	struct init_elem {
	42	unsigned long addr;
	43	unsigned len;
	44	char *data;
	45	} init_seq[] = {
	46	{0x500003F2, 2, "\x86\x00"}, /* HW parameter */
	47	{0x500003F0, 2, "\x00\x00"},
	48	{0x500003EC, 4, "\x00\x80\xc1\x52"}, /* Magic word */
	49	};
	50
	51	/*
	52	* Initialize Kollmorgen DPR
	53	*/
	54	static void kollmorgen_init(void)
	55	{
	56	unsigned i, j;
	57	vu_char *p;
	58
	59	for (i = 0; i < sizeof(init_seq) / sizeof(struct init_elem); ++i) {
	60	p = (vu_char *)init_seq[i].addr;
	61	for (j = 0; j < init_seq[i].len; ++j)
	62	(p + j) = (init_seq[i].data + j);
	63	}
	64
	65	printf("DPR: Kollmorgen DPR initialized\n");
	66	}
	67
	68
	69	/*
	70	* Early board initalization.
	71	*/
	72	int board_early_init_r(void)
	73	{
	74	/* Now, when we are in RAM, disable Boot Chipselect and enable CS0 */
	75	(vu_long )MPC5XXX_ADDECR &= ~(1 << 25);
	76	(vu_long )MPC5XXX_ADDECR \|= (1 << 16);
	77
	78	/* Initialize Kollmorgen DPR */
	79	kollmorgen_init();
	80
	81	return 0;
	82	}
	83
	84
	85	#ifndef CFG_RAMBOOT
	86	/*
	87	* Helper function to initialize SDRAM controller.
	88	*/
	89	static void sdram_start (int hi_addr)
	90	{
	91	long hi_addr_bit = hi_addr ? 0x01000000 : 0;
	92
	93	/* unlock mode register */
	94	(vu_long )MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL \| 0x80000000 \|
	95	hi_addr_bit;
	96
	97	/* precharge all banks */
	98	(vu_long )MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL \| 0x80000002 \|
	99	hi_addr_bit;
	100
	101	/* auto refresh */
	102	(vu_long )MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL \| 0x80000004 \|
	103	hi_addr_bit;
104
105	/* auto refresh, second time */
106	(vu_long )MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL \| 0x80000004 \|
107	hi_addr_bit;
108
109	/* set mode register */
110	(vu_long )MPC5XXX_SDRAM_MODE = SDRAM_MODE;
111
112	/* normal operation */
113	(vu_long )MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL \| hi_addr_bit;
114	}
115	#endif /* !CFG_RAMBOOT */
116
117
118	/*
119	* Initalize SDRAM - configure SDRAM controller, detect memory size.
120	*/
121	long int initdram (int board_type)
122	{
123	ulong dramsize = 0;
124	#ifndef CFG_RAMBOOT
125	ulong test1, test2;
126
127	/* configure SDRAM start/end for detection */
128	(vu_long )MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
129	(vu_long )MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
130
131	/* setup config registers */
132	(vu_long )MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
133	(vu_long )MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
134
135	sdram_start(0);
136	test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
137	sdram_start(1);
138	test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
139	if (test1 > test2) {
140	sdram_start(0);
141	dramsize = test1;
142	} else {
143	dramsize = test2;
144	}
145
146	/* memory smaller than 1MB is impossible */
147	if (dramsize < (1 << 20))
148	dramsize = 0;
149
150	/* set SDRAM CS0 size according to the amount of RAM found */
151	if (dramsize > 0)
152	(vu_long )MPC5XXX_SDRAM_CS0CFG = 0x13 +
153	__builtin_ffs(dramsize >> 20) - 1;
154	else
155	(vu_long )MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
156
157	/* let SDRAM CS1 start right after CS0 and disable it */
158	(vu_long ) MPC5XXX_SDRAM_CS1CFG = dramsize;
159
160	#else /* !CFG_RAMBOOT */
161	/* retrieve size of memory connected to SDRAM CS0 */
162	dramsize = (vu_long )MPC5XXX_SDRAM_CS0CFG & 0xFF;
163	if (dramsize >= 0x13)
164	dramsize = (1 << (dramsize - 0x13)) << 20;
165	else
166	dramsize = 0;
167	#endif /* CFG_RAMBOOT */
168
169	/* return total ram size */
170	return dramsize;
171	}
172
173
174	int checkboard (void)
175	{
c75e6396 BS	176	uchar rev = (vu_char )CPLD_REV_REGISTER;
c75e6396 BS	177	printf("Board: Promess Motion-PRO board (CPLD rev. 0x%02x)\n", rev);
53d4a498 BS	178	return 0;
53d4a498 BS	179	}
1f1369c3 BS	180
	181
	182	#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
	183	void ft_board_setup(void blob, bd_t bd)
	184	{
	185	ft_cpu_setup(blob, bd);
	186	}
	187	#endif /* defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) */
a11c0b85 BS	188
	189
	190	#if defined(CONFIG_STATUS_LED)
	191	void __led_init (led_id_t regaddr, int state)
	192	{
	193	((vu_long ) regaddr) \|= ENABLE_GPIO_OUT;
	194
	195	if (state == STATUS_LED_ON)
	196	((vu_long ) regaddr) \|= LED_ON;
	197	else
	198	((vu_long ) regaddr) &= ~LED_ON;
	199	}
	200
	201	void __led_set (led_id_t regaddr, int state)
	202	{
	203	if (state == STATUS_LED_ON)
	204	((vu_long ) regaddr) \|= LED_ON;
	205	else
	206	((vu_long ) regaddr) &= ~LED_ON;
	207	}
	208
	209	void __led_toggle (led_id_t regaddr)
	210	{
	211	((vu_long ) regaddr) ^= LED_ON;
	212	}
	213	#endif /* CONFIG_STATUS_LED */