projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| f4ef6668 TW |
1 | /* |
| 2 | * (C) Copyright 2010,2011 | |
| 3 | * NVIDIA Corporation <www.nvidia.com> | |
| 4 | * | |
| 5 | * See file CREDITS for list of people who contributed to this | |
| 6 | * project. | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or | |
| 9 | * modify it under the terms of the GNU General Public License as | |
| 10 | * published by the Free Software Foundation; either version 2 of | |
| 11 | * the License, or (at your option) any later version. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, | |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | * GNU General Public License for more details. | |
| 17 | * | |
| 18 | * You should have received a copy of the GNU General Public License | |
| 19 | * along with this program; if not, write to the Free Software | |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 21 | * MA 02111-1307 USA | |
| 22 | */ | |
| 23 | ||
| 24 | #include <common.h> | |
| 25 | #include <asm/io.h> | |
| e712e545 SG |
26 | #include <asm/arch/clock.h> |
| 27 | #include <asm/arch/funcmux.h> | |
| ae03661f | 28 | #include <asm/arch/pinmux.h> |
| 150c2493 TW |
29 | #include <asm/arch/tegra.h> |
| 30 | #include <asm/arch-tegra/mmc.h> | |
| 9877841f | 31 | #include <asm/gpio.h> |
| 3f82d89d | 32 | #ifdef CONFIG_TEGRA_MMC |
| ccf7988b TW |
33 | #include <mmc.h> |
| 34 | #endif | |
| f4ef6668 | 35 | |
| ccf7988b | 36 | |
| 3f82d89d | 37 | #ifdef CONFIG_TEGRA_MMC |
| ae03661f SW |
38 | /* |
| 39 | * Routine: pin_mux_mmc | |
| 40 | * Description: setup the pin muxes/tristate values for the SDMMC(s) | |
| 41 | */ | |
| 42 | static void pin_mux_mmc(void) | |
| 43 | { | |
| e712e545 SG |
44 | funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); |
| 45 | funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT); | |
| ae03661f SW |
46 | |
| 47 | /* For power GPIO PI6 */ | |
| 48 | pinmux_tristate_disable(PINGRP_ATA); | |
| 49 | /* For CD GPIO PH2 */ | |
| 50 | pinmux_tristate_disable(PINGRP_ATD); | |
| 51 | ||
| ae03661f SW |
52 | /* For power GPIO PT3 */ |
| 53 | pinmux_tristate_disable(PINGRP_DTB); | |
| 54 | /* For CD GPIO PI5 */ | |
| 55 | pinmux_tristate_disable(PINGRP_ATC); | |
| 56 | } | |
| 57 | ||
| ae03661f SW |
58 | /* this is a weak define that we are overriding */ |
| 59 | int board_mmc_init(bd_t *bd) | |
| 60 | { | |
| 61 | debug("board_mmc_init called\n"); | |
| 62 | ||
| 63 | /* Enable muxes, etc. for SDMMC controllers */ | |
| 64 | pin_mux_mmc(); | |
| ae03661f SW |
65 | |
| 66 | debug("board_mmc_init: init SD slot J26\n"); | |
| 67 | /* init dev 0, SD slot J26, with 4-bit bus */ | |
| 68 | /* The board has an 8-bit bus, but 8-bit doesn't work yet */ | |
| 29f3e3f2 | 69 | tegra_mmc_init(0, 4, GPIO_PI6, GPIO_PH2); |
| ae03661f SW |
70 | |
| 71 | debug("board_mmc_init: init SD slot J5\n"); | |
| 72 | /* init dev 2, SD slot J5, with 4-bit bus */ | |
| 29f3e3f2 | 73 | tegra_mmc_init(2, 4, GPIO_PT3, GPIO_PI5); |
| ae03661f SW |
74 | |
| 75 | return 0; | |
| 76 | } | |
| ccf7988b | 77 | #endif |
| 699c40e8 SW |
78 | |
| 79 | void pin_mux_usb(void) | |
| 80 | { | |
| 81 | funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI); | |
| 82 | pinmux_set_func(PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4); | |
| 83 | pinmux_tristate_disable(PINGRP_CDEV2); | |
| 84 | /* USB2 PHY reset GPIO */ | |
| 85 | pinmux_tristate_disable(PINGRP_UAC); | |
| 86 | } |